JPS59144963A - Storage control device - Google Patents

Abstract

PURPOSE:To improve the reliability of storage controlling operation by writing the same data in plural storage device memory boards. CONSTITUTION:When data are to be written in the storage device 2, an address control part 4, a data control part 5 and a writing control part 6 are actuated under the control of the generalized control part 3, address information is sent to an address signal line 101 and writing data are sent to a data signal line 102 to write the same data in the 1st and 2nd memory boards 11, 12 simultaneously. In the reading operation, the generalized control part 3 previously set up whether data are to be read out by using the 1st memory board 11 or the 2nd memory board 12 in a flip flop 8. Under the control of the generalized control part 3, address information is sent to the address signal line 101, the 1st or the 2nd read enable signal line 105, or 106 is activated and data are read out from the memory board 11 or 12 through the signal line 102.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application) The present invention relates to a storage control device used in an information processing device.

(Prior Art) Conventionally, normal information processing devices have storage devices for storing data, but the address spaces of these storage devices are usually contiguous, and the address spaces for the same storage control device are is defined by allocating one address space, and only one storage device is defined for the same address space. A collection of memory chips that make up a storage device i+q
As memory technology improves and becomes more dense, it becomes possible to mount a large number of memory chips inside the package that makes up the storage device, but if even one of the memory chips fails, the package will have to be replaced. It was necessary to either replace it or remove the address space of the failed package and redefine the address space of the failed package in another package. Therefore, there is a drawback that it is necessary to separately prepare a package identical to the failed package, or to control the redefinition of a continuous address space using software or firmware.

(Object of the Invention) An object of the present invention is to provide each control unit to write the same data to a plurality of storage device memory boards, and to select which storage device memory board to read data from. By retaining the data and reading and outputting the data from the storage device memory board determined by the above selection, it is possible to eliminate the above drawback and continue operation even if some of the multiple storage device memory boards fail. The object of the present invention is to provide a storage control device that has the following features.

(Structure of the Invention) A storage control device of the present invention includes a write control section, a 1 selection holding means, a read/output control section, and an address control section.

It is equipped with a data system@1 section and an overall control section.

The fence control unit is for writing the same data to a plurality of storage device memory boards having the same address space.

The selection holding means is also for selecting one of the same data stored in one of the plurality of storage device memory boards.
So, 2 lip flops, one above the other! :Multiple ANs
It is established from the D gate.

The read control section is for outputting data from the storage device memory board designated by the selection holding means.

The address control section controls the addresses used during writing and emptying, and the data control section similarly controls the transfer of data during write/read operations.

The general control section is for controlling each of the above-mentioned control sections and the above-mentioned selection holding means.

(Example) Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of a storage system according to the present invention in association with an external storage device. 1st
In the figure, 1 is the storage control device according to the present invention, 2 is an external storage device, and 3 is the central part of the storage control device 1.
,'' is a general control unit, 4d address control unit, 5 is a data control unit, 6 is a wrap-around control unit, 7 is a readout control unit, 8 is a flip-flop, 9-digit first AND gate, 10 is a second AND gate. A gate, an 11-digit first memory board, and a 12-digit second memory board.

In FIG. 1, the storage control device 1 is connected 17 to the storage device 2 via each memory interface signal 1g4101 to 106, and the storage control device 1 controls the general control unit 3 and the address signal 1i1101. an address control unit 4 for controlling the data signal line 102, a data control unit 5 for controlling the data signal line 102, a terminal end of the voltage enable signal line 103 for selecting a memory board, and a write control unit for controlling the write enable signal line 104. The control unit 6 and the first and second glue enable signal lines 105°1
06, a flip-flop 8 for selecting the first or second memory board 11, 12 built in the storage device 2, and the first and second
1. In the write operation, the write enable signal line 104
The state of is clamped at the () level in the storage control unit 1. Ushi, first read enable signal line 105
The state of is determined by the logical product of the output of the read control section 7 and the output of the logic value l side of the flip-flop 8, and this logical product is output from the first AND gate 9. The state of the second gate enable signal line 106 is determined by the logical product of the output of the read control unit 7 and the output of the logic value 0 side of the flip-flop 8. Output.

Next, the details of the operation will be explained based on FIG. When transferring data to the storage device @2, the address control section 4 is sent under the control of the general control section 3.

The data control section 5 and the write control section 6 are operated, address information is placed on the address signal #31101, write data is placed on the data signal line 102, and the first and second
The same data is written to the memory boards 11 and 12 at the same time. As already explained, the boat enable signal line 103
The write take is written to the first and second memory boards 11, 12 at the same time.

Next, in the read operation, the general control unit 3 selects whether to read data using the first memory board 11 or read data using the second memory board 12, or set it in the flip-flop 8 in advance. I'll keep it. When reading data from the first memory board, the flip-flop 8 is kept in a set state, and when reading a take from the second memory board 12, the flip-flop 8 is kept in a reset state. Next, under the control of the general control section 3, the address control section 4, the data control section 5, and the readout control section 7 are operated.
and the address information is placed on the address signal line 101, and the first or /ζ is connected to the second read enable signal line 10.
5 and 106 are made active, and read data from the second memory boards 11 and 12 of the first dimension is taken into the data control unit 5 via the data signal line 102. When data is read from the first memory board 11, the flip-flop 8 is kept set, so the first gate enable signal line 105 is connected to the first and second AND gates 9 and 10. During active work, the second read enable signal ffa106 is disabled.

On the other hand, when W1 is pushed out from the second memory board 12, the flip-flop 8 is kept in the reset state.
The first read enable signal line 105 is disabled, and the second read enable signal line 106 is enabled.

(Effects of the Invention) As explained above, the present invention can simultaneously transfer the same data to a plurality of storage device memory boards in the same address space.
In the case of reading and writing, by configuring the data to be read from one of the memory boards of the storage device, the reliability of the storage control operation can be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram illustrating an embodiment of a storage control device according to the present invention together with a storage device. 1...Storage control device 2...Kaiji Nanane device 3...New bulk control section 4...Address control section 5...Data control section 6...Content control section 7... Read control unit 8・e・Flip-flop 9.1O---AND gate 11.12...0 Memory board 101-106 ・ ・ ・ Word name WMΔ NEC Corporation

Claims (1)

[Claims] a write control unit for writing the same data to a plurality of storage device memory boards having the same address space;
selection holding means comprising one or more flip-flops and a plurality of AND gates for selecting one of the same data stored in one of the plurality of memory boards; and the selection holding means. an output control section for reading out the data from the storage device memory board specified by the memory board; an address control section for controlling the address used for the writing and the reading; 1. A storage control device comprising: a data control section for controlling data transfer performed during reading; and an overall control section for controlling each of the control sections and the selection/holding means.