JPS59144250A - Demodulation system for phase shift modulated wave - Google Patents

Abstract

PURPOSE:To demodulate a phase shift modulated wave through a simple circuit constitution by imposing complex modulation upon an input phase shift modulated wave and processing the wave by a reference carrier wave for demodulation in optional relation in phase with the reference carrier of the input phase-shift modulated wave. CONSTITUTION:The output of A/D conversion 1 regarding the input phase-shift modulated PSK wave is inputted to a complex modulator 2. The modulator 2 inputs the digital reference carrier in optional phase relation with the received PSK wave as well and modulates the PSK wave to output a real part R and an imaginary part I to an LPF3. The LPF3 removes the carrier wave and inputs the output to a complex multiplier 6 and a polarity inverting circuit 4. A signal obtained by delaying 5 the output of the circuit 4 and the output of an LPF3 are complex-multiplied 6 by each other, and the real part R and imaginary part I of the output are inputted to an amplitude detecting circuit 8 and a clock regenerating circuit 7. The circuit 7 forms a bit timing signal and an amplitude detected by the circuit by using the timing signal is inputted to a bit decision making circuit 9. The circuit 9 combining the current bit and precedent bit together to make a bit decision, thus performing demodulation.

Description

[Detailed description of the invention]

The present invention uses phase shift keying (PSK: Phase-
The present invention relates to a demodulation method that can demodulate an 8hiftKeying) wave using a reference carrier wave whose phase is completely independent of the phase of a received PSK wave. Conventionally, a synchronous detection method or a delayed detection method has been used for demodulating PSK waves. In the synchronous detection method, the received PS
Demodulation is performed by regenerating a reference carrier wave from the K wave and comparing the phase of the regenerated reference carrier wave with the phase of the received PSK wave. On the other hand, in the delayed detection method, the received PSK wave is delayed by one symbol.
The K wave is synchronously detected, and the modulation phase difference between two adjacent symbols is extracted and demodulated. In this way, in the conventional PSK wave demodulation method, the received PSK
It is necessary to create a signal having a certain phase relationship with the received PSK wave from the received PSK wave and use it as a reference carrier wave, which inevitably complicates the circuit configuration. An object of the present invention is to provide a demodulation method that can demodulate a received PSK wave using a reference carrier wave whose phase is unrelated to the phase of the received PSK wave. The present invention is a method that is essentially different from the conventional demodulation method of synchronous detection or delayed detection based on phase comparison, and is
There is no need to create a reference carrier wave from the SK wave,
It is sufficient to provide the demodulator with its own reference carrier wave, and demodulation can be performed using either digital or analog processing. A demodulation method for a phase-shift modulated wave according to the present invention that achieves the above-mentioned object uses a reference carrier for demodulation having an arbitrary phase relationship with a reference carrier for an input phase-shift modulated wave. The complex modulation output is modulated and the complex modulation output is made into a low-frequency wave output, and a low-frequency offshore wave output is obtained by reversing the polarity of the real part or imaginary part, which is the output of the low-frequency p-wave output a predetermined time ago. The present invention is characterized in that bits are determined and demodulated based on the property that the complex multiplication result has a specific value depending on the combination of the current bit and the preceding bit. Hereinafter, the demodulation method of the present invention will be explained with reference to the drawings. FIG. 1 shows an example of the basic configuration of a demodulator according to the present invention. As shown in the figure, this demodulator demodulates the received PSK wave by digital signal processing, and includes an analog-to-digital converter (A/D converter) 1, a complex modulator 2, and a low-frequency p-wave converter 3. , a polarity inversion circuit 4, a delay circuit 5, a complex multiplier 6, a clock recovery circuit 7, an amplitude detection circuit 8, and a bit determination circuit 9. The complex modulator 2 receives a digitized reference carrier wave. is input. In this demodulator, the signal is handled as a complex number, and the solid double line marked with R in FIG. 1 means the real part, and the broken double line marked with ■ means the imaginary part. Among the elements constituting the demodulator described above, the complex modulator 2
assumes that the carrier wave of the received PSK wave is a cosine wave, modulates the digitized cosine wave with the digitized received PSK wave, outputs the signal 2-R as the real part, and modulates the sine wave to output the imaginary part. It outputs a signal 2-I as follows. The low-pass filter 3 removes the carrier wave component from the modulated signal, and can use an ordinary digital low-pass filter or an integrator with the simplest circuit configuration. As the amplitude detection circuit 8, an integral detection circuit is used when performing integral detection, and an instantaneous detection circuit is used when performing instantaneous detection. Note that the delay amount of the delay circuit 5 and the circuit configuration of the bit determination circuit 9 are such that the received PSK wave is a two-phase PSK wave (
BPSK wave), 4-phase PSK wave (QPSK wave), or offset 4-phase PSK wave (0-QPSK wave). On the other hand, the complex multiplier 6 outputs the current signal and the 1-bit previous signal with the polarity of the real part or the imaginary part inverted (in the case of BPSK demodulation, however, in the case of QPSK demodulation,
Before the symbol, OJ? In SK demodulation, complex multiplication with the signal before the Σ symbol is performed. The detailed configuration of the demodulator shown in FIG. 1 and the signal processing performed within the demodulator will be explained below for each of the three types of received PSK waves. (A) In the case of a BPSK demodulator: As mentioned above, there are two types of low-pass p-wave generator 3 and amplitude detection circuit 8, so 4
Combinations of types are possible, but since there is not much difference in the signal processing process for any of the combinations, one combination will be explained as an example. In Figure 2, an integrator is used in the low-frequency lachrymal fluid device 3, and an amplitude detection circuit 8 is used.
The waveforms of each part of the information are shown when the integral detection circuit is used. However, the waveforms indicated by symbols ■ to ■ in Figure 1 are
It is represented by the same symbol in the figure. According to Figures 1 and 2,
The signal processing process from reception to demodulation of BPSK waves will be explained along the signal flow. (1) The signal waveform y of the BPSK wave (is the baseband square wave signal sequence Xi (1==Q, ±1°±2.
), the focus period is T1 carrier angular frequency ω
. Then, it is given by the following equation (1). y(+) = xi CO8GJ, t −・・・・
・(1) However, xJ is 1 for bit [1], bit

Assume that it takes a value of -1 with respect to [0]. In the present invention, since the reference carrier wave is not regenerated, the phase of the reference carrier wave uniquely prepared inside the demodulator and the phase of the carrier wave of the input BPSK wave generally do not match, and a phase difference of φ exists. Therefore, using the phase within the demodulator as a reference, the input BPSK wave is given by the following equation (2). y' (I)=xi cos (ωot+φ)...
(2) In Fig. 2, this phase difference φ is assumed to be 45°. This input BPSK wave y' (0 is ■ in Fig. 2)
The waveform is sampled by the A/D converter 1 and becomes the waveform shown in (2) in the figure, which is input to the complex modulator 2. (11) A digitized reference carrier wave is given to the carrier terminal 2a of the complex modulator 2, and this is complex-modulated. Here, when the frequency of the reference carrier wave matches the carrier wave frequency of the human-powered B P S K wave, the signal waveform Z(t) after complex modulation is given by the following equation (3). Ru. Z(t)=exp(Jωot)・y′(0=x+[co
sωot+j sinωot] cos (ω.t+φ)
...... (3) Note that equation (3) indicates a temporally continuous waveform j'. 〃) In the t-To adjuster shown in Fig. 1, the signal processing is also discrete because it processes digital signals that are discrete in time.
Since there is no essential difference in the signal processing itself even if the waveform is not treated as continuous in time, it is treated as a continuous waveform as far as the expansion of the above equation (3) is concerned. @ in Figure 2 indicates the signal waveform z(1) after complex modulation,
Among them, 2-R represents the real part XIcosωot・c
os(ωo1+φ), and 2-I represents the imaginary part
i Sjnω. - Indicates cos(ω.t+φ). (Ill) Next, the signal Z (t
) is lacrimated through the integrator 3. In this case, by making the integral period τ smaller than the bit period T, the integral waveforms of the real part 3-R and the imaginary part 3-I become the waveforms shown by @ in FIG. The post-tear signal w(+) resulting from this integration is given by the following equation (4), and the carrier frequency component of the input BPSK wave is removed at this stage. w(1)=-Hx+[:cosφ-jsinφ]...
...(4) (1v) To demodulate, it is necessary to remove the phase difference φ component in the above equation (4), (cosφ−j sinφ)(cosφ+j sinφ)
-1... (5) Or (cosφ-j sinφ) (-cosφ-j sinφ
). -1 ・・・・・・(6)
The phase difference φ can be removed by the following complex operation formula. Therefore, if formula (6) is used, the polarity inversion circuit 4 inverts the polarity of only the alphanumeric part, and the delay circuit 5 inverts the polarity of the bit period '
Signal w'(t) with 1 bit removed by delaying r and inverting the polarity of the real part = T X l- is -cosφ-jsin
φ] ·(7) is generated, and this signal ·, v'(+) and the current signal w(t) are multiplied by the complex multiplier 6. formula(
The signal waveforms of the real part 5-R and imaginary part 5-I of the force are as shown in (■) in FIG. Here, the integration result in the current bit and the integration result in the previous bit must coincide in timing for multiplication. In other words, the integration period τ needs to be an integer fraction of the bit period T. ) like this f! , under the conditions:
The complex multiplication result is only the real part 6-R, the phase difference φ also disappears, and T2 v(+) = −−x + −lx+ −=18
) is given by The signal waveform is as shown in (■) in FIG. However, since the complex multiplication result also includes information on the preceding bin (Xl-1), equation (8) alone does not result in demodulation. Therefore, as shown in Table 1, when we summarize the waveform values obtained at each point of ■, ■, and ■ in Figure 1 for all bit combinations of Xl-1 and Xi, we find that at the point of It can be seen that if the old bit is the same as the preceding bit Xl-1, it has negative polarity, and if they are different, it has positive polarity. This means that the current bit can be determined by polarity determination and exclusive logic operations. In the above explanation, the polarity of the real part is inverted by the polarity inverting circuit 4, but even if the polarity of the imaginary part is inverted and complex multiplication based on the above equation (5) is performed, v(+) −+' XI-I XI...
-f9), a signal exhibiting similar properties can be obtained by simply reversing the polarity. (v) In the waveform {circle around (2)} in FIG. 2, there are a plurality of identical pulses in one bit period T, so they are converted to one pulse before bit determination. That is, the signal sequence shown in Figure 2 (■) is input to the clock regeneration circuit 7 to create bit timing with period T as shown in Figure 2 @, and using this bit timing, during period T, the integral detection circuit 8 The signal series shown in Figure 2 (■) is integrated. This integral waveform is shown in Figure 2 (■). Methods for regenerating a clock from a digital signal such as the signal sequence in ■ are already widely known, and include the nonlinear extraction method and the impulse response method ("Applications of Digital Signal Processing" supervised by Nobuo Inoue, Institute of Electronics and Communication Engineers, Japan). Edition P169-P
170). Therefore, the clock recovery circuit 7 can be easily realized by using these methods. (vi) An example of the configuration of the bit determination circuit 9 for the BPS K-wave demodulator is shown in FIG. This bit determination circuit 9 includes a polarity determination circuit 10. It consists of a delay circuit 11 and an exclusive OR circuit 12, and demodulation is performed by inputting the signal from the integral detection circuit 8 shown in FIG. The signal waveforms at the points indicated by alphabetical symbols ``■'' to ``■'' in FIG. 3 are represented by the same symbols in FIG.゛Yet, leading bit xI-1
Table 1 shows waveform values for all combinations of current bit x1 and current bit x1. (vlO The bit judgment circuit 9 in FIG. 3 obtains the final demodulated output by utilizing the feature described above in (1v). In other words, the polarity judgment circuit 10 detects that the signal from the integral detection circuit 8 has positive polarity. In the case of , 61'' (high level) is output, and in the case of negative polarity, 0'' (low level) is output as shown in Figure 2. When the logic circuit 12 calculates the exclusive OR with the output before the bit (■ in Figure 2), the final output is obtained as shown in ■ in Figure 2. As you can see by comparing and ■,
Demodulation is accomplished with a one-bit delay. 4. The above IVI) and (vlQ) describe the bit determination when the input code to the transmitting side modulator is modulated and sent out as is. In such a transmission method, a unique word is A code sequence with a known pattern called `` is inserted at a certain location, and the bits of all other codes are judged based on the demodulation result of this unique word.On the other hand, an operation called differential encoding is performed on the transmitting side. In this transmission method, the current transmission code is the exclusive OR of the current manual code and the transmission code 1 bit before it.Table 2 shows the input codes, This shows the relationship between the previous transmission code and the current transmission code.Table 2 As is clear from Table 2, if the previous and current transmission codes are different from each other, the input code is

[0], and if they match, it becomes [1]. Therefore, if such differential encoding is performed in the transmitting modulator, the raw input code to the transmitting modulator can be determined from the polarity of the output of the amplitude detection circuit 8 itself. In other words, when the output polarity of the amplitude detection circuit 8' is negative, the bit is set to [1], and when the output polarity is positive, the bit is set to [1].

[0] is the code after demodulation (corresponding to the raw human code on the transmitting side). In this case, the third
In the configuration of the bit determination circuit 9 shown in the figure, the delay circuit 11
Thus, the exclusive OR circuit 12 becomes unnecessary. (B) Next, the QPSK wave demodulator will be explained. In the demodulator of this example, an ordinary digital low-pass p-wave filter is used as the low-pass filter 3, and an instantaneous detection circuit is used as the amplitude detection circuit 8. Figure 4 is QPS
The waveforms of various parts of the demodulator for K-wave demodulation are shown, and FIG. 5 shows an example of the configuration of the bit determination circuit. Symbols ■ to ■ in FIG. 4 represent waveforms at points indicated by the same symbols in FIG. Hereinafter, the signal processing process will be explained along the flow of signals using FIG. In (+)QPSK, the baseband square wave signal sequence x
+(t=Q, ±1.±2...) is divided into two streams: P channel and Q channel. P channel series is X21
-□, the Q channel sequence is xzt, the symbol period is T1, and the carrier angular frequency is ω. Then, the signal waveform y(+) of the input QPSK wave is given by the following equation 00). y(I)=x21-I CO8'Ql t + X2
, Slnωot −(10) However, Xj is 1 for bit [1], bit

Assume that it takes a value of -1 with respect to [0]. In the present invention, as described above, the reference carrier wave is not regenerated, so the phase of the reference carrier wave uniquely prepared inside the demodulator and the phase of the carrier wave of the input QPSK wave generally do not match, and a phase difference of φ exists. Therefore, using the phase within the demodulator as a reference, the input QPSK wave is given by the following equation (b). y'(t) = X21-1 cos (ωo1+φ)
10X2. 5in (ωot 1φ)
......(2) In Figure 4, this phase difference is φ=45°
It is assumed that The value of this human-powered QPS' (t) is as shown in ■ in Figure 4, and it is sampled by the A/D converter 1.
1, the waveform becomes the waveform 2 in the same figure, and is input to the complex modulator 2. (11) A digitized reference carrier wave is given to the carrier terminal 2a of the complex modulator 2, and this is complex-modulated by the output of the A/D converter 1. Here, if the frequency of the reference carrier wave matches the carrier frequency of the human-powered QPSK wave, the signal waveform Z (t) after complex modulation is given by the following formula ).t)y'(
+)-(cosωot4-jsinωo 0CXz+-
1cos(ω.t+φ) + x, sin (ωo1
+φ)]...a3 Note that equation (c) indicates a temporally continuous waveform. However, as described above regarding equation (3), in explaining the discrete signal processing of digital signals, it is safe to treat it as a continuous waveform as far as the development of the above equation (to) is concerned. The signal waveform after complex modulation is as shown in Figure 4 ■, of which 2-R is the real part cosω, t [x, , cos (ωo1+φ)
1x2□5in(ω0+φ)], and 2-I is the imaginary part sin ω. t CX2I−, CO8(ω.t +
φ)+X215in(ωo1+φ)] is shown. (il+) Next, the signal Z(1) after complex modulation is sent to the digital low #2P wave generator 3. The tear fluid waveforms of the real part 3-R and imaginary part 3-I become the waveforms shown in FIG. That is, the F-wave output W(t) is given by the following equation α4, and at this stage, the carrier frequency component of the human-powered QPSK wave is removed. w(t) = 4(tx21', cosφ+x21
sinφ)+J t-X21-I Slnφ+x21
CO5φl) -...α→(iv) Next, the component of the phase difference φ is removed from 2α■. That is, the polarity inversion circuit 4 inverts the polarity of only the real part of W (t), and the delay circuit 5 delays the symbol period T to obtain the signal w'(t) one symbol before, with the polarity of the real part inverted. [-(xz(+-1)-1cos
φ+x2 (1-1) sinφ)” J (-x2(
i-t)-1sinφ+X2 (1-1)CO3-)]
・・・・・・66 Create a phrase, this signal w'(+) and the current signal W(t)
is multiplied by the complex multiplier 6. Real part 5-R of formula (to)
The signal waveforms of the imaginary part 5-I and the imaginary part 5-I are as shown in FIG. Here, each sample value in the current symbol and the previous symbol must coincide in timing for multiplication. Therefore, the sampling period needs to be an integer fraction of the symbol period T. The waveform of the complex multiplication result under this condition is as shown in Figure 4 ■, where the phase difference φ disappears and v(')
= −”, (lX2(1-1)−1X21−1 +
X2 (1-1) X211+ J txz(+-t)
-t X21- Xz(+-t) X2l-11)...
...Given by θ gong. Since the complex multiplication result of formula (g) also includes information on the preceding bits, it is not demodulated as it is. Therefore, the waveform values obtained at each point of ■, ■, and ■ for all combinations of the preceding bit and the current bit are summarized as shown in Table 3. Here, it can be seen from Table 3 that there are the following characteristics (1) to (2). However, ■ −B(=
-L), the bits of either the P or Q channel in the current symbol are the same as the bits in the previous symbol. (2) If an output of B (=-!-) is obtained, the bits of both the P and Q channels in the current symbol are the inverted bits of the previous symbol. ■ If the output of
Identical to the bits in the channel. ■ If an output of -jB (=-j-i) is obtained, the P channel bits in the current symbol are the inverted Q channel bits in the previous symbol, and the Q channel bits in the current symbol are The bit of the channel is the inversion of the bit of the P channel in the preceding symbol. Based on the above characteristics (1) to (2), the focus of the current symbol can be determined by comparison with the threshold value. Various logical operations and signal delays. In the explanation of Ov) above, the polarity of the real part is inverted by the polarity inversion circuit 4, but even if the polarity of the imaginary part is inverted, the same properties will be obtained, only the value of B in Table 3 will be different. can get. (■1) In the waveform shown in FIG. 4, there are a plurality of the same pulses in one symbol period T, so they are sampled and converted into one pulse prior to bit determination. That is, the signal sequence shown in Fig. 4 (■) is input to the clock regeneration circuit 7 to generate the symbol timing of period T as shown in Fig. 4 @. The output of the complex multiplier 6 is sampled at an intermediate point. The output waveform of the instantaneous detection circuit 8 is as shown in FIG. 4, where 8-R indicates the real part and 8-I indicates the imaginary part. (Vll) A configuration example of the bit determination circuit 9 for the Q P S K-wave demodulator is shown in FIG. This bit judgment circuit 9
is a circuit that obtains the final demodulated output using the properties of 2■ to ■ above. Four comparators 13 to 16 for determining whether the value is greater than or not. Various logic circuits 17-3
7 and two delay circuits 38 and 39. FIG. 6 shows the time waveform of the signal at the middle point in FIG. 5 when the signal shown in FIG. 4 is input. Note that the symbols of each point in FIG. 5 and the symbols of the waveform in FIG. 6 match. @-1 in Figure 6 is the final demodulated output of the P channel,
It can be seen that -2 is the final demodulated output of the Q channel, and the bits are accurately determined. By comparing FIG. 4 (2), FIG. 6 [present], FIG. 6 (2)=1, and FIG. 6 @-2, it can be seen that demodulation is achieved with a half-symbol delay. (#1 BPSKI7) When differential encoding is performed on the transmitting side as described in the case, the demodulation code can be obtained directly from the output of the amplitude detection circuit 8. Table 4 shows QPS
Differential encoding for K is shown. As is clear from Table 4, the first column in the same table corresponds to item 0 in the previous item fv), the second column corresponds to item ■, the third column corresponds to item ■, and the fourth column corresponds to item ■. are doing. Therefore, most of the logic circuits in the configuration of the bit determination circuit 9 shown in FIG. 5 are unnecessary.Table 4 (C) Next, the offset hQPSK wave demodulator will be explained. In the demodulator of this example, an ordinary digital P-wave generator is used as the low-frequency P-wave generator 3, and an integral detection circuit is used as the amplitude detection circuit 8. FIG. 7 shows an outline of the 0QPSK wave, FIG. 8 shows signal waveforms of various parts of the 0QPSK wave demodulator, and FIG. 9 shows an example of a bit determination circuit. The symbols ■ to ■ in FIG. 8 represent the signal waveforms at the points indicated by the same symbols in FIG. 1, and the symbols ■ to ■ in FIG.
~(k) represents the signal waveform at the same symbol point in FIG. Hereinafter, the signal processing process will be explained along the signal flow using FIG. (1) In OQPSK, as shown in Fig. 7, the baseband square wave signal sequence x+(+=Q, ±1,
±2...) are first divided into two streams, a P channel and a Q channel. Then, both sequences are offset by half of the symbol period T, ie, by 0. After that, the P channel sequence is multiplied by cos ωot, and the Q channel sequence is multiplied by sin ωot, and then added together to output a 0QPSK wave. Therefore, 0Q
Signal waveform of PSK wave In the present invention, as mentioned above, the reference carrier wave is not regenerated, so the phase of the reference carrier wave uniquely prepared inside the demodulator and the phase of the carrier wave of the manual 0QPSK wave generally do not match, and the phase of the carrier wave of the manual 0QPSK wave does not match. There is a difference. Therefore, using the demodulator position a as a reference, the input 0QPSK wave is calculated by the following formula 〇9J, (
In Figure 8, this phase difference is expressed as φ-45
° It is assumed that The 0QPSK wave y(I) in the above equation is as shown in FIG. 1) A digitized reference carrier wave is given to the carrier terminal 2a of the complex modulator 2, and this reference carrier wave is
The output of the /D converter 1 is complex modulated. When the frequency of the reference carrier wave matches the carrier frequency of the input 0QPSK wave, the signal waveform Z(1) after complex modulation is expressed by the following formula aI), <2
It is given by 2+. ....eυ Note that, also here, Equation (2) and (Company) indicate temporally continuous waveforms. However, as mentioned above, in explaining the discrete signal processing of digital signals, the above formula (1) is used. As far as the expansion of (22) is concerned, it can be treated as a continuous waveform. The signal waveform after complex modulation is as shown in FIG. Among them, 2-)ζ represents the alphanumeric part and 2-I represents the imaginary part. (Ill) Next, the output signal Z(1
) is converted into r-wave by the digital door wave device 3. The waveforms of the real part 3-4 and the imaginary part 3-I of the reactor liquid are as shown in FIG. That is, the p-wave output w(t) is expressed by the following equation (c). At this stage, the carrier frequency component of the input 0QPSK wave is removed. (1v) Next, the component of the phase difference φ is removed from the above equations (23) and (24). For example, the polarity inversion circuit 4
By inverting the polarity of only the real part of (t) and then delaying it in the delay circuit 5 whose delay amount is half the symbol period T, the polarity of the real part is inverted ↓ Signal before symbol vv'(t )make. This signal W'(t) and the current signal w(t) are multiplied by the complex multiplier 6, and the real part 6-
Extract only R. W'(t) is given by the following equation i2!5), (26), and its real part 5-R and imaginary part 5-. Each waveform of I is as shown in FIG. Here, since the sample values shifted by half the symbol period are multiplied, the sampling period needs to be an integer divided by half the symbol period. The real part 6-R of the complex multiplication result under this condition has the waveform shown in FIG. 8, and the phase difference φ disappears. Mathematically, it is given by the following equations (27>, (2a). (v) Since the complex multiplication results of equations (27) and (28) also include information on the leading bits, it will not be demodulated as is. However, looking at equation (5), if t is less than 0, the 2 bits of the P channel x2(1-+)-t
A complex multiplication result is related to +x21-1 and the 1-pit fifth table xz(t-t) of the Q channel. Looking at equation t2al, if o < t < -T-, the complex multiplication result is related to 1 bit x2i-1 of the P channel and 2 bits x2(+-+) + X21 of the Q channel. Therefore, if this relationship is summarized for all bit sequences, it will be as shown in Table 5, and 4 (i-
]) -1 or X221-1-1 tealco, it can be seen that the following properties exist. ■ If v(I) is negative, the current bits of the P and Q channels X2i-II X2i are the previous bits of the same channel
Same as 1). ■ v(If 0 is zero, the current bit x2i-1X21 of the P channel and Q channel is the previous bit X2 (+-1)-1r X z(+-+) of the same channel, respectively.
It is the inverted version of . From the properties of (1) and (2) above, it can be seen that the current bit of each channel of P and Q can be determined by polarity determination (or comparison with a threshold value) and exclusive logical operation. However, bit T
The T determination needs to be performed separately for the case -H<t<0 and the case O<t<7. R1 In the above explanation, the polarity of the real part is inverted by the polarity inverting circuit 4, but the same property can be obtained even if the polarity of the imaginary part is inverted. (vl) In the waveform shown in (I) of ■■ in Figure 8, because there are many same pulses in one symbol period T and because they repeat, the pulses are sampled at the timing of Y periods prior to bit determination. I'll keep it. That is, the signal sequence V(ri) shown in FIG. The timing at which the period integration result is output is classified into two types as shown in FIG. 7. One is the timing that coincides with the update timing of the P channel bit sequence, and is referred to here as the P channel timing. The other one is the timing that coincides with the update timing of the bit sequence of the Q channel, and is referred to here as the Q channel timing.For the P channel timing, the equation (integration result of the 2-sand signal) ( +-1) Xz +)
...-(29) is output. Also, at the Q channel timing, the integration result of the signal of formula C2Tl -1(X2!(+-"+) + x2 (1-1)-1
x21-]) -(30) is output. The results of this integration are shown in Figure 8 (■). The bit determination circuit 9 for the fVIOQPSK wave demodulator obtains the final demodulated output by utilizing the properties of ■ and ■ explained in the above section (v). In this case, the configuration of the bit determination circuit 9 is as follows:
It is similar to the BPSK wave demodulated wave phase modulator judgment circuit shown in the figure, and as shown in FIG.
a comparator 40 for comparing with the signal, an exclusive OR circuit 41,
The delay circuit 42 has a delay amount of symbol period T. The output of the comparator 40 is as shown in FIG. 8 (2), and the output of the delay circuit 42 is as shown in FIG. 8 (2). The exclusive OR circuit 41 outputs the output of the comparator 40 and the delay circuit 42.
, Q and the previous bit output of both channels to produce the final output. This final output is as shown in Figure 8 ■,
As can be seen from a comparison with Figure 8 (2), demodulation is achieved with a half-bit delay. 4. When differential encoding is performed on the P channel and Q channel individually on the transmitting side, the same demodulation code as the transmitting side input data can be obtained directly from the output of the amplitude detection circuit 8, similar to the above-mentioned BPSK. I can do it. Although an embodiment in which three types of PSK waves are demodulated by digital processing has been described above, it is also possible to demodulate the received PSK waves by analog processing without analog/digital conversion. An example of analog processing will be explained with reference to FIG. FIG. 11 shows the case where the BPSK wave is generated manually, and the signal waveforms at each point indicated by the symbols ■ to @ in FIG. 10 are represented by the same symbols. In FIG. 10, 43 and 44 are modulators, which constitute a complex modulator. One modulator 43 is a reference carrier source 45
The cosine wave cosωo1 from the input BPSK wave is amplitude-modulated by the input BPSK wave, and the other modulator 44 generates a sine wave sinωo obtained by delaying the cosine wave output of the reference carrier wave source 45 with a 90° phase shifter 46.
1 is amplitude-modulated with the input BPSK wave. Each modulator 43.4
The modulated outputs 43-R and 44-I of the modulators 43 and 43 are as shown in Figure 11 (■), and the output 43-R of one modulator 43 has a real part,
The output 44-■ of the curved blade modulator 44 corresponds to the imaginary part. The output of each modulator = 13, 44 is a low frequency door filter of 47.48
The carrier frequency component is removed, leaving only the component with the phase difference φ, as shown in FIG. At the next stage of the low-frequency r waves @47, 48, a polarity inverting circuit 49 and a delay amount are set to a bit period T in order to obtain the signal of the previous bit (in the case of BPSK demodulation) whose polarity is inverted only in the real or imaginary part. delay circuit 50.
51 are provided. In this example, the polarity of the real part is inverted, and a polarity inverting circuit 49 is connected to the low-frequency P wave generator 47.
are connected. Signal waveforms of this stage 50-R, 51-■
is as shown in Figure 11 @. 4 multipliers 52-5
5, one polarity inversion circuit 56 and two adders 57.5
8 constitutes a complex multiplier, one adder 57 outputs a real part signal 57-R, and the other adder 58 outputs an imaginary part signal 58-■. When a BPSK wave is input, only the real part signal 57-R is obtained, resulting in a waveform shown in FIG. The circuit after this complex multiplier is the first
What is shown in the figure, namely the clock recovery circuit 7. Although it is operationally equivalent to the amplitude detection circuit 8 and the bit determination circuit 9,
As for the clock recovery circuit 7, one based on analog processing, which is generally widely used, is used. The present invention has been explained above along with the embodiments, but the BPSK wave, Q
In both cases of PSK wave and 0QPSK wave, input PSK
Even if the phase relationship between the wave and the demodulator is arbitrary, demodulation can be performed by removing the arbitrariness. In addition, the fact that the phase relationship between the input PSK wave and the demodulator can be arbitrary means that even if there is a frequency difference between the carrier wave of the input PSK wave and the reference carrier wave of the demodulator, the effect of this difference will not accumulate and will not accumulate for at most one symbol (bit ), which means that a certain degree of frequency difference is not a problem. Therefore, according to the present invention, the demodulator only needs to have its own reference carrier wave;
(S) (Compared to the fact that even in a communication system where the fluctuation of the wave carrier wave is relatively small, it is necessary to regenerate the one-wave transmission according to the standard, this has a great effect.

[Brief explanation of the drawing]

The drawings relate to the present invention; FIG. 1 is a block diagram showing the basic configuration of a PSK demodulator with digital processing I14 configuration, and FIG.
Waveform diagrams of various parts in FIGS. 1 and 3 in the case of PSK demodulation, FIG. 3 is a block diagram showing an example of a bit determination circuit for BPSK demodulation, and FIG. 4 is a diagram of the waveforms in FIG. 1 in the case of QPSK demodulation Waveform diagram of each part, Figure 5 is a block diagram showing an example of a QPSK demodulation bit judgment circuit, Figure 6 is a waveform diagram of each part in Figure 5, Figure 7 is a waveform diagram showing an overview of the 0QPSK wave, 8
The figure is a waveform diagram of each part in Figures 1 and 9 in the case of 0QPSK demodulation, Figure 9 is a block diagram showing an example of a bit judgment circuit for 0QPSK demodulation, and Figure 10 is a complex Block diagram showing the analog processing configuration up to the multiplier,
FIG. 11 is a waveform diagram of each part in FIG. 10 in the case of BPSK demodulation. In the drawing, 1 is an A/D converter, 2 is a complex modulator, 2a is a carrier terminal into which a reference carrier wave is input, 3 is a low-frequency P wave generator, 4 is a polarity inversion circuit, 5 is a delay circuit, and 6 is a complex Multiplier, 7 is a clock regeneration circuit, 8 is an amplitude detection circuit, 9 is a bit judgment circuit, 10 is a polarity constant circuit, 11 is a delay circuit, 12 is an exclusive OR circuit, 13 to 16 are comparators, 17 - 37 are logic circuits, 38 and 39 are delay circuits, 40 is a comparator, 41 is an exclusive OR circuit, 42 is a delay circuit, 43 and 44 are analog modulators, 45 is an analog reference carrier wave source, 46 is 90° Phase shifter, 47 and 48 are low-frequency p-wave devices, 49 is a polarity inversion circuit, 50 and 51 are delay circuits, 52 to 55 are analog multipliers, 56 is a polarity inversion circuit, 57 and 58 are analog adders . Patent applicant: Patent attorney representing Kokusai Yakushin Denwa Co., Ltd.
Shibu Mitsuishi (1 other person)

Claims (4)

[Claims] (1) Complex modulate the phase shift modulation wave with a demodulation reference carrier wave that has an arbitrary phase relationship with the reference carrier wave of the input phase shift modulation wave, convert the complex modulation output into a low-frequency p wave, and output a low-frequency door wave. and the low-frequency F-wave output, which is the output of the low-frequency P-wave output a predetermined time ago and has the polarity of the real part or the imaginary part reversed, and the complex multiplication result is the result of the current bit and the preceding bit. A method for demodulating a phase shift keyed wave, characterized in that demodulation is performed by determining bits based on the property that the wave has a specific value depending on the combination. (2) A demodulation method for a phase shift modulation wave according to claim 1, wherein the phase shift modulation wave is a BPSK wave, and the predetermined time is one bit cycle. (3) The demodulation method for a phase-shift keyed wave according to claim 1, wherein the phase-shift keyed wave is a QPSK wave, and the predetermined time is one symbol period. (4) The demodulation method for a phase-shift modulated wave according to claim 1, wherein the phase-shift modulated wave is a 0QPSK wave, and the predetermined time is a Nishinpol period.