JPS59142890U - analog alarm device - Google Patents
analog alarm deviceInfo
- Publication number
- JPS59142890U JPS59142890U JP3537783U JP3537783U JPS59142890U JP S59142890 U JPS59142890 U JP S59142890U JP 3537783 U JP3537783 U JP 3537783U JP 3537783 U JP3537783 U JP 3537783U JP S59142890 U JPS59142890 U JP S59142890U
- Authority
- JP
- Japan
- Prior art keywords
- receiver
- alarm device
- analog
- terminal device
- pulse train
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本願考案者等が提案しているアナログ警報装置
の一例を示したブロック図、第２図は本考案の一実施例
を示した回路ブロック図、第３図は第２図の受信機より
出力されるフレームパルスの一例を示した説明図、第４
図は本考案の他の実施例を示した回路ブロック図である
。
１：受信機、２．３：電源兼用信号線、４． ４ａ。
４ｂ：端末装置、５：アナログセンサ、６：呼出回路、
□７：同期パルス発生器、８：電流検出回路、９
：受信判別回路、１０：タイーミング制御回路、１１：
転極回路、１２ニオアゲート、１３，１４：端子、１５
：端末制御回路、１６． １７． １８：トランジスタ
。
ｌｊ ’Ｊ ＭｊｈＨ＋４Ｇ
（
＋＋Fig. 1 is a block diagram showing an example of an analog alarm device proposed by the inventors of the present invention, Fig. 2 is a circuit block diagram showing an embodiment of the present invention, and Fig. 3 is a receiver of Fig. 2. Explanatory diagram showing an example of a frame pulse output from the machine, Part 4
The figure is a circuit block diagram showing another embodiment of the present invention. 1: Receiver, 2.3: Power supply/signal line, 4. 4a. 4b: terminal device, 5: analog sensor, 6: calling circuit,
□7: Synchronous pulse generator, 8: Current detection circuit, 9
: Reception discrimination circuit, 10: Timing control circuit, 11:
Polarization circuit, 12 Nior gate, 13, 14: terminal, 15
: terminal control circuit, 16. 17. 18: Transistor. lj 'J MjhH+4G ( ++
Claims (1)
末装置を並列接続し、各端末装置には周囲の物理的現象
の変化に応じたアナログ検出信号を出力するアナログセ
ンサを接続し、各端末装置は受信機よりの呼出しに応じ
てアナログ検出信号を複数ビットのディジタル信号に変
換して各ビット毎に順次受信機へ返送するアナログ警報
装置において、 前記受信機は、端末装置を呼出すためのアドレスコード
及び前記デジタル信号を返送するタイミングを与える同
期パルスを含む１フレームのフレームパルス列の出力を
終了する毎に、アドレスコードおよび同期パルスの同一
なフレームパルス列を反転した反転フレームパルス列を
出力するパルス発生手段を設けたことを特徴とするアナ
ログ警報装置。[Claim for Utility Model Registration] A plurality of terminal devices are connected in parallel to a pair of power signal lines drawn out from a receiver, and each terminal device outputs an analog detection signal in response to changes in surrounding physical phenomena. In the analog alarm device, each terminal device converts the analog detection signal into a multi-bit digital signal in response to a call from the receiver, and sequentially returns each bit to the receiver. Each time it finishes outputting a frame pulse train of one frame including an address code for calling a terminal device and a synchronization pulse that gives timing for returning the digital signal, the same frame pulse train of address code and synchronization pulse is inverted. An analog alarm device characterized by being provided with a pulse generating means for outputting an inverted frame pulse train.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3537783U JPS59142890U (en) | 1983-03-11 | 1983-03-11 | analog alarm device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3537783U JPS59142890U (en) | 1983-03-11 | 1983-03-11 | analog alarm device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59142890U true JPS59142890U (en) | 1984-09-25 |
Family
ID=30166076
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3537783U Pending JPS59142890U (en) | 1983-03-11 | 1983-03-11 | analog alarm device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59142890U (en) |
-
1983
- 1983-03-11 JP JP3537783U patent/JPS59142890U/en active Pending
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