JPS59135743A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To improve the flatness of the titled semiconductor device by a method wherein, after a thermal oxide film has been formed on the side face of the groove formed on the semiconductor device, an insulating material is filled in the groove. CONSTITUTION:A polycrystalline silicon film 9 is coated on the whole surface of the semiconductor substrate whereon a groove for insulated isolation layer, and a groove 9 is left on the side face only of the groove by performing an etching on the polycrystalline silicon film 9 using a directional etching method. Then, the polycrystalline silicon film 9 is converted to an SiO2 film 10 by performing a thermal oxidation. An SiO2 film 11 of almost same thickness as the depth of the groove of the SiO2 film 11 is formed by performing a CVD method, and a resist or glass 12 to be used for rotary painting is applied on the film 11 for the purpose of increasing flatness. An etching is performed on the SiO2 film 11 until the surface of an SiN3 film 5 is exposed, the SiN3 film 5 is removed using hot phosphoric acid, and an isolation process is completed. When the thermal oxidation process is performed, no bird's beak is generated, because of the presence of the polycrystalline silicon film 9 on the side face of the groove.

Description

[Detailed description of the invention]

[Field of Application of the Invention] The present invention relates to a semiconductor device and a method for manufacturing the same.7 Specifically, the present invention relates to a semiconductor device and a method for manufacturing the same. The present invention relates to a semiconductor device and its manufacturing method. [Prior Art] A method of forming a groove in a semiconductor substrate and filling the groove with an insulator to isolate semiconductor elements is the conventional selective acid ratio method (L(JcO8 or 15op).
4)'t
This method has very small parasitic capacitance and is suitable for highly integrated and same-speed LSIs. However, when using an insulator such as an oxide film to fill the J/P, an oxide film formed by a CV method other than thermal oxidation (chemical vapor deposition) or sputtering has poor etch resistance. However, there were drawbacks such as holes and unevenness occurring during the photo-etching process after the upper part was flattened.

[In order to avoid this problem, a method of selectively oxidizing the entire thickness of the silicon substrate can be considered, but the iYt ratio progresses laterally and the so-called bird's bead force is generated, and the silicon There was a problem in that crystal defects were likely to occur in the substrate. [Purpose of the invention]

The purpose of the present invention is to eliminate all the drawbacks of the prior art mentioned above,
The flatness is good and crystal defects do not occur. (An object of the present invention is to provide a method for manufacturing a semiconductor device having a silicon insulator aisle. The polycrystalline silicon film formed on
The remaining grooves are completely filled with oxide or polycrystalline silicon by a method such as CVI), which is formed only on the side surfaces of the grooves with high quality oxidation without causing any burrs. . EXAMPLES] The present invention will be described in detail below using examples related to the production of bipolar circuits. Example 1 As shown in FIG. A collector buried layer 2 is provided on the SI epitaxial layer 3 (thickness 0.5 to 1.5 tt), which is the active part of the transistor.
After forming the 5I07 film 4, its surface was acidified.
Then, a 5I3fIl14 film 5 and an Sr (J2 film 6 gold) were formed by the well-known EVL method.Next, grooves were patterned using a photoresist, and the grooves were formed by dry etching. After selectively etching the 5jU2 film 6, SI3N4 film 5.
Using the 8102 film 6 as a mask, SL was etched using the 1.1 sputter etching process, and s! A vertical groove 7 was formed on the substrate 1 by a vertical groove 7 (see Fig. 2).
It is also possible to use S 13 Na fl 5 without adding gold. Here, a collector Ijji,j is installed to prevent the generation of
The impurities were introduced into the bottom of the trench by a total ion implantation method using the double layer 2 and anti-irradiation type impurities. Next, the remaining SIO□ film 6 is removed L,
Using the S 13 N4 film 5 as a mask, an acid film 8 (I!jj, 50 to i 50 nm) is grown on the inner surface of the groove.
Form f/:. (Figure 3). Next, using the CVD method, polycrystalline silicon I+a! 9(
Cover the entire surface with a thickness of 100 to 300 nm l.
((No.41*1).Next, polycrystalline silicon is etched by using directional etching such as anti-irradiation sputter etching.
Etching 17, and only the side of the table is etched with crystals IJ J1
(-7, polycrystalline silicon 7 deposited on the song part)
11 to - were removed by 7. (Figure 5). Next, thermal oxidation was performed to convert the polycrystalline silicon film 9 left on the 11tl1 surface of the trench into 5iO211 and 10 (disaster).
While the polycrystalline silicon film remains, the 81 layer 3 below it
Bird's beaks rarely occur because they are not exposed to acid (Figure 6). Next, a 5iOz film 11 is formed using the CVD method to a depth that is approximately the same as the depth of the monument, and a resist or 5OG (rotary coating glass) 12 is applied on top of it to make it look thicker. This (Figure 7). Next, resist or (dsOG12 and 8102 film 1)
Using a dry etching method with approximately equal etching speeds, Si(
Jzgll'? After etching, five Si3N4 films were removed using hot gold phosphate to complete the isolation process (FIG. 8). Here, the width 13 of the island (width of the active region) is finished according to the dimensions of the bubble mask because there is almost no bird's beak, and there is a medullary length that allows a fine pattern to be formed with high precision. Further, since thick selective oxidation is not performed, there is no possibility that crystal defects will occur in the 81 substrate. When drilling a hole for diffusion or contact in order to make a bu-vis krJ such as a transistor, etc., I! Since there is a thin thermal oxide film 10, as shown in FIG. 9, a mask larger than the island is used to form a 14 pattern, and holes are opened in the 5iU2 film on the surface of the island in a self-aligned manner. It can be done on the 15th. Here, the thickness 16 of the acid film 10 and the mask alignment are important. 1 of the bipolar transistors manufactured using the above method
Figure 10 shows the value of θ. Therefore, the recorder 17 is a diffusion layer for taking out the collector, 1911j hashion film, 1
8 is a base region, 20 is an emitter region, 21 is a base'
1b, pole, 22 is the emitter C (the pole, 23H collector electrode, respectively), and 24 is a shallow groove that separates the base and collector.・Manufacture of a transistor is 1 piece J' iiL: 2 pieces
]. Next, the width of the sea gets shorter/jl-, J! -j,
Although it is a matter of quality, the flatness can be improved by providing a narrow island 25 in a wide γ7I space as shown in FIG. At this time, the maximum allowable value of lJ'l'%i 26 is the depth of az and the co-rotationally inclined substance 12
It is approximately 10 to 20 μm depending on the thickness of the film. In order to reduce the wiring capacitance, the width of the additional island (is desirably less than 2μIII). It was possible to embed the metal layer with acid 1 with good flatness, and the placement of the ridges and valleys was reduced to less than half of that of stool rice.Example 2 A method for completely eliminating the etch will be described below.The steps up to the 81 etching shown in Fig. 2 are the same as in the embodiment.
This bale, remove all the 7 pieces remaining on the entrance surface, and thinly oxidize the surface again to coat the Sr02 film 27 (50-150n).
m) and further K Si3N4 l117.
28 (50-15 Qnor) years old (12th No. 1). Next, apply semi-crystalline -2/recon to all tracks/, -1, then dry coat the direction to leave 29 poly-X active crystal recon on the 1/14 plane (No. 13) figure). Next, after converting all the polycrystalline silicon to 5i (J2 month body 30) using ITl, convert all polycrystalline silicon to 5i (J2 month body 30. ), the origin of the buzzbee is iEt, j, 4 light (141 < 1).
y44 Zl /c scream into the groove, -[V-tan rhi etching rjl, to S+3 of the surrounding area 14Iu Q 1i
ft': 1st isotorion [(j, or completed 7/(-(15th, t1). The rest is the same as in Example 1. In the above example, multiple This buried phase material is not limited to SI (J2 film, eJ, but polycrystalline silicon film, 3 I"shi / oxidation jl outside, p s O < link glass) 11%, B S U
It is preferable to use a (I) film, a lead glass film, etc. FIG. 16 also shows Example 1 in which a polycrystalline silicon embedded tooth was placed in the remaining groove. [-Effects of the Invention] As is clear from the above description, according to the present invention, the occurrence of bending can be effectively prevented, so that the area required for the device can be reduced. Furthermore, since the polycrystalline silicon film on the groove side +ki is preferentially oxidized, the possibility of distortion occurring in the silicon substrate is significantly reduced, and an extremely excellent semiconductor device can be formed.

[Brief explanation of the drawing]

Figures 1 to 11 are process diagrams showing all embodiments of the present invention.
2 to 16 are process diagrams showing other embodiments of the present invention. 1... Silicon substrate, 8... SiO2 film, 9...
Polycrystalline silicon film, 10... S l 02 film, 11.
・・CV L) Acid ratio r1v, 27...5102 membrane, 2
8... SI3N4 film, 29... Polycrystalline silicon film. , 1-- Fig. 1, -, -6 Z Ward No. 4 (21 29 Works 5 Fig. 75 No. 6 (2) 〒 7 (¥) No. 9 Fig. 6 1= S'F-, ,,,,,, 15./4 Funeral 10 Figure 11 Figure 12, Z'7 Figure 13 Figure 14 '4 Figure Is Figure 16

Claims (1)

[Claims] 1. In a device in which a groove formed in a semiconductor substrate is filled with an indispensable substance to provide insulation between elements, the side surface of the groove is thick and has no protrusion toward the upper part. % to have arsenic film
Semiconductor device with special characteristics. 2 A thick oxide film is selectively formed on the side surfaces of the trench.
A method of manufacturing a semiconductor device 16'' in which the semiconductor device 16'' is formed by exposing a polycrystalline silicon film to an acid.