JPS59132114A - Laminated ceramic capacitor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is in the field of ceramic capacitors. ′ Recently, as electronic components have become smaller and thinner, electronic devices equipped with these electronic components, whether for industrial or general consumer use, are becoming increasingly smaller and thinner. The trend is to demand further miniaturization and greater integration of electronic components. Among capacitor components, which are an important element in electronic components, ceramic capacitors with relatively small capacitance are different from the conventional disk shape, but chip capacitors can be made smaller and larger in capacitance by stacking many thinly molded sheets4-. , and demand is currently rapidly expanding. However, even the chip capacitor described above is a single component, and when it is assembled into one electronic device with other electronic components, there is a limit to the integration density of the electronic components. Therefore, recently, capacitor blocks that are a single chip but have a plurality of capacitance values are being proposed. In this case, since it is necessary to configure one circuit part in a certain electric circuit as a block, the capacitance values that should be included in one capacitor chip may vary. On the other hand, when manufacturing an IJR layer capacitor, whether by the sheet method or the Inyu method, conventionally the same material is used and the required number of dielectric layers and internal electrodes are constructed therein, so that the dielectric constant, If the height of the dielectric and the number of dielectric layers are constant, the capacitance value is determined by the size of the area. Therefore, within a limited area, the range of capacitance that can be obtained is limited to a relatively narrow range. That is, if a capacitor with a small capacity is to be formed, the required area becomes extremely small, which causes difficulties in the manufacturing process of the multilayer capacitor. Even when a large capacitance capacitor is required, there is a limit to the shape of the multilayer ceramic capacitor, and it is not possible to obtain a capacitance value greater than the total area of the ceramic capacitor board. Even if a plurality of capacitors are integrated, the integration density will be small.

Purpose of the Invention The present invention aims to solve the limitations and drawbacks of conventional methods, and its purpose is to integrate a large number of capacitors having a wide range of capacitance values into one multilayer ceramic capacitor substrate. It is.

Structure of the Invention The present invention relates to a multilayer ceramic capacitor that is small in size and has a large capacity, which is obtained by laminating multiple layers of dielectric sheets on which internal electrodes are printed and then sintering them at high temperature. Furthermore, the present invention relates to the structure of a Fulti multilayer capacitor in which a plurality of capacitors having independent capacitance values are integrated into one multilayer capacitor chip.

DESCRIPTION OF THE EMBODIMENTS An embodiment of the present invention will be explained with reference to FIGS. 1 to 4 while comparing it with a conventional example. FIG. 1 is a cross-sectional view of a ceramic capacitor according to a conventional example, in which 1 is a dielectric material, 2 is an internal electrode, and 3 is an external terminal electrode that connects in parallel the terminals of the internal electrode 2 exposed on the end face. It is. As is clear from the figure, since the conventional multilayer ceramic capacitor consists of a single dielectric material,
As described above, there is a limit to the capacitance range of each capacitor constructed within the ceramic capacitor chip.

2 to 4 are cross-sectional views of the laminated cellar according to the present invention. FIG. 2 shows that material blocks (a) and (b) having different dielectric constants are sintered together with an intermediate layer 14 made of a mixture of both materials. 4 is made of a ferroelectric material whose main component is barium titanate, and 6, 7, 8, 9, and 10 indicate the structure of the internal electrodes, and all of them are capacitors with relatively large capacitance values. Karanashi, ferroelectric block (a
) are made of a paraelectric material whose main component is titanium oxide, and 11, 12, and 13 respectively indicate the structure of the internal electrodes. This forms a paraelectric block (b).

Next, this embodiment will be explained based on the manufacturing process.

A paste consisting of powder of a ferroelectric material whose main component is barium titanate, an organic substance as a binder, and an organic solvent are mixed in the required amount, mixed for a certain period of time in a ball mill, etc., and then ground to create a viscous slurry.

Similarly, slurries are prepared using a powder of a paraelectric material containing titanium oxide as a main component and a powder of the above-mentioned isostatic compound of barium titanate and titanium oxide. These 3
From the slurry of the ridges, the thickness of the sheet after drying is approximately 10 to 4 mm using a casting machine using the doctor grade method.
Create a 0μ green notebook. Electrodes of the desired shapes are printed on green notebooks made from barium titanate and titanium oxide, and after drying, the desired capacitance is placed in the middle of the group of green notebooks from the isometric compound of barium titanate and titanium oxide. With the help of a green sheet,
The whole is pressurized using a hydraulic press and molded into one piece. Next, after cutting the molded/-t into individual pieces,
By firing at a high temperature of 400° C., the multilayer ceramic capacitor targeted by the present invention can be obtained.

Effects of the Invention Since the present invention has dielectric materials having different dielectric constants in one capacitor substrate, it is possible to combine a very wide range of capacitor groups from large capacitances to small capacitances. For example, in order to obtain a small capacitance capacitor using a material with a high dielectric constant, the area must be extremely small, which brings about design and manufacturing difficulties, but according to the present invention, this can be easily solved. There is.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of a conventional laminated ceramic container/sustainer.
Fig. 2 is a cross-sectional view of the multilayer capacitor of the present invention, Fig. 3 is a plan view of the internal electrodes configured inside the ferroelectric block (,), and Fig. 4 is the inside of the paraelectric block (b). 10 of the internal electrodes configured in ferroelectric block (a
) inside 1st 2nd 21 1: Fig. 3 Fig. 4 1π- -(0) 14-(b) and--A ---A'

Claims (3)

[Claims] (1) A dielectric ceramic material, an organic binder, and a solvent are mixed in a mail mill to form a slurry, which is formed into a thin sheet using a doctor blade, etc., and then internal electrodes printed on it are laminated. Oto1000℃～13
In a dotted multilayer ceramic capacitor obtained by firing at a high temperature of 00°C, the dielectric ceramic material and two
By being composed of materials with different dielectric constants, the multilayer ceramic capacitor has a structure that combines multiple capacitors with different capacitances and dielectric constant losses in one multilayer ceramic capacitor dielectric. Multilayer ceramic capacitor. (2) The dielectric ceramic material has at least one of titanium oxide, magnesium oxide, and calcium oxide as a main component as a ferroelectric material, and the ferroelectric material ~
The multilayer ceramic capacitor according to claim 1, wherein the main components are titanium and barium. (3) A mixture of the paraelectric material layer and the ferroelectric material layer is interposed at the joint between the paraelectric material layer and the ferroelectric material layer. Multilayer ceramic capacitor.