JPS59127412A - Logarithmic compressing and amplifying circuit - Google Patents

Abstract

PURPOSE:To lead out the sum of the outputs of plural differential amplifiers by connecting the inputs of those amplifiers in common, making the amplification degrees of those amplifiers different, and saturating the amplifiers successively according to an input level. CONSTITUTION:When constant current sources are so set that I1<I2<I3, the collector current IC1 of a transistor (TR)Q1 varies from I1/2 to I1 as an input voltage IIN rises, but is saturated when VIN>2VT+RE1.I1. Similarly, the collector current IC5 of a TRQ3 varies from I2/2 to I2 as the input voltage IIN rises, but is saturated when VIN>2VT+RE3.I2. Similarly, the collector current IC5 of a TRQ5 varies from I3/2 to I3, but is saturated when VIN>2VT+RE3.I3. Then, an output voltage VOUT=RL(IC1+IC3+IC5) is led out. Further, VT=KT/q (where K is a Boltzmann's constant, T is temperature, and (q) is an electron unit load).

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a logarithmic compression amplifier, and more specifically, a plurality of differential amplifiers having different amplification degrees are connected in parallel, and the saturation levels of the differential amplifiers are made to differ stepwise. The present invention relates to a logarithmic compression amplifier that saturates sequentially in accordance with the input signal level and extracts the sum of the outputs of the differential amplifiers.

Conventional logarithmic compressors include those that connect two diodes in parallel with different polarities, those that add the outputs of multiple amplifiers using diodes, or those that commonly connect the emitters of multiple transistors to the amplifier feedback circuit. There are methods that utilize the differential voltage between the bases and emitters of a plurality of transistors, and those that utilize the logarithmic characteristics of the base-emitter voltage and collector current. In the former case, there was a drawback that the input/output characteristics and linearity varied widely due to variations in the characteristics of the temperature-sensitive elements, and in the latter case, the disadvantage was that the circuit configuration became complicated. .

The present invention is aimed at eliminating the above-mentioned drawbacks, and is characterized by connecting the inputs of a plurality of differential amplifiers in common, and making the amplification degrees of each of these differential amplifiers different. The present invention provides a logarithmic compression amplifier in which the sum of the outputs of these differential amplifiers is obtained by sequentially saturating these differential amplifiers according to the level.

An embodiment of the present invention shown in the drawings will be described in detail below.

FIG. 1 shows the configuration of a logarithmic compression amplifier according to the present invention, and the illustrated one uses three differential amplifiers as an example. This logarithmic compression amplifier consists of transistors Ql, Q
3. The bases of each of the transistors Q2 . Q4. The bases of each of the transistors Q2Q6 are commonly connected to the second input terminal IN2, the collectors of each of the transistors QIIQ3 and Q5 are commonly connected to the output terminal OUT, and the transistors Q2. Q4. Q
6 are commonly connected to the power supply Vcc,
The emitter of transistor Q1 is connected to constant current source 1 via resistor REI, the emitter of transistor Q2 is also connected to constant current source IN via resistor RE2, and the emitter of transistor Q3 is connected to constant current source IN via resistor REI. Current source I
2 and the emitter of transistor Q4 is connected to resistor RE
The emitter of transistor Q5 is also connected to constant current source 3 via resistor RE5, and transistor Q6. The emitter is also connected to the constant current source 3 via the resistor RE6, and the output terminal is supplied with the power supply Vcc via the load resistor RL.

Now, an input voltage VIN is applied between the first input terminal IN1 and the second input terminal IN2, and the voltage is gradually increased. If the emitter resistances of the respective differential amplifiers are made equal, REI-RE2.几E3=RE4. B
Set E5=RE6, and transistors Ql, Q31Q
Currents IC1, IC3, which flow through the respective collectors of 5
IC5 is expressed by the following formula.

Now, if we set Is < I, < I3, the current IC1 flowing to the collector of the transistor Ql will change to It as the multi-input voltage VIN increases according to equation 0, but VIN = 2VT + RE, ・F1 In the above, the current IC1 flowing to the collector of the transistor Q1 is saturated.Similarly, the current I flowing to the collector of the transistor Q3 is
C3 changes as the input terminal VIN increases according to formula 0.
At RE3.2 or higher, the current IC3 flowing to the collector of the transistor Q3 is saturated. Similarly, the current IC5 flowing to the collector of the transistor Q5 is determined by the input voltage VI according to equation 0.
As N increases, it changes from h to CIa, but when VIN
IN = 2 VT + RE 5 / Transistor Q5 for 3 or more
The current IC5 flowing through the collector of is saturated. Output voltage V
Since it can be expressed as OUT:RL (Ict+Ica+Ics), the relationship between the output voltage Votrr and the input voltage VIN is shown in FIG.

Now, a triangular wave as shown in Fig. 3a is connected to the input terminal pair INI,
When input across IN2, a substantially sinusoidal wave as shown in FIG. 3 is obtained at the output terminal OUT due to logarithmic characteristics as shown in FIG.

As described above, in this invention, the inputs of a plurality of differential amplifiers are connected in common, and the amplification factors of the respective differential amplifiers are made different by the resistors connected to the respective emitters of these transistors. The saturation level of each differential amplifier's constant current source is different, so that the sum of the output currents of these differential amplifiers has a pseudo-logarithmic characteristic with respect to the input signal level. Since the characteristics are determined only by the resistance value inserted into the emitter of each transistor and the constant current source settings, there is little variation in characteristics, and the degree of freedom in changing the logarithmic characteristics is greater than with conventional configurations. Furthermore, since the number of stages can be increased or decreased as necessary, the degree of amplification can be maintained sufficiently, and deviations from logarithmic characteristics can therefore be sufficiently reduced.Furthermore, the circuit configuration can be realized using only transistors and resistors, making it extremely simple. It has certain effects.

[Brief explanation of the drawing]

Figure 1 is a block diagram of the logarithmic compression amplifier circuit, Figures 2 and 3
Figures (a) and (b) are characteristic diagrams for explaining the operation. In the figure, INl, IN2...input terminal pair, OUT...output terminal, Ql~Q6...
...Transistor, R, El~RE6. RL...
...Resistance, ■, ~I, ... Constant current source, +Vc
c...Power supply.

Claims (1)

[Claims] The base of the first transistor becomes the first input terminal, the base of the second transistor becomes the second input terminal, and the emitter of the first transistor and the emitter of the second transistor are each regulated via an emitter resistor. It consists of a plurality of differential amplifiers connected to a current source, the collector of the first transistor is connected to the output terminal, and the collector of the second transistor is connected to the power supply, and the differential amplifiers are sequentially saturated. In addition, the sum output of the output currents flowing to the output terminals of each of the differential amplifiers has pseudo-logarithmic characteristics with respect to the input signal level applied between the first input terminal and the second input terminal. A logarithmic compression amplifier characterized by: