JPS59126396A - Loop back test system - Google Patents

Abstract

PURPOSE:To attain efficiently detection of failure and confirmation of repair by providing additionally a circuit returning test data from an outgoing highway to an incoming highway a specific time slot for test to connect test paths of plural highways in tandem form. CONSTITUTION:A test signal is inserted to a specific time slot of the incoming highway 10 contained in a time division switch 1 by a test signal inserting circuit 20. The test signal is generated by a test circuit 44 and transmitted via a test signal line 40. The test signal inserted in the incoming highway 10 is outputted to the outgoing highway 13 and transmitted to a loop back receiving circuit 50 of the incoming highway 11 from a loop back transmission circuit 51. Further, the test signal is outputted to the outgoing highway 15, transmitted to the loop back circuit 52 of the incoming highway 14 from a loop back transmission circuit 53, and outputted to the outgoing highway 12 via the time division switch 1. Then, the test signal is extracted by a test signal extracting circuit 30 of the outgoing highway 12, returned to a test circuit 44 via a test signal line 41 and the signal is compared with the inserted test signal and verified.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a time-division communication channel testing method that can efficiently detect failures and confirm repairs.

A conventional time-division communication path test method is shown in FIG.

In Fig. 1, 1 is a time division switch, 10.11 is an input highway, 12, 1, ? Outgoing highway, 2 is a test signal insertion unit to the incoming highway, 3 is a test signal extraction unit from the outgoing highway, 20.21 is a test signal insertion circuit to the incoming highway, 30.31 is a test signal from the outgoing highway. Extraction circuit, 4 is time division communication path testing device, 40, 41
, 42 and 43 are test signal lines (1), and 44 is a test circuit for generating the sending test signal and verifying the receiving test signal.

In this test method, a test signal is inserted by a test signal insertion circuit 20 into a specific time slot of the highway 10 accommodated in the time division switch 1. This test signal is generated by the test circuit 44 and is sent to the test signal insertion section 2 via the test signal line 4θ.

The time division switch 1 has a path set in advance for the incoming highway 1o and the outgoing highway for this test time slot, and the test signal inserted on the incoming highway 1o is output to the outgoing highway 12 and tested in the test signal extraction circuit 30. Extract the signal. The extracted test signal is sent back to the test circuit 44 via the test signal line 43 and compared with the inserted test signal to be verified. The time division switch 1 is tested in the same manner between the incoming highway 1 and the outgoing highway 13.

Generally, there are a large number of incoming highways 10° 11 and outgoing highways 12, 13 in the time division switch 1, and therefore there are also many test signal lines 40° (2) 41, 42, 43 in the test. This method has the disadvantage that a large number of signal transmitting and receiving circuits are required at both ends of the signal line.

In order to eliminate such conventional drawbacks, the present invention adds a circuit (hereinafter simply referred to as a loopback) that returns test data from the exit highway to the entrance highway for a specific time slot for testing, and By connecting the test paths in a skewer shape, failure detection and repair confirmation can be performed efficiently, and the amount of testing hardware can be reduced. An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the test method of the present invention, in which 1 is a time division switch, 10° 11.14 is an incoming highway, 12 and 13.15 are outgoing highways, and 20 is an incoming and outgoing highway. 30 is a test signal extraction circuit from the outbound highway, 4 is a time-division communication path testing device, 40.41 is a test signal line, and 44 is a circuit for generating outgoing test signals and verifying received test signals. Test circuit, 50.52
is a loopback signal receiving circuit, and 51.53 is a loopback transmitting circuit.

Next, the test method will be explained. A test signal is inserted by a test signal insertion circuit 20 into a specific time slot of the input highway 10 accommodated in the time division switch 1. This test signal is generated by the test circuit 44 and sent to the test signal insertion circuit 20 via the test signal line 40. The time division switch 1 has been set in advance for this test time slot, the path from the incoming highway 10 to the outgoing highway 13, the nogs for the incoming highway 11 and outgoing highway 15, and the nogs for the incoming highway 14 and outgoing highway 12. The test signal inserted on the input highway 10 is output to the output highway 13 and transmitted from the loopback transmission circuit 51 to the loopback reception circuit 50 of the input highway 11.

Further, this test signal is outputted to the outgoing highway 15, transmitted from the loopback transmission circuit 53 to the loop bank circuit 52 of the incoming highway 14, and outputted to the outgoing highway 12 via the time division switch 1. And exit highway 12
The test signal is extracted by the test signal extraction circuit 30 in the test signal line 4, and is sent back to the test circuit 44 via the test signal line 4, where it is compared with the inserted test signal and verified.

Note that the above-mentioned "connection in a skewer type" refers to a switch connected between the test signal insertion circuit 20 and the test signal extraction circuit 30 from the test signal insertion circuit 20, and a switch connected to the test signal extraction circuit 30. and a loopback transmission circuit 5 connected from the test signal insertion circuit 20 via the switch to the Luno-Gunobu reception circuit 5.
0, and another switch or the test signal extraction circuit 30
A connection that forms a path to the switch connected to the switch.

However, failure points can be easily found in tests using skewed connections of multiple highways using loop banks by changing the path settings of the test time slots in the time division switch 1. That is, by setting the path between the human highway 10 and the exit highway 15 and the path between the entrance highway 14 and the exit highway 12 as shown in FIG. The test signal inserted into the test time slot of the highway 10 by the signal insertion circuit 20 is output to the output highway 15, and is sent to the loopback transmission circuit 53 and the loopback reception circuit 5.
2 to the incoming highway 14, and further output to the outgoing highway 12 via the time division switch l. The test signal extracted by the test signal extraction circuit 3θ on the output highway 12 is verified by comparing it with the test signal inserted in the test circuit 44, which is sent to the test device 4 through the test signal line 41. In addition, faults can be detected and repaired using the same method for each highway. The number of highways connected in a skewed manner is arbitrary, and the present invention is not limited to the three highways shown in the embodiments of FIGS. 2 and 3, but can be applied to any number of highways. However, the number of test signal lines 40 and 41 in the loopback test remains constant regardless of the increase or decrease in the number of highways accommodated by the time division switch 1.

As described above, in this embodiment, fault detection and repair confirmation can be performed efficiently, and the connection with the test equipment is constant regardless of the number of highways, and a small and economical test configuration can be achieved.

As described in detail above, according to the present invention, a loopback circuit is provided with a small amount of test hardware, and test paths with skew-type connections are formed for arbitrary plural highways, thereby making it possible to achieve efficient and economical performance. This method has the effect of making it possible to carry out detailed tests, and can be used as a test method for detecting faults in time-division communication paths and confirming repairs.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional time-division channel test method, FIG. 2 is a block diagram showing an embodiment of the test method of the present invention, and FIG. 3 is a block diagram showing another embodiment. . 1... Time division switch, 2... Test signal insertion section, 3
...Test signal extraction section, 4...Test device, 10.11
゜14...Incoming highway, 12.13.15...Outgoing highway, 20.21...Test signal insertion circuit, 30
゜31...Test signal extraction circuit, 40r 41 + 42
. 43...Test signal line, 44...Test circuit, 50.5
2...Loopback signal receiving circuit, 51.53...
Lucy Back Transmission Circuit, Patent Applicant Oki Electric Industry Co., Ltd. Nippon Telegraph and Telephone Public Corporation NEC Corporation Hitachi, Ltd. Figure 1 Figure 2 Figure 3 Continued from page 1 Applicant Pioneer Co., Ltd. Meguro, Meguro-ku, Tokyo No. 1-4-1 ■Applicant: Fujitsu Limited 1015 Kamiodanaka, Nakahara-ku, Kawasaki City

Claims (1)

[Claims] A loopback test method characterized by having a circuit for backing signals from an outgoing highway to an incoming highway in a time-division communication path, and forming a path connecting multiple highways in a skewed manner.