JPS59125138U - switch device - Google Patents

switch device

Info

Publication number
JPS59125138U
JPS59125138U JP1815083U JP1815083U JPS59125138U JP S59125138 U JPS59125138 U JP S59125138U JP 1815083 U JP1815083 U JP 1815083U JP 1815083 U JP1815083 U JP 1815083U JP S59125138 U JPS59125138 U JP S59125138U
Authority
JP
Japan
Prior art keywords
elements
memory
switch device
switch
memory element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1815083U
Other languages
Japanese (ja)
Inventor
孝一 菅野
本橋 実
Original Assignee
パイオニア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パイオニア株式会社 filed Critical パイオニア株式会社
Priority to JP1815083U priority Critical patent/JPS59125138U/en
Publication of JPS59125138U publication Critical patent/JPS59125138U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第3図は本考案の実施例の回路図、第4図は本
考案の応用例を示す回路図である。主要部分の符号の説
明、 S□〜S3・・・スイッチ素子、FF1〜FF3・・・
フリップフロップ、G□〜G3・・・ゲート、T1.T
2・・・トランジスタ。
1 to 3 are circuit diagrams of an embodiment of the present invention, and FIG. 4 is a circuit diagram showing an application example of the present invention. Explanation of symbols of main parts, S□~S3...Switch elements, FF1~FF3...
Flip-flop, G□~G3...gate, T1. T
2...Transistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数のスイッチ素子と、前記スイッチ素子の各々に対応
して設けられ対応する各スイッチ素子操作毎に応答して
セット及びリセット状態を交互に繰返す複数の記憶素子
と、前記記憶素子の1つがセット状態でかつこのセット
状態の記憶素子以外の記憶素子に対応するスイッチ素子
の1゛つが操作されたことを検出して前記セット状態の
記憶素子をリセットするリセット手段とを含むことを特
徴とするスイッチ装置。
a plurality of switch elements; a plurality of memory elements that are provided corresponding to each of the switch elements and alternately repeat a set and reset state in response to each operation of each corresponding switch element; and one of the memory elements is in a set state. and a reset means for resetting the memory element in the set state by detecting that one of the switch elements corresponding to a memory element other than the memory element in the set state has been operated. .
JP1815083U 1983-02-10 1983-02-10 switch device Pending JPS59125138U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1815083U JPS59125138U (en) 1983-02-10 1983-02-10 switch device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1815083U JPS59125138U (en) 1983-02-10 1983-02-10 switch device

Publications (1)

Publication Number Publication Date
JPS59125138U true JPS59125138U (en) 1984-08-23

Family

ID=30149359

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1815083U Pending JPS59125138U (en) 1983-02-10 1983-02-10 switch device

Country Status (1)

Country Link
JP (1) JPS59125138U (en)

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