JPS59122007A - Manufacture of chip-shaped piezoelectric resonator - Google Patents

Manufacture of chip-shaped piezoelectric resonator

Info

Publication number
JPS59122007A
JPS59122007A JP22941082A JP22941082A JPS59122007A JP S59122007 A JPS59122007 A JP S59122007A JP 22941082 A JP22941082 A JP 22941082A JP 22941082 A JP22941082 A JP 22941082A JP S59122007 A JPS59122007 A JP S59122007A
Authority
JP
Japan
Prior art keywords
plating
base material
piezoelectric substrate
resonator
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP22941082A
Other languages
Japanese (ja)
Other versions
JPH0215131B2 (en
Inventor
Katsumi Fujimoto
克己 藤本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP22941082A priority Critical patent/JPS59122007A/en
Publication of JPS59122007A publication Critical patent/JPS59122007A/en
Publication of JPH0215131B2 publication Critical patent/JPH0215131B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks

Abstract

PURPOSE:To improve the leading-out precision of electrodes and to form numbers of external electrodes of a chip-shaped piezoelectric resonator by adhering insulating plate base material to a piezoelectric substrate base material, and then carrying out a plating treatment and forming plating films at adhesion parts. CONSTITUTION:The insulating plate base materials 55 and 57 are adhered to main surfaces 51a and 51b of the piezoelectric substrate base material 51 with adhesives respectively. Then, the piezoelectric substrate base material and insulating plate base materials 55 and 57 are cut along lines l1, l1- running in the centers of circular holes 53, 53- among plating resist films 54, 54- to form thin long-sized units 58. This long-sized unit 58 is provided with a plating layer (not shown in a figure) by carrying out electroless plating after a pretreatment such as etching, and performing a plating treatment in a charge plating vessel. The unit 58 is cut along lines l2, l2- which run in the centers of said circular holes 53, 53- and cross those plating resist films 54, 54- almost at right angles and dipped in solder to obtain chip-shaped filters.

Description

【発明の詳細な説明】 技術分野 本発明は圧電基板の主面に絶縁板を接着してなるチップ
状圧電共振子の製造方法に関するものであるO 従来技術 従来より、第1図に示すように1.入力端子1゜2と出
力端子3,11間に2組のエネルキーとじこめ型二重モ
ードセラミックフィルり5と(5を結合コンデンサCに
よシ縦続に接続した回路構成1を有するフィルタかあっ
たか、チップ状のフィルりとじて製品化きれたものはな
かった。最近、コンデンサや抵抗はもちろん、コイル部
品や機構部品寸でかチップ化されつつあり、チップ化さ
れた圧電共振部品を要求する声が高まっていた。
DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a method for manufacturing a chip-shaped piezoelectric resonator formed by bonding an insulating plate to the main surface of a piezoelectric substrate. 1. A filter chip having a circuit configuration 1 in which two sets of energy-keyed double-mode ceramic filters 5 and 5 are connected in cascade through a coupling capacitor C between the input terminal 1゜2 and the output terminals 3 and 11. In recent years, not only capacitors and resistors, but also coil parts and mechanical parts have been made into chips, and there has been an increasing demand for piezoelectric resonant parts made into chips. was.

発明の目的 本発明は上述のような背景をもとになされたものであっ
て、その目的は、電極の引出しの信頼性の向上を図ると
ともに大量のチップ状圧電共振子の外部電極を形成する
ことである。
Purpose of the Invention The present invention has been made based on the above-mentioned background, and its purpose is to improve the reliability of electrode extraction and to form external electrodes of a large number of chip-shaped piezoelectric resonators. That's true.

発明の要旨 この/こめ、本発明は、主面に共振子の電極パターンを
連続して複数列形成するとともにその引出型(斯を形成
してなる圧電基板母材」七、これら引出電極に対応する
位置に夫々孔を有するとともに上記孔の間にメツキレシ
スト膜を塗布しだ絶禄板丹(しとを用意し、」二記メツ
キレシスト膜を外側(てして−に記絶縁板画利を夫々圧
電散板母相の上下両主面に上記共振子の振動空間全おい
て接着した後、連続する上記重版パターンを間にしてそ
の両サイドを1171断して長尺ユニットを金嘱メッキ
処理槽に浸?if l〜でメッキ処理した後、共振子の
上記引出電極を通る腺に沿って上記メツキレシストにほ
ぼ直交する方向(で上記長尺ユニットを切断してチップ
状に分離することを特徴としている。
SUMMARY OF THE INVENTION The present invention provides a structure in which a plurality of consecutive rows of resonator electrode patterns are formed on the main surface, and a lead-out type (a piezoelectric substrate base material formed with such a pattern), which is compatible with these lead-out electrodes. Prepare an insulating plate having holes at the respective positions and apply a Metsukiresist film between the holes, place the Metsukiresist film on the outside, and apply the insulation board on each side. After bonding the entire vibration space of the resonator to both the upper and lower principal surfaces of the piezoelectric scattering plate matrix, the long unit was cut at 1171 points on both sides with the continuous overprint pattern in between, and the long unit was placed in a metal plating bath. After plating with ?if l~, the long unit is cut into chips along the gland passing through the extraction electrode of the resonator in a direction (almost perpendicular to the mesh resist) and separated into chips. There is.

なお、実施例の説明に入るまえに、理解を助けるだめに
最初に実施例製法によって得られたチップ状フィルタ単
品について説明する。
Before entering into the description of the examples, a single chip-shaped filter obtained by the manufacturing method of the example will first be described in order to facilitate understanding.

すなわち、本発明に係わるチップ状フィルタは、箸2図
に示すように、一方の主面11aに3端子型のエネルギ
ーとしこめ形二重モードフィルタ5.6の共通電極12
,13.結合コンデン→f Cの一方の電極14、およ
び該電極14の引出電極15.16およびこれらの電1
@を適宜接続する′i程極か、役けられでいるとともに
、端面]IC,jld寄りの縁部分に帯状の電極31.
32が設けられている一方、第3図に示すように、他力
の主面]11)に3 ’AI、:子型フィルタ5および
6の分割型(萌17.18および19.20.結合コン
デンサCの他方の電極21および引出型1i 22 、
23ならびにこれらの電極を適宜接続する電極が形成婆
れてなる圧電基板11と、第4図に示すように、相互に
分離された外部取りつけ″電極24,25および26を
有する絶縁板27と、)4」互に分離きれた外部取りつ
け′電極28および29を有するい−i 一つの絶縁板
30とを有する。上記圧1F基板J1の主面11aおよ
び11bKは夫々上記絶縁板27および30を、3端子
型フイルタ5および6部分に微動空間を残して接着剤で
貼り付けられている。
That is, as shown in FIG. 2, the chip-shaped filter according to the present invention has a common electrode 12 of a three-terminal type energy storage type dual mode filter 5.6 on one main surface 11a.
,13. One electrode 14 of the coupled capacitor → f C, and the extraction electrode 15.16 of this electrode 14 and these electrodes 1
It is useful to connect the terminals as appropriate, and a band-shaped electrode 31.
32, as shown in FIG. The other electrode 21 of the capacitor C and the drawer type 1i 22 ,
a piezoelectric substrate 11 on which electrodes 23 and appropriately connecting these electrodes are formed, and an insulating plate 27 having externally attached electrodes 24, 25 and 26 separated from each other, as shown in FIG. ) 4'' externally mounted electrodes 28 and 29 separated from each other; and one insulating plate 30. The main surfaces 11a and 11bK of the 1F substrate J1 are attached with an adhesive to the insulating plates 27 and 30, respectively, leaving slight movement spaces at the 3-terminal filters 5 and 6.

ソシてフェースボンデンデングできるようにするため、
圧電占(板11の端面11Cとその」ニー下の絶縁板2
7.30の端面にわだり両面ブリッジ電(1?(か設け
られており、同様に圧電n:板11の端面lid側も同
様処理されており、外表にある電極全体に半BBメッキ
がなされている。このような構造および製法により絶縁
板270電極26は切欠き33.34を介して引出電極
15.16に導通する。電極24は引出型(至22に導
通する。電極25は弓旨−凸電1題23に導通する。
To enable face bonding,
Piezoelectric reading (end face 11C of plate 11 and insulating plate 2 below the knee)
7. A double-sided bridge electrode (1?) is provided on the end face of the piezoelectric plate 11, and the end face lid side of the piezoelectric plate 11 is similarly treated, and half BB plating is applied to the entire electrode on the outer surface. With such a structure and manufacturing method, the insulating plate 270 electrode 26 is electrically connected to the extraction electrode 15.16 via the notch 33.34.The electrode 24 is electrically connected to the extraction type (to 22). - Convex electric conduction 1 issue 23.

実施例 以下、本発明で第1図の回路構成を有するチップ状フィ
ルタを得た実施例について説明する。
EXAMPLE Hereinafter, an example in which a chip-shaped filter having the circuit configuration shown in FIG. 1 was obtained using the present invention will be described.

本実施例においては、先ず、第5図に示すように、1つ
の主面51 aに第2図の圧電8(板11の電極パター
ン52,52.・・・を連続して多数列にわたって、印
7刷もしくは蒸着等の手法によって形成する一方、いま
一つの主面51bにも、電極ノククーン52 、52 
、・・に対向して、第3図の圧電コ1(板11の′電極
パターン(第3図参照)を上記と同様に形成した圧電基
板母料51を用意する。
In this embodiment, first, as shown in FIG. 5, the piezoelectric 8 shown in FIG. 2 (electrode patterns 52, 52, . While forming by a method such as printing or vapor deposition, electrode nozzles 52, 52 are also formed on the other main surface 51b.
, . . , a piezoelectric substrate base material 51 is prepared in which the piezoelectric plate 1 (see FIG. 3) of FIG. 3 has an electrode pattern formed in the same manner as described above.

寸だ、圧電基板母料51の上記電極パターン52゜52
、・・・の各引出′電極15.16および型際31.3
2に対向するように、格子点状に円孔53゜53、・・
・を設けるとともに、これら円孔53,53、・・・か
形成する列の間に、はぼ一定巾のメツキレシスト嘆54
,54.・・・を形成した、ガ゛ラスエポキシもしくは
セラミック等からなる絶縁板1]4g’55を用意する
。寸だ、圧電基板母材51のいま一つの(図中下面・籾
上記電極)くクーンの各引出電極22.23に対向する
ように円孔56,56.・・・を設けるとともに、これ
ら円孔55 、56 、・・・カダ形成する列の間に、
はぼ一定巾のメツキレジス)llji%54’(−例と
してメツキレシスト嘆54二本の幅+電(ヤ26の幅を
もつ。)、54’、・・・を形成したいま一つの絶縁板
母材57とを用意する。
The above electrode pattern of the piezoelectric substrate matrix 51 is 52°52
, . . . each lead-out electrode 15.16 and mold edge 31.3.
2, circular holes 53°53,...
In addition, between the rows formed by these circular holes 53, 53, . . .
,54. An insulating plate 1]4g'55 made of glass epoxy, ceramic, etc. is prepared. At the same time, circular holes 56, 56, . . . are provided, and between the rows of circular holes 55, 56, . . .
Another insulating board base material to form a mesh resist with a constant width) llji%54' (-as an example, the width of two metsuki resists + electric (with a width of 26), 54',... Prepare 57.

上記圧電基板は材51の主面51aおよび5]bには、
第2図および第3図の共通電極12,13、分割成極1
7,18および19 、201D上下頂うに、その部分
の振動を許容する空間(図示せず。
The piezoelectric substrate has main surfaces 51a and 5]b of the material 51,
Common electrodes 12, 13, divided polarization 1 in Figures 2 and 3
7, 18 and 19, and spaces (not shown) at the top and bottom of 201D to allow vibration of those parts.

)が残るよう接着剤の塗布部分および厚みを考慮して、
上記絶縁板母材55および57を夫々接着剤で接ISす
る。
), considering the adhesive application area and thickness, so that
The above-mentioned insulating plate base materials 55 and 57 are bonded with adhesive, respectively.

その後、−1−記メツキレジスト膜54.54.・・・
の間に位置する円孔53,53.・・・の中心を−っお
きに〕mる線β1.dt、・・・に沿って、圧電基板母
4J’51.絶縁基板母利55および57を切断し、第
6図に示すような細長の長尺ユニット58を形成する。
Thereafter, -1- plating resist film 54.54. ...
Circular holes 53, 53. Line β1. dt, . . . along the piezoelectric substrate mother 4J'51. The insulating substrates 55 and 57 are cut to form a long and narrow unit 58 as shown in FIG.

この長尺ユニット58は、エツチングもしくは活性化等
の前処理の後、無電解メッキ(バレルメッキ法)を施し
、必要に応じ膜厚を厚くするために電界メッキ槽中にて
メッキ処理してメッキ層(図示せず。)を形成する。
After pretreatment such as etching or activation, this long unit 58 is subjected to electroless plating (barrel plating method) and, if necessary, plated in an electrolytic plating bath to increase the film thickness. forming a layer (not shown).

次いで、第6図に示すように、上記長尺ユニット58の
メンキレジスト54.54の間の円孔53.53.・・
・の中心を通ってこれらメンキレジスト54.54とほ
ぼ直交する線12 、12 、・・・に沿って、上記長
尺ユニット58を切断して半田ディツプすれば、第7図
に示すように、第4図と全く同一の構成を有するチップ
状フィルタ59を得る。
Next, as shown in FIG. 6, circular holes 53, 53, .・・・
If the elongated unit 58 is cut and soldered along lines 12, 12, . A chip filter 59 having exactly the same configuration as in FIG. 4 is obtained.

メンキレジスト& 54 、547は除去してもよいし
残しておいてもよい。
The Menki resist &54, 547 may be removed or may be left.

」二記チップ状フィルタ59ば、圧電散板画材51と絶
縁板母材55および57との接着剤による接着後のメッ
キ処理により、電極24,25,26.28および29
が形成され、電極24は電極31に、電(ゲ25は電極
32に、電極26は引出″電極15等に夫々導通し、壕
だ、電極28は電極22に、電極29は電極23に夫々
導通ずる。さらに、上記電極31と引出型1122、お
よび重臣32と引出電極23は上記メッキ処理時に形成
されるメッキ層によシ相互に導通される。
In the chip-shaped filter 59, the electrodes 24, 25, 26, 28 and 29 are formed by plating after bonding the piezoelectric scattering plate art material 51 and the insulating plate base materials 55 and 57 with adhesive.
are formed, the electrode 24 is connected to the electrode 31, the electrode 25 is connected to the electrode 32, the electrode 26 is connected to the lead-out electrode 15, etc., the electrode 28 is connected to the electrode 22, and the electrode 29 is connected to the electrode 23. Further, the electrode 31 and the drawer mold 1122, and the senior minister 32 and the drawer electrode 23 are electrically connected to each other through the plating layer formed during the plating process.

上記のようにすれば、メッキ処理1?jJに第6図の絶
縁板母材55および57の円孔!53.53.・・・お
よび56.56.・・内に接着剤か滲み出していても、
長尺ユニット58のメッキ処理の前に、エツチングや活
性化等のメッキの前処理を行うときのエツチング剤や活
性剤全選択することによって、メッキ処理を完全なもの
とすることかでき、上記導通を完全なものとすることが
できる。
If you do the above, plating process 1? Round holes in the insulating plate base materials 55 and 57 in Fig. 6 in jJ! 53.53. ...and 56.56. ...Even if there is adhesive seeping inside,
Before plating the long unit 58, by selecting all the etching agents and activators used in plating pre-treatments such as etching and activation, the plating treatment can be completed, and the conductivity described above can be achieved. can be made complete.

なお、上記実施例において、半田くゎれを防ぐため、メ
ッキ処理によって形成するメッキ層は、ニッケル(Ni
)と銅(Cu) 等の多層メッキ層とすることが好貰し
い。
In the above embodiment, the plating layer formed by plating is made of nickel (Ni
) and copper (Cu), etc., is preferable.

−また、上記実施例において、絶縁板母材57は絶縁母
料56と同一のものを使用することもできる。
- Furthermore, in the above embodiment, the insulating plate base material 57 may be the same as the insulating base material 56.

本発明は、上記実施例において説明したようなエネルギ
ー閉じ込め形のフィルタの1屯に、二端子+1<あるい
は三端子形の同様な発振子、FMディスクリミネータ用
共振子等の圧電共振子や表面波利用部品に広く適用する
ことができる。
The present invention provides a piezoelectric resonator such as a similar two-terminal +1< or three-terminal oscillator, a resonator for an FM discriminator, etc. It can be widely applied to wave-utilizing parts.

発明の効果 以上、詳述したことからも明らかなように、本発明は、
圧電基板の両主面に夫々絶縁板を夫々接着してなるチッ
プ状圧電共振子の製造方法において、圧電基板母相に絶
縁板母材を接着した後、メッキ処理するようにしだから
、接着剤部分にもメッキ膜が形成され、電極の引出しの
信頼性が大巾に向上するばかりでなく、一度のメッキ工
程で大量の圧電共振子に外部′電極を形成することがで
き、圧′市共4辰子の製岸エコストを大巾に引き下げる
ことができる。また、圧電基板と絶縁板との境界部はメ
ッキ層で完全に封出されるので、接着はがれが減少し、
また、圧電共振子内部への湿気、ガス等の侵入か完全に
防止される。
Effects of the Invention As is clear from the detailed explanation, the present invention has the following effects:
In a method for manufacturing a chip-shaped piezoelectric resonator in which insulating plates are bonded to both main surfaces of a piezoelectric substrate, the insulating plate base material is bonded to the piezoelectric substrate matrix and then plated, so that the adhesive portion A plating film is formed on the piezoelectric resonators, which not only greatly improves the reliability of electrode extraction, but also enables the formation of external electrodes on a large number of piezoelectric resonators in a single plating process, which reduces the Tatsuko's bank eco-cost can be reduced by a large amount. In addition, since the boundary between the piezoelectric substrate and the insulating plate is completely sealed with a plating layer, adhesive peeling is reduced.
In addition, moisture, gas, etc. are completely prevented from entering the piezoelectric resonator.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は結合コンデンサで3端子型フイルタを縦続に接
続したフィルタの回路図、第2図および第3図は夫々第
1図のフィルタの圧電基板の両主面に夫々形成される電
(ヴパターンの説明図、第4図・は第2図および第3図
の電極パターンを有する圧電基板を使用したチップ状フ
ィルタの分解斜視図、第5図、6図および第7図は夫々
本発明に係るチップ状圧電共振子の製造方法を適用した
チップ状フィルタの製造方法の一実施例の説明図である
。 51 ・−・圧電基板IBjFA’(51a、51b=
主面)、52・・・電極パターン、53・・・円孔、5
4・・・メツキレシスト膜、55・・・絶縁板母材、5
6・・・円孔、57・・・絶縁板母材。 第1図 第2図 1 第4図 7 第7図
Figure 1 is a circuit diagram of a filter in which three-terminal filters are connected in cascade using a coupling capacitor, and Figures 2 and 3 are electrical patterns formed on both main surfaces of the piezoelectric substrate of the filter in Figure 1. 4 is an exploded perspective view of a chip-shaped filter using a piezoelectric substrate having the electrode pattern of FIGS. 2 and 3, and FIGS. 5, 6, and 7 are according to the present invention, respectively. It is an explanatory diagram of an example of a method of manufacturing a chip-shaped filter to which a method of manufacturing a chip-shaped piezoelectric resonator is applied. 51 --- Piezoelectric substrate IBjFA' (51a, 51b=
main surface), 52... electrode pattern, 53... circular hole, 5
4... Metsuki resist film, 55... Insulating plate base material, 5
6...Circular hole, 57...Insulating plate base material. Figure 1 Figure 2 Figure 1 Figure 4 7 Figure 7

Claims (1)

【特許請求の範囲】 (月 主面に共振子の電(”、jパターンを連続して複
数列形成するとともにその引出電極を形成してなる圧電
基板母材と、これら引出電極に対応する位置に夫々孔を
有するとともに上記孔の間にメッキ板 レジスト嘆を塗布した絶縁思料とを用意し、上記△ メツキレシスト膜を外側にして上記絶縁板母相を夫々圧
電基板母材の上下両主面に上記共振子の振ω〕空間をお
いて接着した後、連続する上記1パターンを間にしてそ
の両サイドを切断して長尺ユニットに分離ニジ、この長
尺ユニットを金属メッキ処理槽に浸漬してメッキ処理し
た後、共振子の上記引出電極を通る腺に沿い上記メツキ
レジスI・にほぼ直交する方向に上記長尺ユニットを切
断してチップ状に分離することを特徴とするチップ状圧
電共振子の製造方法。
[Claims] (A piezoelectric substrate base material in which a plurality of consecutive rows of resonator patterns are formed on the main surface and extraction electrodes thereof are formed, and positions corresponding to these extraction electrodes. An insulating material having holes in each of the holes and a plating plate resist coated between the holes is prepared, and the insulating plate matrix is applied to both the upper and lower main surfaces of the piezoelectric substrate base material with the △ metal resist film on the outside. Vibration of the resonator ω] After gluing with a space in between, cut both sides of the continuous pattern in between to separate it into a long unit, and immerse this long unit in a metal plating bath. A chip-shaped piezoelectric resonator characterized in that the elongated unit is separated into chips by cutting the elongated unit in a direction substantially orthogonal to the plating resist I along the gland passing through the extraction electrode of the resonator and then plating the resonator. manufacturing method.
JP22941082A 1982-12-27 1982-12-27 Manufacture of chip-shaped piezoelectric resonator Granted JPS59122007A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22941082A JPS59122007A (en) 1982-12-27 1982-12-27 Manufacture of chip-shaped piezoelectric resonator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22941082A JPS59122007A (en) 1982-12-27 1982-12-27 Manufacture of chip-shaped piezoelectric resonator

Publications (2)

Publication Number Publication Date
JPS59122007A true JPS59122007A (en) 1984-07-14
JPH0215131B2 JPH0215131B2 (en) 1990-04-11

Family

ID=16891777

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22941082A Granted JPS59122007A (en) 1982-12-27 1982-12-27 Manufacture of chip-shaped piezoelectric resonator

Country Status (1)

Country Link
JP (1) JPS59122007A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0394508A (en) * 1989-09-06 1991-04-19 Murata Mfg Co Ltd Frequency adjustment method for piezoelectric component

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06319819A (en) * 1991-06-11 1994-11-22 Raifu Advance Japan:Kk Health/beauty implement
JPH05305148A (en) * 1992-05-07 1993-11-19 Akiko Toyama Far-infrared roller health apparatus
JPH0650640U (en) * 1992-12-21 1994-07-12 茂 石橋 Electric vibration roller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0394508A (en) * 1989-09-06 1991-04-19 Murata Mfg Co Ltd Frequency adjustment method for piezoelectric component

Also Published As

Publication number Publication date
JPH0215131B2 (en) 1990-04-11

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