JPH0155609B2 - - Google Patents

Info

Publication number
JPH0155609B2
JPH0155609B2 JP18887882A JP18887882A JPH0155609B2 JP H0155609 B2 JPH0155609 B2 JP H0155609B2 JP 18887882 A JP18887882 A JP 18887882A JP 18887882 A JP18887882 A JP 18887882A JP H0155609 B2 JPH0155609 B2 JP H0155609B2
Authority
JP
Japan
Prior art keywords
plate
piezoelectric
shaped
electrode
insulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP18887882A
Other languages
Japanese (ja)
Other versions
JPS5977715A (en
Inventor
Isao Toyoshima
Jiro Inoe
Katsumi Fujimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP18887882A priority Critical patent/JPS5977715A/en
Publication of JPS5977715A publication Critical patent/JPS5977715A/en
Publication of JPH0155609B2 publication Critical patent/JPH0155609B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/10Mounting in enclosures
    • H03H9/1007Mounting in enclosures for bulk acoustic wave [BAW] devices
    • H03H9/1035Mounting in enclosures for bulk acoustic wave [BAW] devices the enclosure being defined by two sealing substrates sandwiching the piezoelectric layer of the BAW device
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/10Mounting in enclosures
    • H03H9/1064Mounting in enclosures for surface acoustic wave [SAW] devices
    • H03H9/1092Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a cover cap mounted on an element forming part of the surface acoustic wave [SAW] device on the side of the IDT's

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、板状の絶縁物により圧電振動ユニツ
トを挟持するように積層した構造を備えるチツプ
状圧電振動部品に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a chip-shaped piezoelectric vibrating component having a structure in which a piezoelectric vibrating unit is laminated so as to sandwich a piezoelectric vibrating unit between plate-shaped insulators.

〔従来の技術〕[Conventional technology]

従来より、共振子、発振子、フイルタ、FMデ
イスクリミネータ等の圧電振動部品では、圧電振
動ユニツトの使用振動モードの特徴により、種々
の構造のものが知られている。
Conventionally, piezoelectric vibrating components such as resonators, oscillators, filters, and FM discriminators have been known to have various structures depending on the characteristics of the vibration mode in which the piezoelectric vibrating unit is used.

例えば、比較的周波数が低い数百KHzの周波数
帯のセラミツクフイルタでは、樹脂等を箱体状に
成形した外装ケース内に圧電振動ユニツトを収容
したケースタイプのものが用いられており、周波
数が高い数MHzから数十MHzの周波数帯のセラミ
ツクフイルタでは、エネルギ閉込め形圧電振動ユ
ニツトの振動区域を除いた区域に外装樹脂を付着
させたいわゆるデイツプ塗装形状のものが用いら
れており、あるいは表面波素子ではデイツプ塗装
形状のものもしくはハーメチツクシールドケース
を有するものが一般的に知られている。もつと
も、これらの圧電振動部品は、何れもリード端子
を有する誘電端子付の構造のものである。
For example, ceramic filters with a relatively low frequency band of several hundred kilohertz use a case-type filter in which a piezoelectric vibrating unit is housed in an outer case made of resin or the like into a box shape. Ceramic filters for the frequency band from several MHz to several tens of MHz are of the so-called dip coating type, in which exterior resin is adhered to the area other than the vibration area of the energy confinement type piezoelectric vibration unit, or surface wave Elements that are dip-coated or have a hermetic shield case are generally known. However, all of these piezoelectric vibrating components have a structure with a dielectric terminal having a lead terminal.

〔発明が解決しようとする技術的課題〕[Technical problem to be solved by the invention]

近年、電子機器の小型化に伴い、電子部品の実
装密度を高めるための種々の工夫がされている。
しかしながら、上記のようなリード端子付の圧電
振動部品では、基本的に、圧電振動ユニツトを外
装部材で被覆し、該外装部材から複数本のリード
端子を突出させた構造を有するため、形状が大き
くなり、実装密度が低くなるという欠点があつ
た。
In recent years, with the miniaturization of electronic devices, various efforts have been made to increase the packaging density of electronic components.
However, the above-mentioned piezoelectric vibrating components with lead terminals basically have a structure in which the piezoelectric vibrating unit is covered with an exterior member and multiple lead terminals protrude from the exterior member, so the shape is large. However, the disadvantage was that the packaging density was low.

他方、実装作業の能率を高めかつ実装密度を高
めるために、種々の電子部品においてリードレス
タイプのチツプ形の構造とすることが望まれてい
る。しかしながら、圧電基板の両主面に励振電極
を有し、該圧電基板の両主面において外部に電気
的に引出す必要のある形式の圧電振動部品では、
フエースボンデイング可能なチツプ部品とするこ
とが困難であつた。
On the other hand, in order to improve the efficiency of mounting work and increase the packaging density, it is desired that various electronic components have leadless chip-shaped structures. However, in a type of piezoelectric vibrating component that has excitation electrodes on both main surfaces of a piezoelectric substrate and needs to be electrically extracted to the outside on both main surfaces of the piezoelectric substrate,
It has been difficult to make chip parts that can be face bonded.

よつて、本発明の目的は、両主面に外部に引出
すべき励振電極を有する圧電振動ユニツトを用い
た圧電振動部品において、実装作業を容易としか
つ実装密度の改善を図り得るものを提供すること
にある。
Therefore, an object of the present invention is to provide a piezoelectric vibrating component using a piezoelectric vibrating unit having excitation electrodes to be drawn out to the outside on both principal surfaces, which can facilitate mounting work and improve packaging density. It is in.

〔技術的課題を解決するための手段〕[Means for solving technical problems]

本発明のチツプ状圧電振動部品では、板状の絶
縁物の少なくとも2箇所に切欠部が設けられてお
り、これら切欠部の絶縁物の厚み方向壁面にそれ
ぞれ導電膜が形成されており、該絶縁物で圧電振
動ユニツトが挟持するように積層された構造を少
なくとも有する。圧電振動ユニツトの引出し電極
は、上記絶縁物に設けられた導電膜に電気的に接
続されている。
In the chip-shaped piezoelectric vibrating component of the present invention, notches are provided in at least two places in a plate-shaped insulator, and a conductive film is formed on each wall surface in the thickness direction of the insulator in these notches. It has at least a structure in which the piezoelectric vibrating unit is sandwiched between two objects. The lead electrode of the piezoelectric vibration unit is electrically connected to a conductive film provided on the insulator.

上記圧電振動ユニツトは、圧電基板の表裏面に
一対の励振電極を設けた構造を有する。そして、
圧電基板の一方面側の励振電極が、チツプ状圧電
振動部品の側面に設けられた電極膜を介して、該
圧電基板の他方面側に配置された板状の絶縁物の
導電膜に電気的に接続されている。
The piezoelectric vibration unit has a structure in which a pair of excitation electrodes are provided on the front and back surfaces of a piezoelectric substrate. and,
The excitation electrode on one side of the piezoelectric substrate electrically connects the conductive film of the plate-shaped insulator placed on the other side of the piezoelectric substrate via the electrode film provided on the side surface of the chip-shaped piezoelectric vibrating component. It is connected to the.

〔作 用〕[Effect]

圧電基板の一方面側に設けられた励振電極が、
振動部品の側面に設けられた電極膜を介して圧電
基板の他方面側に配置された絶縁物の導電膜に接
続されている構成を有するので、圧電基板の他方
面側に設けられた励振電極と、圧電基板の他方面
側に配置された絶縁物の導電膜とを利用して、プ
リント基板等の実装部分にフエースボンデイング
により実装することができる。従つて、実装作業
が容易とされ、またリードレスタイプのチツプ部
品であるため、実装密度を効果的に高めることが
可能とされている。
The excitation electrode provided on one side of the piezoelectric substrate is
Since it has a configuration in which it is connected to a conductive film of an insulator arranged on the other side of the piezoelectric substrate through an electrode film provided on the side surface of the vibrating component, the excitation electrode provided on the other side of the piezoelectric substrate It can be mounted on a mounting portion of a printed circuit board or the like by face bonding using the conductive film of an insulating material disposed on the other side of the piezoelectric substrate. Therefore, the mounting work is easy, and since it is a leadless type chip component, it is possible to effectively increase the mounting density.

〔実施例の説明〕[Explanation of Examples]

以下、図面を参照しつつ、本発明の一実施例を
説明する。
Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

まず、第1図及び第2図を参照して、本実施例
の圧電振動部品に用いられる圧電振動ユニツトの
構造を説明する。
First, the structure of the piezoelectric vibrating unit used in the piezoelectric vibrating component of this embodiment will be explained with reference to FIGS. 1 and 2.

第1図を参照して圧電セラミツク基板101の
一方表面には、図示のような電極が形成されてい
る。すなわち、第1のエネルギ閉込め形圧電セラ
ミツクフイルタ素子部分102を構成するように
励振電極102a,102bが、第2のエネルギ
閉込め形圧電セラミツクフイルタ素子部分103
を構成するように励振電極103a,103bが
形成されている。なお、104,105は引出し
電極を、106はコンデンサを構成するための電
極を示す。
Referring to FIG. 1, an electrode as shown is formed on one surface of a piezoelectric ceramic substrate 101. As shown in FIG. That is, the excitation electrodes 102a and 102b constitute the first energy confinement type piezoelectric ceramic filter element part 102, and the excitation electrodes 102a and 102b constitute the second energy confinement type piezoelectric ceramic filter element part 103.
Excitation electrodes 103a and 103b are formed to constitute. Note that 104 and 105 are extraction electrodes, and 106 is an electrode for forming a capacitor.

他方、圧電セラミツク板101の下方表面に
は、第2図に示すように各電極が形成されてい
る。すなわち、第1、第2の圧電セラミツクフイ
ルタ素子部分を構成するための励振電極102
c,103c、コンデンサを構成するためのコン
デンサ電極106、並びに引出し電極107,1
08が形成されている。
On the other hand, on the lower surface of the piezoelectric ceramic plate 101, electrodes are formed as shown in FIG. That is, the excitation electrode 102 for forming the first and second piezoelectric ceramic filter element parts
c, 103c, capacitor electrode 106 for forming a capacitor, and extraction electrode 107, 1
08 is formed.

上記圧電振動ユニツトの回路構成を、第3図に
回路図で示す。
The circuit configuration of the piezoelectric vibrating unit is shown in a circuit diagram in FIG.

本実施例の圧電振動部品では、上述した圧電振
動ユニツトの上面に、第4図及び第5図に示す第
1の板状絶縁物109が接着剤を介して積層され
る。この板状絶縁物109は、プリント基板、ス
ルーホールメツキ基板としてよく用いられるガラ
スエポキシ基板等の合成樹脂やアルミナ等のセラ
ミツクスからなる。
In the piezoelectric vibrating component of this embodiment, a first plate-shaped insulator 109 shown in FIGS. 4 and 5 is laminated on the upper surface of the piezoelectric vibrating unit described above via an adhesive. This plate-shaped insulator 109 is made of a synthetic resin such as a glass epoxy board often used as a printed circuit board or a through-hole plated board, or a ceramic such as alumina.

板状絶縁物109には、コーナ部分に切欠部1
10a〜110dが、長辺側中央部分に半円状の
切欠部110e,110fが形成されている。そ
して、これらの切欠部110a〜110fの厚み
方向の壁面及び板状絶縁物109の切欠部110
a〜110f近傍の両主表面上に渡る導電膜11
1〜114が形成されている。
The plate-shaped insulator 109 has a notch 1 at the corner.
10a to 110d, semicircular notches 110e and 110f are formed in the central portions of the longer sides. The wall surfaces in the thickness direction of these notches 110a to 110f and the notch 110 of the plate-shaped insulator 109
Conductive film 11 extending over both main surfaces near a to 110f
1 to 114 are formed.

導電膜111は、板状絶縁物109の上面すな
わち圧電セラミツク基板101と対向しない側の
外側表面において、切欠部110a,110b部
分に設けられた導電膜を連続的に形成したもので
あり、同様に導電膜112は切欠部110c,1
10d部分の導電膜を連続的に形成したものであ
る。この点において、通常のスルーホール電極形
成技術により形成された導電膜113,114と
異なる。
The conductive film 111 is formed by continuously forming a conductive film provided in the notches 110a and 110b on the upper surface of the plate-shaped insulator 109, that is, on the outer surface not facing the piezoelectric ceramic substrate 101. The conductive film 112 has notches 110c, 1
The conductive film of the 10d portion is continuously formed. In this point, the conductive films 113 and 114 are different from those formed by ordinary through-hole electrode formation techniques.

圧電セラミツク基板109の下面側にも、同様
の切欠部110a〜110fが形成された第2の
板状絶縁物(第6図に下方表面から見た図のみを
示す)が接着剤を介して貼付けられる。この第2
の板状絶縁物においても、切欠部110a〜11
0fの厚み方向壁面及び絶縁物の両主表面に切欠
部近傍に渡る導電膜111〜114が形成されて
いる。もつとも、第2の板状絶縁物の下面の電極
形状は、第6図に示すとおりとなつている。すな
わち、第4図に示した導電膜111,112と同
一の導電膜111,112が切欠部110a,1
10bまたは切欠部110c,110dの壁面に
形成された導電膜と連続するように形成されてお
り、かつ中央の切欠部110e,110fの壁面
に形成された導電膜を連続するように導電膜11
6が下面中央領域に付与されている。
A second plate-shaped insulator (FIG. 6 shows only the view from the lower surface) in which similar notches 110a to 110f are formed is also attached to the lower surface side of the piezoelectric ceramic substrate 109 via adhesive. It will be done. This second
Also in the plate-shaped insulator, the notches 110a to 11
Conductive films 111 to 114 extending near the notch are formed on both the main surfaces of the insulator and the wall surface in the thickness direction of 0f. However, the shape of the electrode on the lower surface of the second plate-like insulator is as shown in FIG. That is, the same conductive films 111 and 112 as shown in FIG.
The conductive film 11 is formed so as to be continuous with the conductive film formed on the wall surface of the central notch portion 10b or the notch portions 110c and 110d, and to be continuous with the conductive film formed on the wall surface of the central notch portion 110e and 110f.
6 is given to the lower center area.

なお、第2の板状絶縁物115の上面側、すな
わち圧電セラミツク基板101に対向する側は、
第1の板状絶縁物109の下面(第5図に示した
電極形状)と同様とされているため、その図示は
省略する。
Note that the upper surface side of the second plate-shaped insulator 115, that is, the side facing the piezoelectric ceramic substrate 101,
Since it is the same as the lower surface of the first plate-shaped insulator 109 (the electrode shape shown in FIG. 5), its illustration is omitted.

なお、板状絶縁物109は、板状絶縁物115
と同一の電極形状を有するように構成してもよ
い。
Note that the plate-shaped insulator 109 is the same as the plate-shaped insulator 115.
It may be configured to have the same electrode shape.

第7図は上記の圧電セラミツク基板101、第
1、第2の板状絶縁物109,115を貼合わせ
た状態を示す。板状絶縁物109,115は、接
着剤118を介して圧電セラミツク基板101の
上面及び下面にそれぞれ接着されている。このと
き、振動を阻害しないための空隙が、振動領域上
に生じるように、接着剤118の厚み及び塗布範
囲を定めておく必要がある。
FIG. 7 shows the piezoelectric ceramic substrate 101 and the first and second plate-shaped insulators 109 and 115 bonded together. The plate-shaped insulators 109 and 115 are bonded to the top and bottom surfaces of the piezoelectric ceramic substrate 101 via an adhesive 118, respectively. At this time, it is necessary to determine the thickness and application range of the adhesive 118 so that a gap is created over the vibration area so as not to inhibit the vibration.

第8図に略図的側面図で示すように、圧電セラ
ミツク板101及び板状絶縁物109,115か
らなる積層体の2つの短辺側側面に、電極膜11
7,117が形成されている。この電極膜117
は、板状絶縁物109の導電膜111と、第2の
板状絶縁物115の導電膜111とを導通させ、
同様に、第1の板状絶縁物109の導電膜112
と第2の板状絶縁物115の導電膜112とを導
通させている。
As shown in a schematic side view in FIG. 8, electrode films 11
7,117 is formed. This electrode film 117
conducts the conductive film 111 of the plate-like insulator 109 and the conductive film 111 of the second plate-like insulator 115,
Similarly, the conductive film 112 of the first plate-like insulator 109
and the conductive film 112 of the second plate-like insulator 115 are electrically connected.

上記電極膜117の形成方法としては、スバツ
タリング、蒸着、イオンプレーテイングが考えら
れるが、形成面への電極膜117の密着性を考慮
すれば、スパツタリングによるのが最適である。
Possible methods for forming the electrode film 117 include sputtering, vapor deposition, and ion plating, but considering the adhesion of the electrode film 117 to the formation surface, sputtering is optimal.

また、はんだ付時の銀喰われ現象を防止するた
めに、下地電極として、基板との密着性に優れた
モネル金属(Cu30%、Ni65%、)をスパツタリン
グした上に、膜形成スピードの点からスパツタリ
ングに代えて、銅を蒸着し、さらに銀を蒸着して
必要電極膜厚みにするとよい。
In addition, in order to prevent the silver eating phenomenon during soldering, we sputtered Monel metal (30% Cu, 65% Ni), which has excellent adhesion to the substrate, as the base electrode, and also Instead of sputtering, copper may be vapor-deposited and then silver may be further vapor-deposited to obtain the required electrode film thickness.

上記のように電極膜117を設けることによ
り、プリント基板等にフエイスボンデイングし得
る構造が実現される。すなわち、第7図及び第8
図から明らかなように、圧電セラミツク基板10
1の上面側に設けられた励振電極102a,10
3a(第1図)に接続された引出し電極104,
105であつても、電極膜117を介して、圧電
セラミツク基板の他方面側すなわち下方側に配置
された板状絶縁物115の導電膜111,112
に電気的に接続されているため、第7図の向きの
ままプリント回路基板等にフエイスボンデイング
により実装することができる。
By providing the electrode film 117 as described above, a structure that can be face bonded to a printed circuit board or the like is realized. That is, Figures 7 and 8
As is clear from the figure, the piezoelectric ceramic substrate 10
Excitation electrodes 102a and 10 provided on the upper surface side of 1
3a (Fig. 1), an extraction electrode 104,
105, the conductive films 111 and 112 of the plate-shaped insulator 115 disposed on the other surface side of the piezoelectric ceramic substrate, that is, on the lower side, via the electrode film 117.
Since it is electrically connected to, it can be mounted on a printed circuit board or the like in the orientation shown in FIG. 7 by face bonding.

なお、第1の板状絶縁物109の電極構造を、
第2の板状絶縁物115と同一とし、引出し電極
107にも電極膜117と同様の機能の電極膜を
形成すれば上下左右対象の方向性の無いフイルタ
とすることができる。
Note that the electrode structure of the first plate-like insulator 109 is as follows:
If it is the same as the second plate-shaped insulator 115 and an electrode film having the same function as the electrode film 117 is formed also on the extraction electrode 107, a filter without vertical and horizontal symmetry can be obtained.

また、上述した各電極膜及び導電膜には、はん
だめつきが施されることが好ましい。装置(TV
やラジオ等)の配線基板(図示せず)に設けたプ
リント導体には、第6図の導電膜111,11
2,116が対向されてはんだ付けがなされる。
引出し電極104は、板状絶縁物109,115
の導電膜111,111に、電極膜117とはん
だにより確実に導通されることになる。同様に、
引出し電極105も、板状絶縁物109,115
の導電膜112,112に電極膜117及びはん
だにより確実に導通されることになる。
Moreover, it is preferable that each electrode film and conductive film described above be soldered. Equipment (TV
Conductive films 111, 11 shown in FIG.
2, 116 are faced and soldered.
The extraction electrode 104 includes plate-shaped insulators 109 and 115.
The conductive films 111, 111 are reliably electrically connected to the electrode film 117 by the solder. Similarly,
The extraction electrode 105 is also made of plate-shaped insulators 109, 115.
The conductive films 112, 112 are reliably electrically connected to each other by the electrode film 117 and the solder.

また、引出し電極107は導電膜113,11
4によりはんだにより確実に導通されている。
Further, the extraction electrode 107 is connected to the conductive films 113 and 11.
4, conduction is ensured by solder.

なお、本発明は、上述した2段のフイルタにの
み適用されるものに限定されず、2端子型あるい
は3端子型の共振子(発振子)、FMデイスクリ
ミネータユニツト等の用途にも適用できる。ま
た、フイルタの場合でも、その段数は任意であ
る。同様に、結合コンデンサは必ずしも設けなく
ともよい。
Note that the present invention is not limited to being applied only to the above-mentioned two-stage filter, but can also be applied to two-terminal or three-terminal resonators (oscillators), FM discriminator units, etc. . Further, even in the case of a filter, the number of stages is arbitrary. Similarly, a coupling capacitor may not necessarily be provided.

エネルギ閉じ込め型共振子(フイルタ)の構造
も実施例に限らず、特開昭55−149520号公報に掲
載されているものや、実開昭56−157829号公報に
掲載されているようなものにも適用し得る。
The structure of the energy confinement type resonator (filter) is not limited to the embodiments, but may be the one published in Japanese Patent Application Laid-Open No. 55-149520 or the one published in Utility Model Application Publication No. 56-157829. may also be applied.

2端子型共振子(フイルタ)のときには、切欠
部110e,110fに形成せずともよい。
In the case of a two-terminal type resonator (filter), it is not necessary to form the cutouts 110e and 110f.

導電膜111,112,113,114,11
6の形成方法の一例を説明する。まず、板状絶縁
物母材を用意し、製造する単位板状絶縁物の幅及
び長さに等しくなる位置に、例えば丸孔あるいは
母材の端縁部には半丸孔を形成し、スルーホール
めつきの手法により、上記丸孔及び半丸孔の内壁
面及びその両開口端面周縁部に導電膜をそれぞれ
形成する。次に、該絶縁物母材を切断することに
より、絶縁物母材から上記のような第1、第2の
板状絶縁物を効率よく量産することができる。
Conductive films 111, 112, 113, 114, 11
An example of the method for forming No. 6 will be explained. First, prepare a plate-shaped insulator base material, and form, for example, a round hole or a semi-circular hole at the edge of the base material at a position equal to the width and length of the unit plate-shaped insulator to be manufactured, and then By a hole plating method, a conductive film is formed on the inner wall surfaces of the round hole and semi-round hole and on the peripheral edges of both opening end surfaces thereof. Next, by cutting the insulating base material, the first and second plate-shaped insulators as described above can be efficiently mass-produced from the insulating base material.

なお、上記実施例の導電膜111,112,1
16は、板状絶縁物109,115の表面に導電
膜を全面に付与し、エツチングする際に切欠部分
110a,110b間、110c,110d間、
110e,110f間の一面側の導電膜を残して
おくことにより形成し得る。
Note that the conductive films 111, 112, 1 of the above embodiment
16, a conductive film is applied to the entire surface of the plate-shaped insulators 109 and 115, and when etching, between the notched portions 110a and 110b, between 110c and 110d,
It can be formed by leaving the conductive film on one side between 110e and 110f.

〔発明の効果〕〔Effect of the invention〕

以上のように、本発明では、少なくとも2箇所
の切欠部を設けてその部分に導電膜を形成した板
状絶縁物を圧電振動ユニツトの上下に積層して、
その引出し電極を上記導電膜に導通させてなる構
造を少なくとも有し、圧電振動ユニツトが圧電基
板の表裏に一対の励振電極を有するものであるに
も関わらず、一方面側の励振電極がチツプ状の圧
電振動部品の側面に設けられた電極膜を介して圧
電基板の他方面側にある板状の絶縁物の導電膜に
接続されているので、フエイスボンデイング可能
なチツプ部品とされている。従つて、プリント回
路基板等の実装部分への実装が極めて容易であ
り、かつ実装密度を効果的に高めることが可能で
ある。
As described above, in the present invention, plate-shaped insulators having at least two notches and conductive films formed thereon are laminated above and below a piezoelectric vibrating unit.
Although the piezoelectric vibration unit has a structure in which the extraction electrode is electrically connected to the conductive film, and the piezoelectric vibration unit has a pair of excitation electrodes on the front and back sides of the piezoelectric substrate, the excitation electrode on one side is chip-shaped. The piezoelectric vibrating component is connected to a conductive film of a plate-shaped insulator on the other side of the piezoelectric substrate via an electrode film provided on the side surface of the piezoelectric vibrating component, making it a chip component that can be face bonded. Therefore, mounting on a mounting portion such as a printed circuit board is extremely easy, and the mounting density can be effectively increased.

また、上記板状絶縁物は、切欠部を設け、該切
欠部の厚み方向壁面に導電膜を形成した構造を有
するものであるため、絶縁物母材から比較的簡単
に量産することができ、また圧電振動ユニツト母
材と積層してから切断することも可能である。従
つて、容易に大量の圧電振動部品を量産すること
ができる。よつて、安価でかつ不良品の発生率の
少ない信頼性に優れた圧電振動部品を得ることが
可能となる。
In addition, since the plate-shaped insulator has a structure in which a notch is provided and a conductive film is formed on the wall surface in the thickness direction of the notch, it can be relatively easily mass-produced from an insulating base material. It is also possible to stack it on the piezoelectric vibrating unit base material and then cut it. Therefore, it is possible to easily mass-produce a large number of piezoelectric vibrating components. Therefore, it is possible to obtain a piezoelectric vibrating component that is inexpensive and highly reliable with a low incidence of defective products.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例に用いられる圧電セ
ラミツク基板の平面図、第2図は圧電基板の底面
図、第3図は圧電基板の回路構成を示す図、第4
図は第1板状絶縁物の平面図、第5図は第1の板
状絶縁物の平面図であり圧電セラミツク基板の上
面に対向する側を示し、第6図は第2の板状絶縁
物の底面図、第7図は本発明の一実施例におい
て、電極膜を付与する前の状態を示す側面図、第
8図は本発明の一実施例における電極膜の機能を
説明するための略図的側面図である。 図において、101は圧電セラミツク基板、1
02a,102b,103a,103b,102
c,103cは励振電極、104,105,10
7は引出し電極、109は第1の板状絶縁物、1
10a〜110fは切欠部、111,112,1
13,114は導電膜、115は第2の板状絶縁
物、117は電極膜を示す。
FIG. 1 is a plan view of a piezoelectric ceramic substrate used in an embodiment of the present invention, FIG. 2 is a bottom view of the piezoelectric substrate, FIG. 3 is a diagram showing the circuit configuration of the piezoelectric substrate, and FIG.
FIG. 5 is a plan view of the first plate-shaped insulator, showing the side facing the top surface of the piezoelectric ceramic substrate, and FIG. 6 is a plan view of the first plate-shaped insulator. FIG. 7 is a bottom view of the object, FIG. 7 is a side view showing the state before applying the electrode film in one embodiment of the present invention, and FIG. 8 is a diagram for explaining the function of the electrode film in one embodiment of the present invention. FIG. 3 is a schematic side view. In the figure, 101 is a piezoelectric ceramic substrate;
02a, 102b, 103a, 103b, 102
c, 103c are excitation electrodes, 104, 105, 10
7 is an extraction electrode, 109 is a first plate-shaped insulator, 1
10a to 110f are notches, 111, 112, 1
13 and 114 are conductive films, 115 is a second plate-shaped insulator, and 117 is an electrode film.

Claims (1)

【特許請求の範囲】[Claims] 1 板状の絶縁物の少なくとも2箇所に切欠部を
設け、これら切欠部の上記絶縁物の厚み方向の壁
面にそれぞれ導電膜を形成し、上記圧電振動ユニ
ツトを2枚の上記絶縁物で挟持するように積層し
た構造を少なくとも有し、上記圧電振動ユニツト
の引出し電極を上記導電膜に電気的に接続したチ
ツプ状圧電振動部品であつて、圧電振動ユニツト
が圧電基板の表裏に一対の励振電極を設けた構造
を有し、該圧電基板の一方面側の励振電極が、チ
ツプ状圧電振動部品の側面に設けられた電極膜を
介して、該圧電基板の他方面側に配置された板状
の絶縁物の導電膜に電気的に接続されていること
を特徴とするチツプ状圧電振動部品。
1. Cutouts are provided in at least two places on a plate-shaped insulator, a conductive film is formed on each wall surface of the cutout in the thickness direction of the insulator, and the piezoelectric vibration unit is sandwiched between the two pieces of the insulator. A chip-shaped piezoelectric vibrating component having at least a laminated structure as shown in FIG. The excitation electrode on one side of the piezoelectric substrate is connected to the plate-shaped excitation electrode placed on the other side of the piezoelectric substrate via an electrode film provided on the side surface of the chip-shaped piezoelectric vibrating component. A chip-shaped piezoelectric vibrating component characterized by being electrically connected to a conductive film of an insulating material.
JP18887882A 1982-10-26 1982-10-26 Chip piezoelectric oscillator component Granted JPS5977715A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18887882A JPS5977715A (en) 1982-10-26 1982-10-26 Chip piezoelectric oscillator component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18887882A JPS5977715A (en) 1982-10-26 1982-10-26 Chip piezoelectric oscillator component

Publications (2)

Publication Number Publication Date
JPS5977715A JPS5977715A (en) 1984-05-04
JPH0155609B2 true JPH0155609B2 (en) 1989-11-27

Family

ID=16231455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18887882A Granted JPS5977715A (en) 1982-10-26 1982-10-26 Chip piezoelectric oscillator component

Country Status (1)

Country Link
JP (1) JPS5977715A (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0724810Y2 (en) * 1988-08-12 1995-06-05 株式会社村田製作所 Piezoelectric resonator
JPH0744418B2 (en) * 1988-08-31 1995-05-15 株式会社村田製作所 Piezoelectric vibrator
JPH0257621U (en) * 1988-10-20 1990-04-25
JPH02116126U (en) * 1989-03-02 1990-09-18
JPH083060Y2 (en) * 1989-06-02 1996-01-29 株式会社村田製作所 Piezoelectric resonator
JPH083061Y2 (en) * 1989-06-02 1996-01-29 株式会社村田製作所 Piezoelectric vibrator
US5170303A (en) * 1990-04-30 1992-12-08 Seagate Technology Inc. Inductive thin film head having improved readback characteristics
JPH0412712U (en) * 1990-05-23 1992-01-31
US5237235A (en) * 1991-09-30 1993-08-17 Motorola, Inc. Surface acoustic wave device package
US5382929A (en) * 1992-07-31 1995-01-17 Ndk, Nihon Dempa Kogyo Company, Ltd. Monolithic crystal filter
US5729185A (en) * 1996-04-29 1998-03-17 Motorola Inc. Acoustic wave filter package lid attachment apparatus and method utilizing a novolac epoxy based seal
JP2006148758A (en) * 2004-11-24 2006-06-08 Kyocera Kinseki Corp Quartz oscillator package

Also Published As

Publication number Publication date
JPS5977715A (en) 1984-05-04

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