JPS59121952U - pseudo line network - Google Patents
pseudo line networkInfo
- Publication number
- JPS59121952U JPS59121952U JP1634783U JP1634783U JPS59121952U JP S59121952 U JPS59121952 U JP S59121952U JP 1634783 U JP1634783 U JP 1634783U JP 1634783 U JP1634783 U JP 1634783U JP S59121952 U JPS59121952 U JP S59121952U
- Authority
- JP
- Japan
- Prior art keywords
- line network
- terminal
- frequency
- reference terminal
- pseudo line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図はこの考案による疑似線路網の回路網、第２図は
この考案による疑似線路網、この疑似線路網から並列共
振回路を除去したもの及び同軸ケーブルの周波数特性図
である。
２、 １２． １４・・・ピンダイオード（電圧制御型
定インピーダンス減衰器）、６・・・入力端子、１０・
・・出力端子、１８・・・高周波基準端子（交流基準端
一子）、２４・・・並列共振回路。FIG. 1 shows a circuit network of a pseudo-line network according to this invention, and FIG. 2 shows a frequency characteristic diagram of a pseudo-line network according to this invention, a parallel resonant circuit removed from this pseudo-line network, and a coaxial cable. 2, 12. 14... Pin diode (voltage controlled constant impedance attenuator), 6... Input terminal, 10...
... Output terminal, 18... High frequency reference terminal (one AC reference terminal), 24... Parallel resonant circuit.
Claims (1)
ダイオードを接続し、これらピンダイオードを流れる電
流を制御して減衰量を変化させる電圧制御型定インピー
ダンス減衰器と、上記交流基準端子と基準電位点との間
に交流的に接続されており、その共振周波数を上記入力
端子に供給される信号の周波数以外の周波数に選択した
並列共振回路とからなる疑似線路網。A voltage-controlled constant impedance attenuator that connects three pin diodes between an input terminal, an output terminal, and an AC reference terminal, and changes the amount of attenuation by controlling the current flowing through these pin diodes, and the AC reference terminal and the reference terminal. A pseudo-line network consisting of a parallel resonant circuit connected in an alternating current manner to a potential point, the resonant frequency of which is selected to be a frequency other than the frequency of the signal supplied to the input terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1634783U JPS59121952U (en) | 1983-02-07 | 1983-02-07 | pseudo line network |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1634783U JPS59121952U (en) | 1983-02-07 | 1983-02-07 | pseudo line network |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59121952U true JPS59121952U (en) | 1984-08-16 |
| JPS6324684Y2 JPS6324684Y2 (en) | 1988-07-06 |
Family
ID=30147638
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1634783U Granted JPS59121952U (en) | 1983-02-07 | 1983-02-07 | pseudo line network |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59121952U (en) |
-
1983
- 1983-02-07 JP JP1634783U patent/JPS59121952U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6324684Y2 (en) | 1988-07-06 |
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