JPS5991032U - emphasis circuit - Google Patents
emphasis circuitInfo
- Publication number
- JPS5991032U JPS5991032U JP18820482U JP18820482U JPS5991032U JP S5991032 U JPS5991032 U JP S5991032U JP 18820482 U JP18820482 U JP 18820482U JP 18820482 U JP18820482 U JP 18820482U JP S5991032 U JPS5991032 U JP S5991032U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- emphasis
- emphasis circuit
- emitter
- collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
- Networks Using Active Elements (AREA)
- Television Signal Processing For Recording (AREA)
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図及び第２図は従来のプリエンファシス回路の接続
図及びその特性を示すグラフ、第３図及び第４図は従来
のディエンファシス回路の一例のブロック図及びその他
の例の接続図、第５図はこの考案の一実施例の接続図、
第６図及び第７図はこの考案に使用できる非線形ロンピ
ーダンス素子の一例及び他の例の接続図である。
１・・・・・・記録信号の入力端子、２・・・・・・記
録信号の出力端子、４・・・・・・電源端子、８・・・
・・・共振及び非線形回路、９・・・・・・再生信号め
入力端子、１０・・・・・・再生信号の出力端子、１２
・・・・・・第１のトランジスタ、１５・・・・・・第
２のトランジスタ。1 and 2 are connection diagrams of a conventional pre-emphasis circuit and graphs showing its characteristics. FIGS. 3 and 4 are block diagrams of an example of a conventional de-emphasis circuit and connection diagrams of other examples. Figure 5 is a connection diagram of an embodiment of this invention.
FIGS. 6 and 7 are connection diagrams of one example and other examples of nonlinear rompedance elements that can be used in this invention. 1... Recording signal input terminal, 2... Recording signal output terminal, 4... Power supply terminal, 8...
... Resonance and nonlinear circuit, 9 ... Input terminal for reproduced signal, 10 ... Output terminal for reproduced signal, 12
...First transistor, 15...Second transistor.
Claims (1)
じさせる時定数回路の一端が接続され、この時定数回路
の他端と第２のトランジスタのエミッタが接続され、上
記第１のトランジスタがプリエンファシスとして動作す
る時は、上記第２のトランジスタのエミッタが交流的に
接地レベルとされ、上記第２のトランジスタがディエン
ファシスとして動作する時は、上記第１のトランジスタ
ノコレクタが接地レベルとなるように、切替えられるこ
とを特徴とするエンファシス回路。One end of a time constant circuit that produces a predetermined frequency characteristic is connected to the collector of the first transistor, the other end of this time constant circuit is connected to the emitter of the second transistor, and the first transistor acts as a pre-emphasis transistor. When operating, the emitter of the second transistor is set to the ground level in an alternating current manner, and when the second transistor operates as a de-emphasis, the collector of the first transistor is set to the ground level. An emphasis circuit characterized in that it can be switched.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18820482U JPS5991032U (en) | 1982-12-11 | 1982-12-11 | emphasis circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18820482U JPS5991032U (en) | 1982-12-11 | 1982-12-11 | emphasis circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5991032U true JPS5991032U (en) | 1984-06-20 |
| JPS643225Y2 JPS643225Y2 (en) | 1989-01-27 |
Family
ID=30406068
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18820482U Granted JPS5991032U (en) | 1982-12-11 | 1982-12-11 | emphasis circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5991032U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02241287A (en) * | 1989-03-15 | 1990-09-25 | Matsushita Electric Ind Co Ltd | Pulse edge extension circuit |
-
1982
- 1982-12-11 JP JP18820482U patent/JPS5991032U/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02241287A (en) * | 1989-03-15 | 1990-09-25 | Matsushita Electric Ind Co Ltd | Pulse edge extension circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS643225Y2 (en) | 1989-01-27 |
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