JPS59121857A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a shortcircuit or the other inconvenience such as an excess etching in a large window by forming the window in a strip shape in such a manner that the width of the strip is not so long as compared with the longitudinal length of the strip and equalizing the widths of a plurality of windows. CONSTITUTION:After a diffused layer is formed on a silicon semiconductor substrate 1, a PSG layer 2 is covered, and a resist layer is coated thereon. Then, when pattering to open an electrode window, the patterns 10-14 are formed to have the same width (a) as the width (a) of the pattern 10 of the minimum size. For example, when the window area of 4mumX10mum is desired, patterns 11-14 of 1mum are combined to substantially obtain the area. Then, a polycrystalline silicon layer 4 is grown by a CVD method to approx. 1mum. the parts of any window are flattened. Reactive ion etching is performed with CF4 gas, and stopped when the layer 2 is exposed. All electrode windows are buried in the polycrystalline silicon. An aluminum layer 6 is deposited in a thickness of 1mum, thereby patterning wirings. Subsequently, a PSG layer is formed, and treated by annealing or the like.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a semiconductor device, and particularly to a semiconductor device having a connecting portion such as an electrode window or a through hole for multilayer wiring.

(2) Prior Art and Problems In semiconductor devices, wiring is often formed through electrode windows or through holes in multilayer wiring.

Referring to FIG. 1, an electrode window is formed in an insulating layer 2 such as PSG on a semiconductor substrate 1, and an aluminum layer 3 is deposited on top of it and patterned to form wiring. In this case, wire breaks easily occur in the aluminum layer. Therefore, as shown in FIG. 2, the PSG layer 2 on the semiconductor substrate 1 is
After opening an electrode window, polycrystalline silicon is grown using, for example, the CVD method, and polycrystalline silicon is also grown from the side walls of the electrode window to completely fill the inside of the electrode window and flatten the inside of the electrode window. be. In this case, in order to fill the inside of the electrode window, after growing polycrystalline silicon by the size of the electrode window and flattening the top surface of the polycrystalline silicon (see Figure 2 (a)
), the polycrystalline silicon is etched by plasma etching or the like, leaving only the portion 5 of the polycrystalline silicon embedded in the electrode (FIG. 2(b)). If the aluminum layer 6 is deposited on top of the aluminum layer 6, there is no risk of wire breakage since there is no large step at the window.

However, with this method, as shown in Figure 3, if large electrode windows are present, the polycrystalline silicon N4 produced by the usual CVD method will leave depressions at the large electrode windows (Figure 3 (Illustrated)). )) When etching is performed, the recessed portion is excessively etched, and for example, the diffusion region 71 of the semiconductor substrate 1 is etched (FIG. 3 (b)), so that when the aluminum layer 6 is subsequently deposited, the etched diffusion region is etched. This has the disadvantage of causing a short circuit. However, it is not practical to grow one polycrystalline silicon layer 6 thicker than necessary.

(3) Purpose of the Invention In view of the current state of the prior art as described above, the present invention provides a semiconductor device in which electrode windows and the like are buried with polycrystalline silicon and flattened to prevent disconnection of wiring layers made of aluminum, etc. The purpose is to prevent excessive etching from occurring, short circuits, and other inconveniences.

(4) Structure of the Invention A semiconductor device that achieves the above object includes a semiconductor or metal layer, an insulator layer forming a plurality of windows on the semiconductor or metal layer, and a plurality of windows in the insulator layer. A semiconductor device comprising a buried polycrystalline silicon layer within the semiconductor device, an aluminum layer on the insulator layer and the buried polycrystalline silicon layer,
The window is shaped like a band, the width of the band is not longer than the length of the band in the longitudinal force direction, and the window widths of the plurality of windows are uniform.

That is, in the semiconductor device according to the present invention, the windows are band-shaped and their widths are unified at the minimum dimension. Therefore, when a polycrystalline silicon layer is grown by CVD or the like to a thickness approximately equal to the width, these window portions becomes almost flat. Therefore, subsequent etching results in excessive etching in certain windows]
There is no risk of damage to the lower part of the window or short circuit during wiring.

(5) Implementation of the Invention An embodiment of the invention will be described with reference to FIGS. 2 and 4.

After the entire diffusion layer is formed on the silicon semiconductor substrate 1, PSGJ so 2
is deposited to a thickness of 1 μm by the CVD method, and a resist layer is applied thereon. Next, when performing the 4-turning to open the FJL pole window, as shown in FIG. to have.

For example, if a window area of about 4 μm x 10 μm is desired, patterns 11 to 14 with a width of 1 μm as shown in the lower right of FIG.
(pattern spacing is, for example, 0.5 μm),
All you have to do is actually secure that area. If the resist layer is pattern-exposed using a mask with a pattern having a uniform minimum width a, and windows are opened by selective etching, all windows have a uniform minimum width a (1 μm).

Then, by growing a polycrystalline silicon layer 4 with a thickness of 1 μm using the CVD method, every window becomes flat (Figure 2 (a)).
. Reactive ion etching using CF4 gas, 28
It stops when the 0 layer 2 is exposed. All electrode windows are filled with polycrystalline silicon.

The aluminum layer 6 is steamed to a thickness of 1 μm. 1. Turn r9 and use it as wiring. Thereafter, normal processing such as PSG# formation and annealing are performed.

The semiconductor device manufactured in this manner does not suffer from scratches due to excessive etching of the electrode window portion.

(6) Effects of the Invention As is clear from the above description, the present invention provides a platform that utilizes wiring that embeds polycrystalline silicon in electrode windows of semiconductor devices, through holes of multilayer wiring, etc. This can prevent excessive etching at the electrode window, damaging the lower electrode, and causing short circuits.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of a semiconductor device with aluminum wiring in an electrode window, Figure 2 is a cross-sectional view of the old manufacturing process of a semiconductor device in which polycrystalline silicon is buried in a unipolar window and aluminum wiring is placed on top of it. 3 is a sectional view similar to FIG. 2, and FIG. 4 is a plan view of a window of a semiconductor device according to the present invention. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Insulating layer, 3... Aluminum layer, 4... Polycrystalline silicon layer, 5... Embedded polycrystalline silicon, 6... Aluminum layer, 7... diffusion area,
8-14...Window pattern.゛(I) Broom 2 diagram 4 (l\) /

Claims (1)

[Claims] (2) A semiconductor device or a metal layer, an insulator layer having a plurality of windows on the semiconductor or metal layer, a polycrystalline silicon layer buried within the plurality of windows of the insulator layer, and the insulator layer. and an aluminum layer on the buried polycrystalline silicon layer, the window has a strip-like shape, the width of the strip is not longer than the longitudinal length of the strip, and the plurality of windows A semiconductor device characterized in that the band widths in the semiconductor device are uniform.