JPS59106190A - Method of producing electronic circuit board - Google Patents
Method of producing electronic circuit boardInfo
- Publication number
- JPS59106190A JPS59106190A JP21717482A JP21717482A JPS59106190A JP S59106190 A JPS59106190 A JP S59106190A JP 21717482 A JP21717482 A JP 21717482A JP 21717482 A JP21717482 A JP 21717482A JP S59106190 A JPS59106190 A JP S59106190A
- Authority
- JP
- Japan
- Prior art keywords
- conductor pattern
- conductive paste
- circuit board
- electronic circuit
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
この発明は、電子回路基板の製造方法、とくに、基板の
角部に形成する微細な導体パターンの形成方法の改良に
関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing an electronic circuit board, and in particular to an improvement in a method for forming fine conductor patterns on the corners of the board.
液晶表示装置、混成集積回路装置などでは、高密度実装
の要請から、絶縁性基板の端面に導体パターンを高密度
で形成することが強く望まれている。この種の用途に用
いられる従来の電子回路基板の製造方法を図について説
明する。第1図は従来の方法で形成された電子回路基板
を示す斜視図である。図において、(1)はガラス、セ
ラミックなどの材料よりなる絶縁性基板、(1a)は基
板(1)の主表面と端面との角部、(2)は第1導体パ
ターンで、基板(りの主表面に、銀、銅、銀−パラジウ
ムなどの材料よりなる導電ペーストを用いたスクリーン
印刷等の手法で形成される。(3)は第2導体パターン
で、第1導体パターン(2)と同種の材料を用いて、た
とえば基板(1)の端面を上にした状態で、転写技術、
スクリーン印刷技術等の手法により、基板(1)の端面
に形成される。(8a)は重なり導体で、第2導体パタ
ーン(3)の一部分で、第2導体パターン(3)を形成
する際に、導電性ペーストのダレによって、基板(1)
の端面に形成された第2導体パターン(3)と連続して
、第1導体パターン(2)と接続するように、基板(1
)の主表面の一部分に形成されたものである。In liquid crystal display devices, hybrid integrated circuit devices, and the like, there is a strong desire to form conductive patterns at high density on the end faces of insulating substrates due to the requirement for high-density packaging. A conventional method of manufacturing an electronic circuit board used for this type of application will be explained with reference to the drawings. FIG. 1 is a perspective view showing an electronic circuit board formed by a conventional method. In the figure, (1) is an insulating substrate made of a material such as glass or ceramic, (1a) is the corner of the main surface and end surface of the substrate (1), and (2) is the first conductor pattern. The second conductor pattern (3) is formed on the main surface of the conductor pattern using a method such as screen printing using a conductive paste made of materials such as silver, copper, or silver-palladium. Using the same kind of material, for example, with the end surface of the substrate (1) facing up, transfer technology,
It is formed on the end surface of the substrate (1) by a method such as screen printing technology. (8a) is an overlapping conductor, which is a part of the second conductor pattern (3), and is caused by dripping of the conductive paste when forming the second conductor pattern (3).
The substrate ( 1
) is formed on a part of the main surface of the
この後、第2導体パターン(3)は所定条件で硬化、又
は焼成されて、基板(1)に被着される。第1導体パタ
ーン(2)と第2導体パターン(3)との電気的接続は
第2導体パターン(3)の重なり導体(8a)部分によ
ってなされる。このような従゛家の方法では、重なり導
体(8a)が、第2導体パターン(3)を形成する際の
導電性ペーストのダレを利用して第1導体パターン(2
)と接続されるため、重なり導体(8a)の寸法精度お
よび、第1導体パターンク2)との接続の信頼性が悪く
、特にピッチが1mm以下の導体パターンの形成は困難
であった。また、スクリーン印刷等の手法はフラットな
面での微細パターンの形成は可能であるが、角部に対し
てこの手法を用いる場合は、スクリーンと基板(1)と
の間にどうしても浮きが生じ、角部への微細パターンの
形成が困難であった。さらに、従来の方法では、基板(
1)の角部(1a)で、第2導体パターン(3)が断線
しやすり、(d頼性・生産性が悪いという欠点もあった
。Thereafter, the second conductor pattern (3) is cured or fired under predetermined conditions and adhered to the substrate (1). Electrical connection between the first conductor pattern (2) and the second conductor pattern (3) is made by the overlapping conductor (8a) portion of the second conductor pattern (3). In such a conventional method, the overlapping conductor (8a) connects the first conductor pattern (2) by utilizing the dripping of the conductive paste when forming the second conductor pattern (3).
), the dimensional accuracy of the overlapping conductor (8a) and the reliability of the connection with the first conductor pattern 2) were poor, and it was particularly difficult to form a conductor pattern with a pitch of 1 mm or less. In addition, although it is possible to form fine patterns on a flat surface using methods such as screen printing, when this method is used on corners, lifting will inevitably occur between the screen and the substrate (1). It was difficult to form fine patterns on the corners. Furthermore, in the conventional method, the substrate (
There was also a drawback that the second conductor pattern (3) was easily disconnected at the corner (1a) of (1), and reliability and productivity were poor.
この発明は、上記のような従来の方法の欠点を除去する
ためになされたもので、絶縁性基板の角部yc導°屯性
ペーストを塗布し、その後、レーザ光で所定形状にこの
導電性ペーストを硬化又は焼成し、次に、未硬化又は未
焼成の導電性ペーストを除去し第2導体パターンを形成
することにより、従来の転写技術による微細パターンの
限界、とくV(角部の製造困難性に比較して、より精密
な微細パターンを、とくに角部に形成することを目的と
している。This invention was made in order to eliminate the drawbacks of the conventional method as described above.A conductive paste is applied to the corners of an insulating substrate, and then the conductive paste is shaped into a predetermined shape using a laser beam. By hardening or firing the paste, and then removing the unhardened or unfired conductive paste to form a second conductive pattern, it is possible to overcome the limitations of fine patterns produced by conventional transfer techniques, especially V (difficult to manufacture corners). The purpose of this method is to form more precise micropatterns, especially at the corners.
以下、この発明を図について説明する。第2図は、この
発明の一実施例を実施するために使用する電子回路基板
の斜視図、第8図は、この発明の一実施例で形成された
m子回路基板の斜視図である。(1a)は絶縁性基板(
1)の主表面と端面との角部で、研摩などの方法によっ
て曲面状に加工されている。に)は導電性ペーストで、
第1導体パターン(2)と同種の材料を用い、転写技術
などの手法により、基板(1)の端面、及びこれと連続
し、第1導体パターン(2)と接続する4よに基板の主
表面の一部分に形成したものである。C80a)は重な
り被膜である。(4)はレーザ光で、導電性ペーストに
)を塗布した後、YAG (Yttrium Alum
inum GarneJレーザなどで、この導電性ペー
スト員の所定部分を照射して、その部分の導電性ペース
ト■を硬化又は焼成し、その後、導電性ペースト曽をエ
タノール、トリクロルエチレンなどの溶済で洗rpする
ことによって、導電性ペースト■のうちレーザ光(4)
を照射していない未硬化もしくは未焼成の部分を洗い落
とし、第2導体パターン(3)を形成する。第1導体パ
ターン(2)と第2導体パターン(3)との電気的接続
は、従来と同様、重なり導体(8a)によってなされる
。なお、第2導体パターン(3)の形成後、絶縁性基板
(1)を加熱すれば、第2導体パターン(3)と基板(
1)との密着性を向上させることができる。このようを
こして形成された第2導体パターン(3)は寸法精度が
良好で、精密な微細パターンが形成できる。The invention will now be explained with reference to the drawings. FIG. 2 is a perspective view of an electronic circuit board used to implement an embodiment of the present invention, and FIG. 8 is a perspective view of an m-child circuit board formed in an embodiment of the invention. (1a) is an insulating substrate (
1) The corner between the main surface and the end surface is processed into a curved surface by a method such as polishing. ) is a conductive paste,
Using the same type of material as the first conductor pattern (2), the end surface of the substrate (1) and the main part of the substrate 4 which is continuous with this and connects to the first conductor pattern (2) are formed using a method such as a transfer technique. It is formed on a part of the surface. C80a) is an overlapping coating. (4) uses a laser beam to coat the conductive paste, and then YAG (Yttrium Alum
A predetermined part of this conductive paste member is irradiated with a Garne J laser or the like to harden or bake the conductive paste in that part, and then the conductive paste is washed with ethanol, trichlorethylene, etc. Laser light (4) out of the conductive paste
The uncured or unfired portions that have not been irradiated are washed off to form a second conductor pattern (3). Electrical connection between the first conductor pattern (2) and the second conductor pattern (3) is made by the overlapping conductor (8a) as in the conventional case. Note that if the insulating substrate (1) is heated after forming the second conductor pattern (3), the second conductor pattern (3) and the substrate (
1) It is possible to improve the adhesion with 1). The second conductor pattern (3) thus formed has good dimensional accuracy and can form a precise fine pattern.
なお、上記実施例では、第1導体パターン(2)と同種
の材料を用いて第2導体パターン(3)を形成したが、
異なったl料であっても良い。In addition, in the above embodiment, the second conductor pattern (3) was formed using the same kind of material as the first conductor pattern (2).
A different charge may also be used.
更に、上記実施例では基板(1)の端面と主表面との角
部(1a)を曲面状にしたが、曲面状をなさない基板(
1)に対しても、同様の方法により微細パターンを形成
することができることは勿論である。Furthermore, in the above embodiment, the corner (1a) between the end surface and the main surface of the substrate (1) is curved, but the substrate (1) which does not have a curved shape (
Of course, for 1), a fine pattern can also be formed by a similar method.
以上のように、この発明によれば、基板の角部に導電性
ペーストを塗布した後、レーザ光で所定形状に導電性ペ
ーストを硬化又は焼成し、この後未硬化又は未焼成の導
電性ペーストを除去して第2導体パターンを形成したの
で、より精密な微細パターンが形成でき、とくに角部で
も形成が容易になる効果がある。As described above, according to the present invention, after applying a conductive paste to the corners of a substrate, the conductive paste is cured or fired into a predetermined shape with a laser beam, and then the uncured or unfired conductive paste is Since the second conductor pattern is formed by removing the second conductor pattern, a more precise fine pattern can be formed, and there is an effect that formation can be easily performed especially at corners.
第1図は従来の方法で形成された電子回路基板を示す斜
視図、第2図はこの発明の一実施例を実施するために使
用する電子回路基板の斜視図、第8図は、この発明の一
実施例で形成された電子回路基板の斜視図である。図に
おいて、(1)は絶縁性基板、(1a)は絶縁性基板の
主表面と端面との角部、(2)は第1導体パターン、(
3)は第2導体パターン、に)は導電性ペースト、(4
)はレーザ光である。
なお、図中、同一符号は同−又は相当部分を示す。
第1図
第2図
第3図
=431−FIG. 1 is a perspective view showing an electronic circuit board formed by a conventional method, FIG. 2 is a perspective view of an electronic circuit board used to implement an embodiment of the present invention, and FIG. FIG. 2 is a perspective view of an electronic circuit board formed in one embodiment. In the figure, (1) is an insulating substrate, (1a) is a corner of the main surface and end surface of the insulating substrate, (2) is a first conductor pattern, (
3) is the second conductor pattern, 2) is the conductive paste, and (4) is the conductive paste.
) is laser light. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Figure 1 Figure 2 Figure 3 =431-
Claims (2)
る工程、上記絶縁性基板の端面及びこれと連続し、第1
導体パターンと接続するように、上記絶縁性基板の主表
面の一部分に、導電性ペーストを塗布する工程、この導
電性ペーストを所定形状にレーザ光を用いて、硬化又は
焼成する工程、未硬化又は未焼成の上記導電性ペースト
を除去して、第1導体パターンと接続した第2導体パタ
ーンを形成する工程を施す電子回路基板の製造方法。(1) A step of forming a first conductor pattern on the main surface of the insulating substrate;
A step of applying a conductive paste to a part of the main surface of the insulating substrate so as to be connected to the conductor pattern, a step of curing or baking the conductive paste into a predetermined shape using a laser beam, a step of uncured or A method for manufacturing an electronic circuit board, comprising the step of removing the unfired conductive paste to form a second conductor pattern connected to the first conductor pattern.
たことを特徴とする特許請求の範囲第1項記載の電子回
路基板の製造方法1.(2) A method for manufacturing an electronic circuit board according to claim 1, characterized in that the corners of the main surface and end surfaces of the insulating substrate are curved.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21717482A JPS59106190A (en) | 1982-12-10 | 1982-12-10 | Method of producing electronic circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21717482A JPS59106190A (en) | 1982-12-10 | 1982-12-10 | Method of producing electronic circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59106190A true JPS59106190A (en) | 1984-06-19 |
Family
ID=16700015
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21717482A Pending JPS59106190A (en) | 1982-12-10 | 1982-12-10 | Method of producing electronic circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59106190A (en) |
-
1982
- 1982-12-10 JP JP21717482A patent/JPS59106190A/en active Pending
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