JPS59104178A - Semiconductor element - Google Patents

Abstract

PURPOSE:To perform the reduction in the reverse current by increasing the potential barrier for many carriers. CONSTITUTION:Semiconductor layers 2, 3, 4, 5, 6 having carrier density of 10<17>cm<-3> or higher, 10<16>cm<-3> or less, 10<17>cm<-3> or higher, 10<16>cm<-3> or lower, 10<17>cm<-3> or higher are sequentially laminated. However, the thickness of the layer 4 is 300Angstrom or lower, and the conductive type is different from those of the layers 2, 5. Then, the forbidden band width of the layer 4 is increased larger than those of the layers 3, 5. For example, the layer 4 is formed of Ga0.7Al0.3As and the other layer is formed of GaAs. Then, the potential barrier increases in the amount of the difference Ec of the conduction band energy between the GaAs and the Ga0.7Al0.3As. Accordingly, since the potential barrier is increased, the reverse current becomes small.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides an n-1-p-i-n structure (p-j-n-i-p
Although the present invention is similarly applicable to the structure, it will be explained using the n-1-p-i-n structure for simplicity.

The n-1-p-i-n element has a thin p layer of around 100X formed in the i layer of the n-1-n structure, and because majority carriers are mainly involved in conduction, It is expected to be a high-speed device, and recently, this structure has been used3
Terminal elements have also been proposed.

Furthermore, this element can also be used as a highly sensitive photodetector element without excessive noise, and its range of applications is wide.

First, the operation of the n-i-p-i-n element will be explained. Figure 1 shows the conventional n-i-p using GaAs.
It shows the thermal equilibrium state of the -1-n element and the band structure when voltage V is applied, and φ80 represents the height of the potential barrier between the two n layers. The density J of the current flowing when voltage V is applied is expressed by the thermionic emission formula, and is expressed as follows. Here, A” is the effective Richardson constant,
T is the absolute temperature, k is the Boltzmann constant, q is the electron configuration, and α1. When α2 is dl and dz is the thickness of the two i layers, α1-dl/(dl+d2), α2 = dz
/ (dl+d2). If d+'Fd2, asymmetry appears in the voltage-current characteristics. For this reason, it cannot be called forward direction or reverse direction like a normal pn junction diode.

When there is no light irradiation, no IF holes are injected into this device, so the response speed of the device is extremely fast, and it is expected to be an ultra-high-speed device. On the other hand, when light irradiation is performed, holes, which are photo-excited minority carriers, collect in the p-layer. This acts to reduce the value of the Boten/Yal barrier φBO, so that the electron current flowing through the device increases. That is, a photocurrent flows due to light irradiation, and it has been reported that the sensitivity at this time is about 70 OA/W, and the gain is about 1000 times as high. On the other hand, the response speed is also 50
A value of ~500 ps has been reported, and it is highly anticipated as a high-gain, high-speed light-receiving device.

However, in the conventional structure, for example, in the case of an n-1-p-i-n element using GaAs, most of the barrier heights are around 0.6 eV, and therefore, the reverse bias The current value (or dark current when used as a light receiving element) tended to be relatively large.

The Botenyal barrier φBO is obtained by solving the Boannon equation.
−.

is obtained by and given by. Here, N is the acceptor concentration in the p layer, XA is the thickness of the p layer, and ε8 is the dielectric constant. φB.

To make it a dog, ■dl, dz (dl<dz)
Examples include increasing the difference between and increasing d, (2) increasing the mass, and (2) increasing XA. However, if dl is increased, the lifetime of the genuine tag will be increased, which will have a negative effect on high-speed response. Also, it is a problem in terms of crystal growth to increase the size of lumps by twisting them, and the p-layer should just act as a barrier. There were problems such as a loss of high-speed response when XA was increased.

The present invention aims to reduce reverse current (dark current) by increasing the potential barrier to majority carriers without causing such problems.

The present invention will be described in detail below using Examples.

[Example 1] Figure 2 shows a mesa type n-1-p-i-n=4 according to the present invention.
- shows a cross-sectional view of the element, 1 is n''-GaA
s substrate, 2 is an n-GaAs layer (1=lQ"ts"
, thickness approximately 1 pm), 3 is a 1-GaAs layer (p<1.0
” cm-3 + thickness approximately 2 μm), 4 is p Ga□, 7A
43As layer (pThlQ"' tyna, thickness = t
oo X ), 5 is a 1-GaAs layer (p<1.0" c
m-3, thickness approximately 1oooX), 6 is an n-GaAs layer (n
=1018 cm-3° thickness approximately 1 μm), and 7 and 8 are electrodes. The band structure of this element in the thermal equilibrium state is expressed as
As shown in the figure.

The height of the potential barrier seen from the first layer 6 is approximately equal to the difference ΔEc in the conduction band energy level between GaAs and Gao7Ato3As compared to the case where an n-1-p-i-n structure is formed only with GaAs. only becomes larger. The difference in forbidden band width ΔEg is in this case ~0.4 eV, and ΔEc=0.
If it is 85ΔEg, then ΔEc is 0.34 eV. If other conditions are the same, the current density is φBO in equation (1)
The value is φBo plus ΔEc, so ΔEc =
At 0.34 eV, it is approximately 10-6 times as high at room temperature, and a significant reduction in reverse current (dark current) can be achieved.

[Example 2] In Example 1, all semiconductors except the p layer were made of semiconductors having the same composition. In this structure, the current due to electrons is reduced, but the current due to holes is hardly affected. However, when used as a light-receiving element, the ratio of electron dark current to hole dark current is related to gain, so it is also necessary to reduce the hole dark current. Example 2 shows a structure in which the current due to holes is also reduced. FIG. 4 shows a cross-sectional view of the semiconductor device of this embodiment, which is designed as a light receiving device for a wavelength band of 09 to 17 μm. 10 is an n-layer InP substrate;
11 is an n-InP layer (nn=1018t'', thickness about 2 μm), 12 is an n-AIAso4Sbo6 layer (n=
1018tyn”, thickness approx. 100X), 13]
-InO, 53caO, 47As layer (n<1015cm
-3゜thickness approx. 1000×), 14 is p AtAs6
．． 45bo6 layers (p=1018cm-3, thickness approx. 100
X), 15 is i-In0.53GaO, 4°As
layer (n<1.015cm-3, thickness about 1000X), 1
6 is an n-InP layer (n=1018 cm", thickness approximately 1
μm), 17 and 18 are electrodes. Here, AlASo
The forbidden band width of 4Sbo6 is approximately ], 9 eV, and InO,
53GaO, 47'', which is larger than that of InP.

FIG. 5 shows the band structure of this element in a thermal equilibrium state. p AIAS 6.4 S b o, 6 layers 14
As a result, as in Example 1, the potentiometer barrier becomes high, and the current due to electrons is significantly reduced. On the other hand, n-A/
! , As layer, and 45bo6 layer 12,
A small number of holes generated in the n-InP layer 11 diffuses and becomes 1I
This prevents nO, 53Ga0.47 from being injected into the As layer 13, thereby reducing dark current due to holes. That is, two AtAso4Sbo6 layers are n-1-p-i-n
By forming it in the structure, dark current due to both electrons and holes can be reduced. Furthermore, this structure has 0.9 to 1.7
When irradiated with μm light, the light is absorbed only by one of the two layers, and is hardly absorbed by the n-layers on both sides, so the response is fast. That is, with the structure shown in FIG. 4, a light receiving element with low dark current and high speed and high gain can be realized.

In the description of the second embodiment below, GaAs/G is used as the material.
aAtAs system and InP/InGaAs/A
Two combinations of tAs and Sb systems were used, but of course other semiconductor combinations such as GaPSb, AtGaA
sSb, AtTnAsP.

It is also possible to combine semiconductors such as AtPSb.

Moreover, it is not limited to mesa type elements, but can also be applied to planar type elements, and it goes without saying that it can also be used for p-i-n-j-p elements.

Such a structure is suitable for crystal growth using molecular beam epitaxy7.
For other processes, it can be sufficiently manufactured using conventional techniques.

As explained in detail above, according to the present invention, it is possible to fabricate an n-1-p-i-n device with a small current, in other words, a large vertical voltage, and it is possible to produce an n-1-p-i-n device with a small current and a large vertical voltage, and it is possible to produce an n-1-p-i-n device with a small current and a high vertical voltage. It can be widely applied.

[Brief explanation of drawings]

Figure 1 shows the band structure diagram of a conventional n-1-p-i-n element (a) at thermal equilibrium and (b) when a voltage V is applied.
The figure is a sectional view of an embodiment according to the present invention, FIG. 3 is a band structure diagram of the embodiment of FIG. 2 at thermal equilibrium, FIG. 3A and 3B show band structure diagrams of the embodiments shown in the figures at thermal equilibrium, respectively. 1-n''-GaAs substrate, 2.n-GaAs layer,
3...-i-GaAs layer, 4-p-Gao7 At
o3 As layer, 5--1-GaAs layer, 6...n-
GaAs layer, 7. s--electrode, 10--n layer-InP substrate, 11-n-InP layer, 12-n-At
As6,45bo6 layer, 13 ・= i −rnO,l
i3 caO, 47As layer, 14...p AtA
S. , 4 Sbg, 6 layers, 15- ] Ino, 53
Gao47A8 layer, 16...n-InP layer, 17,
18. ·,electrode. Patent Applicant International Telegraph and Telephone Co., Ltd. Agent Inuzuka 1 person from outside the university 1st 2nd 3rd ■

Claims (3)

[Claims] (1) A first semiconductor layer with a carrier concentration of 1017 cm or more, a second semiconductor layer with a carrier concentration of 1016 crn-3 or more, and a thickness of 30 cm with a carrier concentration of 1017 crn-3 or more.
Third semiconductor layer below 0X and carrier concentration 1016t
yn "Fourth semiconductor layer and carrier concentration 10"
A fifth semiconductor layer of 1yn-3 and above is sequentially laminated,
In the semiconductor element, the first semiconductor layer and the fifth semiconductor layer are formed to have the same conductivity type, and the third semiconductor layer has a conductivity type different from that of the fifth semiconductor. 3. A semiconductor device, wherein the forbidden band width of the third semiconductor layer is larger than the forbidden band widths of the second semiconductor layer and the fourth semiconductor layer. (2) The forbidden band width of the first semiconductor layer and the fifth semiconductor layer is larger than the forbidden band width of the second semiconductor layer and the fourth semiconductor layer. A semiconductor device according to scope 1. (3) The first semiconductor layer is composed of two semiconductor layers having different forbidden band widths, and of the two semiconductor layers, the semiconductor layer having a larger forbidden band width and a thickness of 1000 A or less is the second semiconductor layer. 3. The semiconductor device according to claim 1 or 2, wherein the semiconductor device is in contact with a semiconductor layer.