JPS59103588A - Controller for induction motor - Google Patents

Abstract

PURPOSE:To enable to obtain by high speed calculation a current command signal of a current control system from the vector calculation result without increasing the cost of an induction motor by using the integrated result of the previous cycle stored in a memory. CONSTITUTION:An inverter frequency omega1, a primary current amplitude I1 and a primary current phase theta1 obtained from the result of the vector calculation of a microprocessor are transferred to the register 75 and CREFReg 71 of a current instructing circuit 59 of a hard configuration. The instructing circuit 59 adds (SIGMAomega1+omega'1) DELTAt corresponding to integral omega1dt by an adder 76 by using the DDReg 78 storing the angle calculation result of the previous cycle, and adds (SIGMAomega1+omega'1) at next timing in a time division manner by a stage signal generated from a stage signal generator 72 and then rapidly calculates the current command signal of a current control system from the vector calculation result.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a control device that controls an induction motor using a frequency converter such as a PWM inverter, and employs a vector control method that is particularly effective in performing high-speed torque control. The present invention relates to a control device for an induction motor.

[Prior art]

Conventionally, a vector control method has been established as a method for controlling the high-speed torque of an induction motor in the same way as a DC motor. The impark frequency ωl of the frequency converter is obtained from the addition process of the angular velocity ωM obtained from the induction motor speed fttlj control system and the slip angular frequency ωS, and the secondary magnetic flux (φ′2) obtained from the magnetic flux control system is , exciting current 11 and basic equation of vector control 12-K q, ωB, φ'z(K
q is a constant) to find the secondary current ■2, and further, the above I
2, find the ratio with I-, and from this 01=tan-1(I
2/ 1. ), the primary current phase θl is obtained from the process consisting of (2) above. and (I2/'I-)2 and karaku, 1+(I
2/I frame 2 to obtain the amplitude 1 of the primary current, which is obtained by digital processing using a microcomputer or the like.

In such a vector control method, the current command (reference) signal (AC signal) corresponding to the amplitude factor l, phase θ11 and inverter frequency (-order current angular frequency) ω1 of the primary current obtained as a result of the above vector calculation is Lsin(/ωldt
+θl) must be found instantaneously (within equation 48).

By the way, if the time for obtaining the current command signal is delayed, a phase lag occurs in the current control system, making it impossible to perform high-speed torque control of the induction motor. Furthermore, as the frequency of the inverter of the frequency converter increases, the time required to obtain the current reference signal increases relative to the operating time of the current control system, so the phase delay described above increases as the inverter frequency increases. However, there is a problem that the operating frequency of the inverter, that is, the variable speed range of the induction motor is limited, making it unsuitable for a servo system that requires l:300 or more. Therefore, in order to perform high-speed torque control of the induction motor and widen the variable speed range, it is important to calculate the current command signal corresponding to the vector control calculation result as quickly as possible.

However, in order to obtain a current command signal suitable for the above required specifications, a circuit (f
A circuit for determining ω1dt) and an adder/subtractor for adding the result of the above addition process and the primary current phase θ1 are required, and at least two or more adders (subtractors) must be provided. or,
In order to perform the calculation of fωldi at high speed, in a large region of ω1, it is necessary to secure the number of pits so that the register storing the adder/subtractor and its booter does not exceed 70- during one cycle period, that is, 2T1. This requires at least two adders/subtracters with a large bit capacity and associated components, which poses a problem that increases the cost of the control device.

To describe the above problem in detail, for example, when ωl is 12 bits (212) and the above-mentioned integral operation time Δt is 5 μs, at least 1 201' bits ( ””X200 x 5X10=
= 2""°) Two or more adders (subtractors) capable of performing the above addition operations and two or more registers for storing addition data are required. Also, considering the periodicity of the trigonometric function, if the addition process is not performed in one cycle interval (2Tl) but up to π or π/2, a complicated control circuit is required to obtain the value of the trigonometric function for one cycle. There are problems that require Also, in this case, even if the number of required bits is reduced by 2 bits (18 bits since it is 20 bits in the above specific example), there will be no reduction effect and the calculation processing time will increase, so the original current command signal is This goes against the purpose of obtaining it quickly.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide an induction motor control device that eliminates the above-mentioned drawbacks and can quickly calculate a current command signal for a current control system from vector calculation control results without increasing the price of the device. .

[Summary of the invention]

The present invention uses a microcomputer or the like to perform vector fltlJ control calculations to calculate the frequency, current, etc. of a frequency converter.
In an induction motor control device that drives an induction motor at variable speed, the inverter (angular) frequency ω1 and the negative current phase θ1 are vector control calculation results obtained by digital calculation processing by a microcomputer, etc. , -order current amplitude■! Based on the current command signal of the current control system, the process of determining the current command signal of the current control system is performed using the...
The configuration uses one adder (subtractor) to perform an integral operation on the above data ω1, and add the result of this integral operation to the above data θl.
The above object is achieved by performing the above-mentioned addition (subtraction) in a time-division manner using a stage signal that allocates the processing, and at this time, the integral calculation result is once stored in a register to perform the addition (subtraction).

The principle of the present invention will be explained below. First, a microcomputer performs vector arithmetic processing given by the formula shown below. The resulting data of primary current phase θ1, inverter angular frequency ω1, and negative current amplitude If are transferred to a digital control circuit (herein referred to as a current command circuit) that is a peripheral circuit of the microcomputer, where the current A current command signal for the control system is calculated.

11゜=11ejwlt... Group... (1) However, ω
l−ωM+ωB ・・・・・・・・・(2)
+'t+=v'? Shoulder] 1 ・・・・・・・・・(
3) a2 φ2=-Kuroganichi ・・・・・・・・・(4
)1 +TS where T is the quadratic time constant and M is the mutual inductor/s2. S
indicates a differential operator.

1,=to,,ωs1φ'2 ”'”'
``'(5) However, K is a constant determined from the motor constant,
θ1 = tan” (I2/1.)
---(6) The general configuration of the current command circuit for calculating the current command signal is as follows. That is, the current command circuit is
A configuration is adopted in which Σ town Δt (radian) processing and addition/subtraction processing (signed operation) between Σω1Δt and current phase θ1 are performed by the same adder (subtractor). The configuration using one such adder (subtractor) is as follows.

That is, it is equipped with one adder (subtractor), a register (TEMReg) that stores the result, and a register (ADD Reg) that temporarily stores the integration result of ωl, and performs calculations by the following operations. It is something.

At the first stage of the cycle process in which angle calculation (fω, 1+θl) is performed, data Σω1Δt which is the calculation result before one cycle processing stored in the above ADDReg, ω1 obtained as a result of the current vector calculation, and the above An integral operation (Σω1±ωr)Δt is performed in accordance with an addition/subtraction command (corresponding to the sign of ω1) that controls the adder/subtractor. As a result, it is conveniently rewritten as Σω1Δt, stored in TEMReH, and then the process of storing ADDRegK is executed. The content of ADDReg newly obtained at this stage (Σω
1Δt) and the primary current phase θ! obtained as a result of vector calculation. are added or subtracted (ΣωlΔt±θl) by the adder/subtractor according to the addition/subtraction command (corresponding to the sign of θl). This result is transferred to the above T EM Reg, and at the final stage of one cycle process, trigonometric function data corresponding to the angle obtained as a result of the above calculation is obtained. The data of this trigonometric function is D
The current command signal is obtained by multiplying this value by the amplitude (1) of the primary current obtained as a result of vector calculation.

As mentioned above, since the current command circuit must perform the above two systems of addition and subtraction using one adder/subtractor, a configuration is adopted in which the addition and subtraction of these two systems is performed in a time-sharing manner. For this reason, a stage No. 15 generation circuit is provided, and the peripheral components and one adder/subtractor are controlled by the stage signal generated from this circuit to perform time-division processing. By adding a circuit for starting and stopping the induction motor to this stage bracket generation circuit, it becomes possible to start, stop, and switch between forward and reverse rotation using software.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIGS. 1 to 6. FIG. 1 shows a calculation processing block diagram of an embodiment of the control device for an induction motor according to the present invention. Side A in the figure is a vector calculation processing part by microcomputer processing, and side B in the figure is a vector calculation processing part. This is the code processing part that calculates the current reference signal from the result. First, the microcomputer processing section indicated by A will be explained, but since this is already well known, only its outline will be explained. This A
The output value of the speed control system (ASR) 30 is calculated by the slip angular frequency ωS(”
I2/φ'2), this circuit performs vector operations using a microcomputer.

To explain this vector calculation processing process, the above ωB is once passed through the upper and lower limiter processing 31 and then manually entered into the multiplication processing 32. In this multiplication process 32, ωS that has passed the upper and lower limit IJ mitter process 31 is multiplied by a coefficient K to obtain the quadratic i'ij, the flow
Get 2. This secondary current, I2, is input to the division process 33. On the other hand, magnetic flux command processing 34, subtraction processing 104, deceleration control compensation processing 35, and excitation current ■ are applied to the angular frequency ωM of the induction motor. - The magnetic flux φ is subjected to the magnetic flux control processing consisting of the valley processing in process 36 to obtain the excitation current (2), which is further passed through the upper limiter (absolute value) processing 37, and the obtained excitation current command (1) is applied to the Input to division processing 33. In this division process 33, a variable (I2/I-) which is the ratio of the secondary currents 2 and 11 is obtained and inputted into the root function table process 38. In this root function table processing 38, Im is multiplied by the root function data V 1 vote] 1) 2, and an operation corresponding to equation (3) described in the principle of the invention is performed. The primary current command 1 is found. or,
The variable (I2/1.) is input to the arctangent table processing 39, where the angle θ1 formed by the secondary current I2 and the excitation current 2, that is, the primary current phase θ1 is determined. Furthermore, the angular velocity ωM of the induction motor and the above-mentioned upper and lower limit processing 31
The slip angle frequency ωB, which is the output of
ω1 is required.

In this way, the amplitude I of the primary current is obtained from the vector calculation result of the microcomputer processing A.

and phase θ1, inverter frequency ω1...-de processing B
Transfer to the current command circuit shown in .

In the current command circuit, in an integration process 40, ω1 is added at a constant time interval Δt to obtain ΣωlΔt. This Σ
ωlΔt is further added to the above θ1 in an adder 41 to obtain Σω
1Δt+01 is obtained.

These Σω, Δ, and θl are input to the sine processing 42 and cosine processing 43, where the sine and cosine values corresponding to the input angles are determined, and these values are added to the above-mentioned 1. is multiplied by l1sin (Σω1Δ + θl) and J 1cos (
Σω1Δ is calculated as 1θl), and from these values 3
Iu and Iv in phase current command processing 44.

The 3-phase current command signal for engineering J is obtained. These three-phase command signals are compared with the three-phase primary 1d flow and converted into PWM signals, which serve as gate signals for the inverter.

FIG. 2 is a block diagram showing an embodiment of the control device for an induction motor of the present invention to which the control device processing process of the present embodiment shown in FIG. 1 is actually applied. The power conversion unit is an AC power source 5
0 to DC using a converter 51, and this DC is converted to a PW via a ballast capacitor 52 and a power generation control unit 53.
The signal is input to the M inverter 54, where it is converted into alternating current having a predetermined frequency, current, and phase, and is supplied to the induction motor 55.

On the other hand, the control device section that controls the PWM inverter 54 is configured to control the amplitude 11 of the primary current calculated by the microprocessor 56 that performs vector calculation processing, and the inverter (angle).
The frequency ω11-order current phase θ1 is input to an address decoder 57 that generates addresses for registers, memories, etc.
The output side of this address decoder 57 is a RAM 58 which provides an area for temporarily storing the arithmetic processing result data of the microprocessor 56. It generates a 2-phase current command signal, converts it into a 3-phase current command signal, and converts it into a 3-phase current command signal. A current command circuit 59 that compares the phase command signal and the primary current and generates a PWM signal, an EPROM 60 that stores programs such as subroutines and main programs, and an AD converter that converts analog quantities such as speed commands 61 into digital values. 62, speed detector (encoder) 6 connected to the induction motor 55
It is connected to a task management and speed measurement circuit 64 that calculates the speed of the induction motor 55 detected by the motor 3 and generates a signal to start a program in the EPROM 60.

Further, the data bus 65 includes a microprocessor 56 and an RA.
M58, EPROM 60, AD converter 62, task management and speed measurement circuit 64, and current command circuit 59 are connected.

The PWM signal generated by the current command circuit 59 is input to the gate drive circuit 66 and amplified.
The WM signal is input to the gate circuit of the PWM inverter 54. The output current of the PWM inverter 54 is detected by the current detector 6.
7 and is input to the current command circuit 59. Rotation command A is also input to this current command circuit 59 .

In addition, a ballast capacitor 52, a power generation control unit 53,
A dynamic braking control circuit 68 is connected to the gate dynamic part circuit 66, which sends a gate signal to the power generating unit 53 to perform dynamic braking when the voltage of the ballast capacitor 52 exceeds a predetermined value. Q.The microprocessor 56 section in FIG. 2 corresponds to the microcomputer processing section A in FIG. 1, and the current command circuit 59 corresponds to the ... code processing section B in FIG.
゜Figure 3 is a specific example of the configuration of the current command circuit 59 shown in Figure 2, and the circuit in Figure 3 is the key point of the present invention. The configuration and operation of the current command circuit will be explained using FIGS. 6 to 6.

The aforementioned vector operation result data ω1. θ1+ It
is executed by the microprocessor 56 in the PIA 7 of FIG.
Transferred to register in 0. At this time, if an 8-bit microprocessor is used, the above two data ω1.
When θ1 becomes 2 bytes, the transfer timing is such that the microprocessor side sends the transfer signal P16. P15 is sent into the current command circuit, and the registers FRE 'ELeg and PHA generated during this period are
Reg (7) Transfer signals PR, E Reg 8 T and PHA R+eg ST are prohibited.

The timing of this prohibition is shown by the broken line in FIG.

Further, the timing signal CREF Reg ST to be transferred to the register 71 storing the current amplitude value 1 is similarly inhibited by the signal P17. Similarly, the register 75 consists of an angular frequency storage register FREReg, a current phase storage register PHAReg, and a transfer signal P15. P1
The H level section of 6 is the PI from the above microprocessor.
It shows the period during which the data is being transferred to A70.

The data ωl transferred to the register FREReg at the above-mentioned timing is transferred to the adder/subtractor 76 by the L level signal of the FREReg output control signal FRERegCNT. At this time, angle storage register ADD 86g7
Angle Σω1Δt before 1 cycle processing stored in 8
is transferred to the adder/subtracter 76 by the TEM l'te g strobe signal which is the signal of the part A of 'l' EMR,egsT in FIG. Accordingly, addition and subtraction processing is performed on the angle ΣωlΔt before one cycle processing, and the resulting data (Σω1±ω′ minus Δt is stored in the register TEMReg 77 as Σω"Δt. This data Σω"1Δt i− is ADDR shown in section B in the diagram
eg ADDRe, which is a strobe signal (L level)
Stored in ADDReg78 by gST.

Next, the current phase data θ1 stored in the PIA 70
Regis 3175 (DP HA Reg to PHARe
Transfer by g strobe signal (H level). Furthermore,
This θl is output to the adder/subtractor 76 using the PHA output control signal (L level), and processing is performed to add or subtract θ1 to Σω"Δt, which is the calculation result of the adder/subtracter 76, according to the sign of θ1. This result is TEMReg output con) O
-, A, signal T E MReg 5T (L level of B)
It is stored in the register 77 TEMReg. The data of Σω"Δt±01 stored in this register 77 is converted into trigonometric function data by the sine and cosine function data storage memory 79, and furthermore, this converted data is
D at converter strobe signal DACO8T (L level)
/A converter 80, where the data is converted into analog quantities of trigonometric functions. This analog quantity is PI
The current amplitude data L transferred and stored from A70 to CEF'Reg is converted into an analog quantity by the DA converter 73, and multiplied by I REF, which is obtained by I Rxy sin.
(ΣIku “101”), ■RxpcOs (ΣOng)
It becomes a two-phase signal of t±01). These two-phase signals are converted into three-phase current command signals Itr, Iv, and Iw in a conversion circuit 81, which are compared with the load current ILUI ILV + Ihw detected by the current detector 67 in FIG. 2 in a comparator 82, and P
This PWM signal is introduced into the gate drive circuit 66 of FIG. 2, and the resulting signal drives the PWM inverter 54 to obtain a variable frequency AC power source.

Here, to restate the operation of the adder (subtractor) 76, first, the adder 76 receives the sum of Σω1Δ of the inverter angular frequencies 1V cycle ago stored in ADDReg78.
t, and the inverter angular frequency ω1 of the current cycle is taken from FRER, eg to this ΣωlΔt, and these are added and subtracted to obtain (Σωl±ωr)Δt, which is conveniently stored in the register TEM eg 77 as Σω1Δt. At the same time, it is stored in ADDReg78. Next, the adder M takes in the current phase data θ1 of the current cycle from PHAReg and adds or subtracts the current phase data θ1 of the current cycle to the previous addition/subtraction result Σ “Δt” to obtain ΣωτΔt±01.

When this calculation is completed, the adder/subtractor 76 takes in Σω1Δt contained in the ADDReg 78, and repeats the operation of adding the inverter angular frequency of the next cycle to it. That is, the adder 76 adds Σω1Δt±ωf"Δt and (
Addition of Σω1±ωf)Δ to 10θ1 is performed in a time-division manner, and at this time, the addition result, ie (Σ
ωl±ω1')Jt is temporarily stored and the above two additions and subtractions are performed in a time-sharing manner. The stage signal generation circuit indicated by reference numeral 72 in FIG. 3 includes a register 75 in FIG.
It generates a stationary signal ST that controls the operation timing of each device such as the DA converter 80.
56 enable signal E1 rotation command (, turn, off) R
etc., to generate the stage signal ST.

FIG. 5 shows a detailed configuration example in which a start/stop circuit is added to the stage signal generation circuit 72 shown in FIG. 3. When the rotation command So shown in FIG.
When the signal is input to the C terminal of the signal g, the externally applied signal So is latched and a starting signal S is generated from the C terminal. This signal So is input to the D terminal of the latch 81, and the enable signal E output from the microprocessor 56 is input to the C terminal of this latch 81.

The signal S! is synchronized with the rise of this enable signal E! and is output from the C terminal. This signal S1 is the latch 8
The signal is input to the D terminal of No. 2, and also input to one input terminal of the AND gate 83. The latch 82 outputs from the terminal the enable signal E input to the C terminal and the signal S2 synchronized with the rise of the signal E from the signal S1. This signal S2
is input to the other input terminal of the gate 83, and the AND gate 83 performs a logical product of the signals S1 and 82, and outputs the signal S3 to one input terminal of the OR gate 82. A signal obtained by feeding back the output signal 5TC11 of the final stage of the shift register 85 is input to the other input terminal of the OR gate 84, and the OR gate 84 calculates the logical sum of the signal S3 and the signal 5TCII, and the result is ANDed. It is output to one input terminal of gate 86. The other input terminal of this AND gate 86 has a latch 8
The signal Sl which is the output of the OR gate 84 is input, and the output signal of the OR gate 84 and this activation command signal S! A signal 5TCINφ obtained by performing a logical product with the signal 5TCINφ is output to the output terminal of the shift register 85. This signal 5TCIN<7 is an activation control signal for the shift register 85, and based on the enable signal E input to the C terminal of the shift register 85, the shift register shown in FIG. Output signals STCφ to 5TCII are output from the C terminal of the shift register 85. These output signals STCφ to 8TC11 are used to allocate each process performed in each section in FIG. Therefore, in the case of Fig. 4, when the period of the enable signal E is 2 MHz, the processing time of one cycle (the time processed by the 12-stage signal) is 6 μs.
becomes.

By the way, the starting/stopping permission signal g is a signal outputted as a result of determining starting and stopping conditions according to the magnitude relationship of the speed of the induction motor 55 by software of the microprocessor 56. For example, after the software of the microprocessor 56 starts, a prohibition signal (L level in g in FIG. 6) is generated until each register in the circuit is initialized, and after the data in the register is determined, a permission period l is generated. A signal shown by is generated for several cycles, and during a period when the speed of the induction motor 55 is at a predetermined level, a command prohibition period (L level of signal g) is generated, and the reception of a start/stop command is prohibited. This is done by setting the signal g to the command permission state (H level) in the normal operation mode, and the external command S is activated. This is because the induction motor 55 may receive a stop command while being driven at high speed due to an erroneous operation.

For example, in the permitted section, the speed of the induction motor 55 is 25 RPM.
This signal is generated when the vehicle reaches a low speed where it is safe to stop. When the stop command formed by the above signals g and So is input, the stage signal becomes 1-! The stage signal is stopped after the l-cycle mode has passed, that is, the signal 5TCII in FIG. 4 is generated, and the continuity of the current command signal is always maintained. For this reason, the induction motor 55 can be started from the same phase as when it stopped, allowing forward rotation/
Reverse switching and starting/stopping can be performed without shock.

According to this embodiment, the inverter (angular) frequency ω1, the negative current amplitude 11, . −Next current phase θ! The register 75 of the current command circuit 59 in the hardware configuration and CREF' Beg 7
In the current command circuit 59, one adder 76 first adds (Σωl±ω1)Δt corresponding to fω1dt to the ADDR in which the angle calculation result of the previous cycle is stored.
Do it using eg78, and at the next timing fωldt
The stage signal S generated from the stage signal generation circuit 72 is calculated by adding (Σωl±ω1)Δ corresponding to 101 to 10.
By time-divisionally assigning the operations of each component according to TCφ to 5TCII, there is an effect that the current command signal of the current control system can be calculated at high speed from the vector calculation result. Therefore, there is no phase delay in the current control system, and it is possible to control the high-speed torque IH1 of the induction motor 55.
The operating frequency of No. 4, that is, the speed range of the induction motor 55 can be easily made into a wide range of 1:300 or more, and the linearity can be compensated regardless of the low speed range or the high speed range. father,
Since the above-mentioned addition is performed in a time-sharing manner using a stage signal in one adder 76 to obtain the current command signal, it is necessary to increase the number of adders with a large number of bits even if the number of addition (subtraction) targets increases. Since there is no component, the configuration of the current command circuit 59 is simplified, and the current command signal can be calculated at high speed with an inexpensive device. Furthermore, by adding a starting/stopping circuit for the induction motor 55 to the stage signal generation circuit 72, there is an effect that the induction motor 56 can be rotated forward, reversed, started, and stopped without shock.

In the above embodiment, the inverter frequency ωl is obtained by adding the angular velocity ωM of the induction motor 55 and the slip angular frequency ω8 in the microprocessor 56, and the result is added to the current command circuit 59, which is dedicated to storing the data of ωl. register FR
Although transferred to EReH, even if you separate ωM and ωB to obtain the current command signal, just add a register to store the above two data and assign the stage signals, and one unit can be used as in the above embodiment. The current command signal can be similarly obtained at high speed by using the adder/subtractor 76.

〔Effect of the invention〕

As described above, according to the control device for an induction motor of the present invention, the data of the primary current amplitude Its, the primary current phase θ1, and the inverter angular frequency ω1 obtained from the vector calculation processing result of the microcomputer are temporarily stored in the memory. Using the integration (calculated by addition) result of ω1 of the previous cycle, one adder is operated in a time-division manner to perform addition processing for two systems of wires to obtain a current command signal. By providing the command circuit, there is an effect that the current command signal of the current control system can be calculated at high speed from the vector calculation result without increasing the price of the device.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the process of an embodiment of the induction motor control device of the present invention, and FIG. 2 is an implementation of the induction motor control device of the present invention that realizes the process shown in FIG. FIG. 3 is a block diagram showing a specific example of the current command circuit shown in FIG. 2, FIG. 4 is a time chart showing the operation of the current command circuit shown in FIG. 3, and FIG. The figure is @3
A block diagram showing a specific example of the stage signal generation circuit shown in the figure, and FIG. 6 is a time chart showing start and stop commands for the stage signal generation circuit shown in FIG. 54... PWM inverter, 55... induction motor,
56... Microprocessor, 59... Current command circuit, 71 - CREF PLeg, 75 - L/register 76-- Addition/subtraction device, 77-TEMReg, 78
・ADDReg. 79...Sine and cosine function data storage memory.

Claims (1)

[Claims] 1. A current command signal for the current control system is calculated based on the induction motor's primary current amplitude, -order current phase, and inverter frequency obtained by vector calculation using a microcomputer, etc., and the current control system is controlled by this current command signal. In an induction motor control device that performs high-speed torque control of the induction motor by supplying a variable frequency current from an inverter of a frequency converter to the induction motor, the current command signal calculation unit includes one adder/subtracter and the adder/subtractor. A circuit that generates a stage signal that allocates the processing share of each component in order to operate the device in time division, a register that temporarily stores the addition result of the adder/subtractor, and a plurality of registers that store each data obtained by the vector operation. The adder/subtracter first performs an operation of adding the current inverter angular frequency to the previous inverter angular frequency addition result stored in the register, and then stores this result in the register. , calculate the function value corresponding to the angle obtained by adding the primary current phase to the addition result of the inverter angular frequency, which is the result of this calculation, and A control device for an induction motor, characterized in that a current command signal is obtained by multiplying a function value and the negative current amplitude.