JPH1141982A - Three-phase inverter and control method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize protection of an inverter easily and surely at the time of a DC mode by determining the output detection current value and the difference between the output detection current value and a reference current value during the DC mode brake interval thereby controlling the output voltage of an inverter such that the detection current value is limited within the reference current value. SOLUTION: During the DC exciting interval before starting an AC motor 3 or during the brake interval after stop control, an inverter 2 is controlled to produce a DC output voltage by a conversion switch. Effective value or mean value of the output current is then determined, as a detection current value, by a current detector 5a-5c coupled with a three-phase output line 4a-4c. Subsequently, the difference between the detection current value and a reference current value of a DC reference generating means in an overcurrent protector 8 is determined and a conversion switch Q1-Q6 for the inverter 2 is controlled to limit the detection current value within the reference current value based on a value corresponding to the difference thus facilitating overcurrent protection under DC mode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable frequency and variable voltage type three-phase inverter device for driving a three-phase AC motor and a control method thereof.

[0002]

2. Description of the Related Art When an AC motor is driven by an inverter, the output frequency of the inverter is gradually increased from the starting point t1 of the motor as shown in FIG. 1, and the output voltage is increased in accordance with the frequency as shown in FIG. When the motor reaches a predetermined rotational speed at time t2 in FIG. 1, the frequency and voltage are kept constant. When the motor is stopped, the frequency is gradually lowered and the output voltage is gradually lowered as shown in the section from t3 to t4. In FIG. 1, the period from t0 to t1 and the period from t4 to t5 are the stop periods of the motor, but during the period from t0 to t1 before the start, a low-level DC exciting current is applied to the motor in order to smoothly start the motor. In the period from t4 to t5, a DC braking circuit is formed for the purpose of braking. Therefore, FIG.
As shown in (2), when the output frequency of the inverter is zero, the output voltage does not become zero. In the DC mode during the DC excitation period and the braking period, the conversion switches of the three-phase bridge type inverter are controlled to be unbalanced, for example, as shown in FIG. This causes an unbalanced DC current to flow through the output line of the inverter. The inverter output current in the DC mode is a DC current that increases according to a time constant determined by the impedance of the motor, the inverter, and the wiring.

[0003]

Since the inverter output current in the DC mode flows in a state different from the inverter output current in the AC mode, the overcurrent protection method in the AC mode cannot be directly applied. . In the conventional method, means for generating an alarm at a lower current level than in the AC mode is provided, and the inverter is completely stopped manually in response to the generation of the alarm. However, if the capacity of the motor is larger than the capacity of the inverter, or if the impedance of the motor is small, alarms may occur frequently.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an inverter device and a control method thereof that can easily and reliably achieve overcurrent protection in a DC mode.

[0005]

The present invention for solving the above-mentioned problems and achieving the above-mentioned object is a method for supplying electric power from a variable frequency / variable voltage type three-phase inverter to a three-phase AC motor. Controlling the conversion switch of the inverter device so that a DC output voltage is obtained from the inverter device during a DC excitation period before starting the AC motor or during a braking period after stop control, and A current is detected, an effective value or an average value of the output current is obtained, and this is set as a detected current value.A value corresponding to a difference between the detected current value and a reference current value is obtained, and a value corresponding to the difference is obtained. And controlling the conversion switch of the inverter device so that the detection current value is limited to the reference current value or less. Further, the invention of the device is a variable frequency / variable voltage type three-phase inverter device for supplying power to a three-phase AC motor, wherein the AC motor has a DC excitation period before starting or a braking period after stop control. Means for controlling the conversion switch of the inverter device to obtain a DC output voltage from the inverter device; current detection means for detecting an output current of the inverter device; and the output current detected by the current detection means. Calculating means for obtaining an effective value or an average value of the detected current value and outputting the detected value as a detected current value; and obtaining a value corresponding to a difference between the detected current value and a reference current value, and performing the detection based on a value corresponding to the difference. Means for controlling the conversion switch of the inverter device so that the current value is limited to the reference current value or less.

[0006]

According to the present invention, a detected current value is obtained from an effective value or an average value of an output current, and a value corresponding to a difference between the detected current value and a reference current value in a DC mode period of DC excitation or braking. Is obtained and the output voltage of the inverter is controlled so that the detected current value is limited to the reference current value or less, so that protection of the inverter in the DC mode can be easily and reliably achieved.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a variable frequency and variable voltage PWM inverter device for explaining an embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to FIG. The inverter device shown in FIG. 3 is configured to drive a three-phase induction motor 3 by converting a DC voltage of a DC power supply 1 into an AC by a DC-AC conversion circuit 2.

The conversion circuit 2 is composed of a first transistor
This is a well-known circuit in which the third to sixth switches Q1 to Q6 are connected in a three-phase bridge, and diodes D1 to D6 are connected in parallel to the switches Q1 to Q6. The conversion circuit 2 interrupts an output current in a mode in which a direct current is converted into an alternating current to output an alternating current (hereinafter, referred to as an alternating current mode), a mode in which an unbalanced direct current is output (hereinafter, referred to as a direct current mode). It operates in three modes, hereinafter referred to as a cut-off mode.

The three-phase output lines 4a, 4b,
4c, current detectors 5a, 5b as current detecting means;
5c is electromagnetically or magnetically coupled. Current detector 5
Each of a, 5b, and 5c can be constituted by a current transformer, a Hall element, or the like. In the embodiment, three current detectors 5a, 5b,
5c is provided, but any two-phase current is detected,
The currents of the remaining phases can be calculated.

A control signal generation circuit 6 connected to the control terminals (bases) of the switches Q1 to Q6 forms control signals for operating the conversion circuit 2 in an AC mode, a DC mode, and a cutoff mode. Details of the control signal generation circuit 6 will be described later.

The mode command device 7 is an operation switch or the like on an operation panel, and supplies an AC mode command, a DC mode command, and a cutoff mode command to the control signal generation circuit 6 through the transmission line 7a.

The overcurrent protection device 8 connected to the current detectors 5a, 5b and 5c includes overcurrent protection means in the AC mode, overcurrent protection means in the DC mode, and alarm means. The current control signal is supplied to the control signal generation circuit 6. Details of the overcurrent protection device 8 will be described later. In FIG. 3, the control signal generation circuit 6
The overcurrent protection device 8 and the overcurrent protection device 8 are individually shown, but many of them are constituted by a digital signal processing circuit, that is, a microprocessor.

FIG. 4 shows the control signal generation circuit 6 equivalently, and comprises a first phase, second phase and third phase control signal generation circuit 6a, 6b, 6c and a distribution circuit 10. The first phase control signal generation circuit 6a includes a sine wave and DC signal generation unit 11, a multiplication unit 12, a triangular wave signal generation unit 13, and a comparator 14. The second and third phase control signal generation circuits 6b and 6c have substantially the same configuration as the first phase control signal generation circuit 6a. However, in the second and third phase control signal generation circuits 6b and 6c, those corresponding to the sine wave of the first phase control signal generation circuit 6a and the DC signal generating means 11 are 120 degrees with respect to the first phase sine wave. And a sine wave and a DC signal having a phase difference of 240 degrees. In the second and third phase control signal generation circuits 6b and 6c, those corresponding to the triangular wave signal generating means 13 are omitted, and the first phase triangular wave signal generating means 13 is also used. Of course, the second and third phase control signal generation circuit 6
The triangular wave signal generators b and 6c are independently provided, and can be synchronized with the first phase triangular wave signal generator 13. In addition, the second and third phase control signal generation circuit 6b,
6c, the sine wave signal generating means is provided independently.
The phase sine wave and the sine wave generated from the DC signal generation means 11 can be delayed by 120 degrees and 240 degrees by the delay means to obtain the second phase and the third phase sine waves.

The sine wave and DC signal generating means 11 responds to an AC mode command from the mode
A sine wave Vac shown in FIG. The sine wave Vac is obtained, for example, by reading sine wave data stored in a ROM (read only memory). The sine wave and DC signal generating means 11 is configured to gradually change the frequency of the sine wave during the start period t1 to t2 and the stop operation period t3 to t4 shown in FIG. 1, and according to the frequency change as shown in FIG. It is configured to change the voltage (amplitude). In addition, the sine wave and DC signal generating means 11 has an output frequency of zero in response to the DC mode command from the mode command device 7, and converts the DC signal Vdc of FIG. Occurs. In addition, the sine wave and DC signal generating means 11 stops generating both the sine wave Vac and the DC signal Vdc in response to the cutoff mode command from the mode command device 7. Second phase and third phase control signal generation circuit 6
The sine waves b and 6c are 1 to the sine wave Vac in FIG.
It has a delay of 20 degrees and 240 degrees. Therefore, the sine waves of the first phase, the second phase and the third phase correspond to the reference phase voltages Vu, Vv and Vw of the inverter shown in FIG.

The subtraction means 12 subtracts the voltage adjustment signal output from the overcurrent protection device 8 of FIG. 2 from the output of the sine wave and DC signal generation means 11. In the AC mode, since the signal to be subtracted is not generated from the overcurrent protection device 8, the amplitude of the sine wave Vac is not controlled by the subtraction means 12. On the other hand, in the DC mode, since a non-fixed voltage adjustment signal for controlling the DC current is generated from the overcurrent protection device 8, the level of the sine wave and the DC signal Vdc generated from the DC signal generation unit 11 is subtracted by the subtraction unit 12. Controlled.

The triangular wave signal generating means 13 generates a triangular wave signal Vt at a repetition frequency sufficiently higher than the frequency of the sine wave Vac of the conversion circuit 2 as shown in FIG. The comparator 14 is a sine wave and DC signal generating means 1 in the AC mode.
The sine wave Vac of 1 is compared with the triangular wave signal Vt of the triangular wave signal generating means 13 to output a PWM pulse shown in FIG. In the DC mode, the DC signal Vdc and the triangular wave signal Vt shown in FIG. When the comparator 14 is a digital comparison means, a digital / analog converter is provided at this output stage. When the comparator 14 is an analog voltage comparator, a digital / analog converter is provided on both input lines.

The distribution circuit 10 distributes output pulses of the first, second and third phase control signal generation circuits 6a, 6b and 6c to the switches Q1 to Q6 of the conversion circuit 2. Specifically, when an AC mode command is issued from the mode command device 7,
FIG. 8 shows the PWM pulse of the first phase control signal generation circuit 6a.
(B) As shown in (C), the first and second switches Q1
, Q2 and the PW of the second phase control signal generation circuit 6b.
The M pulse is applied to the third and fourth pulses as shown in FIGS.
And the PWM pulse of the third phase control signal generation circuit 6c to the fifth and sixth switches Q5 and Q6 as shown in FIGS. 8 (F) and 8 (G).

On the other hand, when a DC mode command is generated from the mode command device 7, the distribution circuit 10 operates as shown in FIGS.
The known distribution operation shown in (G) is stopped, and FIG.
As shown in (C) and (F), the output PWM pulses of the first phase, second phase and third phase control signal generation circuits 6a, 6b and 6c are continuously output to the first, third and fifth switches Q1. , Q3,
Q5 and the second, fourth and sixth switches Q2, Q2.
4 and Q6 have first, third and fifth switches Q1, Q3.
, Q5 shown in FIGS. 7 (B), (D) and (F) corresponding to those obtained by inverting the phase of the PWM pulse supplied to the
The WM pulse is supplied continuously. As is clear from FIG. 7, the first phase, second phase and third phase control signal generation circuits 6a, 6
Since the PWM pulses b and 6c and the inverted pulse have slightly different pulse widths, a DC output current corresponding to the difference flows into the motor 3. That is, the periods T1 and T1 in FIG.
4, a current flows through the circuit of Q5-4c-3-4a-Q2 and the circuit of Q5-4c-3-4b-Q4 in FIG. In the periods T2 and T3, Q1-4a-3-4
A current flows through the circuit of b-Q4 and the circuit of Q5-4c-3-4b-Q4. Now, assuming that T1 = T2 = T3 = T4, the current Iu of the lines 4a, 4b, 4c in the DC mode
, Iv and Iw are shown as average values in FIG. 7 (G) (H).
(I). That is, the current Iu of the first phase line 4a is zero, and currents of opposite directions flow through the second and third phase lines 4b and 4c. Thereby, the electric motor 3 is DC-excited by the unbalanced current. The level of the unbalanced DC current changes depending on the width of the PWM pulse in FIG. In this embodiment, the currents Iu, Iv,
The width of the PWM pulse is controlled so that the effective value (or average value) of Iw does not become larger than the reference value. If the periods T1, T2, T3, T4 in FIG. 7 become shorter, the effective values of the output currents Iu, Iv, Iw become smaller.

Output currents Iu and Iv in DC mode
, Iw is controlled by a voltage adjustment signal supplied from the transmission line 8a to the subtraction means 12 in FIG. In the DC mode, as described above, the DC signal Vdc as shown in FIG. 6A is generated from the sine wave and DC signal generation means 11 of FIG. If the level of the DC signal Vdc is the same in all of the first phase, the second phase, and the third phase, the PWM pulses of the first phase, the second phase, and the third phase are the same. Cannot supply DC current.
However, since the level is adjusted by the sine wave and DC signal generation means 11 so that the first, second and third phase DC signals Vdc are different from each other, the unbalanced P shown in FIG.
A WM pulse is generated and a DC output current flows.

FIG. 5 shows an equivalent circuit for one phase of the overcurrent protection device 8 of FIG. The overcurrent protection device 8 includes, for example, an A / D (analog / digital) converter 20 connected to the first phase current detector 5a, an effective value calculating unit 21, an overcurrent detection reference value generating unit 22, 1, a comparison means 23, an alarm means 24, a DC reference value generation means 25, a second comparison means 26, an output frequency determination means 27, a deviation calculation means 28, a limiter value setting means 29, a third Comparison means 3
0, limiter means 31, and integrator 32.

An AC current in the AC mode or a DC current in the DC mode is input to the A / D converter 20, converted into a digital signal and sent to the effective value calculating means 21. The effective value Ie obtained from the effective value calculation means 21 is equal to the overcurrent detection reference value obtained from the overcurrent detection reference value generation means 22 and the first value.
Are compared by the comparing means 23. If it is determined that the effective value Ie is higher than the overcurrent detection reference value, a gate-off signal is sent from the comparing means 23 to the distribution circuit 10 of FIG. As a result, the generation of the PWM pulse is interrupted, and the switches Q1 to Q6 are turned off.

The alarm means 24 includes an alarm overcurrent reference value generating means having a level lower than the reference value of the overcurrent detection reference value generating means 22, a means for comparing the reference value with the effective value Ie, It comprises a counter for measuring the time during which the effective value Ie is higher than the reference value, and an alarm generator for generating a sound alarm when the output of the counter exceeds a predetermined value. Therefore, the alarm means 24 generates an alarm when a relatively low level of overcurrent flows for a long time.

The DC reference value generating means 25 generates a DC reference value Ir for performing feedback control of the output current in the DC mode, and has a level substantially higher than the reference value of the overcurrent detection reference value generating means 22. It produces a low DC reference value Ir. The second comparing means 26 calculates the DC reference value Ir and the effective value I
Compare with e. The operation by the second comparing means 26 occurs only when the output frequency judging means 27 detects the DC mode in response to the DC mode command. The deviation calculator 28 outputs a signal corresponding to the difference between the effective value Ie and the DC reference value Ir. Note that the deviation calculating means 28 is provided by the comparing means 2
6 operates only when an output of Ie> Ir is generated. In the deviation calculating means 28, A = K (Ie-I
The output indicated by r) occurs. Here, K indicates a coefficient for obtaining an output voltage deviation corresponding to the current deviation. A is a deviation output, which includes information on the magnitude of the current limit.
Therefore, the larger the deviation output A is, the larger the range of decreasing the output voltage of the conversion circuit 2 becomes.

The limiter value setting means 29 calculates the limiter coefficient B
Is multiplied by the target DC output voltage V0 of the inverter to set a limiter value C. The third comparing means 30 calculates the difference signal A obtained from the difference calculating means 28 and the limiter value C.
And the limiter 31 is operated only when A> C. Thereby, the limiter means 31
When A> C, the limiter value C is output, and when A> C is not satisfied, the deviation signal A is output as it is. It should be noted that the limiter 31 determines that the deviation signal A becomes too large and the DC output voltage V
This is provided to prevent 0 from becoming too low and the target DC excitation not being obtained. 4, the output of the limiter 31 is supplied to the subtractor 12 via the integrator 32. Accordingly, in the subtracting means 12, the deviation signal A or the limiter value C is subtracted from the DC signal Vdc, and the feedback-controlled DC output voltage command value is given to the comparator 14, so that the DC current becomes equal to or less than the DC reference value. The voltage is controlled. As a result, the DC current becomes an excessive level, thereby preventing an alarm from being generated from the alarm means 24 and preventing the switches Q1 to Q6 from being destroyed.

FIG. 9 shows the flow of the operation for controlling the direct current. When limiting the DC current to the reference value or less, first, as shown in slap S1, the limiter value setting means 29 of FIG.
Set the reference DC output voltage V0 used in. Also,
In the slap S2, the DC reference value Ir used by the DC reference value generation means 25 is set. Next, slap S3
It is determined whether or not the inverter output frequency is zero. That is, the determination by the output frequency determination means 27 of FIG. 5 is executed. When the output frequency is zero and the output of YES indicating the DC mode is obtained, it is determined in slap S4 whether the effective value Ie is larger than the reference value Ir. The determination of the slap S4 is executed by the comparing means 26 in FIG. When an output of NO indicating that the output frequency is not zero is obtained in slap S3, the AC mode operation is continued as shown in slap S13. When operating in the AC mode, a sine wave is sent to the comparator 14 substantially independently of the multiplying means 12 of FIG. That is, the sine wave is sent directly to the comparator 14. When an output of YES indicating that the effective value Ie is larger than the reference value Ir is obtained in the slap S4, a deviation of Ie-Ir is obtained in the slap S5, and a coefficient B for converting to a voltage in the slap S6.
Is multiplied by the deviation to obtain a deviation signal A. The operations of slaps S5 and S6 for obtaining the deviation signal A are executed by the deviation calculating means 28 in FIG. When an output of NO indicating that Ie> Ir is not obtained at slap S4, the slap S4
As shown in FIG. 14, control is performed to make the execution value Ic equal to the reference value Ir. That is, the sine wave and DC signal generation means 11 shown in FIG.
A reference DC signal for generating M pulses is generated and sent to the comparator 14 as it is regardless of the multiplication means 12. Next, a limiter value C is set in slap S7.
The operation of the slap S7 is performed by the limiter value setting means 2 shown in FIG.
Occurs at 9. Next, it is determined at S8 whether or not A> C. This determination is performed by the comparison means 30 of FIG.
If a YES output indicating A> C is obtained in slap S8, a limiter value C is output in slap S9. Also, A
> C, the slap S
As shown in FIG. 10, the deviation signal A is output as it is. Next, after integrating the slap S11, the DC output voltage in the DC mode is controlled as shown in slap S12, and then the control operation is terminated in slap S13. Slap S
The operation of 12 occurs in the subtraction means 12 of FIG. When the control signal is subtracted from the DC signal Vdc for commanding the sine wave and the reference DC output voltage generated from the DC signal generation means 11 by selectively operating the subtraction means 12 in the DC mode, the level of the DC signal Vdc in FIG. And P in the DC mode shown in FIG.
The width of the WM pulse changes, and the DC output voltage and current change. For example, when the on-time width of the switch Q3 shown in FIG. 7C increases and the on-time width of the switch Q4 in FIG. 7D decreases, the effective value (average value) of the output current decreases.

As is apparent from the above description, according to the present embodiment, it is possible to prevent an overcurrent in the DC mode and suppress occurrence of an alarm. Further, since the effective value calculation means 21 is provided and this output is used in both the AC mode and the DC mode, a value corresponding to the average value of the output current in the DC mode can be equivalently obtained by the effective value, The control system is simplified. Further, since the limiter 31 is provided, it is possible to prevent the DC current in the DC mode from being unnecessarily low.

[0027]

[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) In FIG. 7, for example, the widths of the PWM pulses of the first and third phase switches Q1, Q2, Q5 and Q6 are fixed, and only the widths of the PWM pulses of the second phase switches Q3 and Q4 are changed. The DC output voltage and current in the DC mode can be controlled. (2) Instead of forming the control signal generation circuit 6 and the overcurrent protection device 8 by digital circuits, they can be formed by analog circuits.

[Brief description of the drawings]

FIG. 1 is a diagram showing a relationship between driving of an electric motor and frequency.

FIG. 2 is a diagram illustrating a relationship between an output frequency and an output voltage of the inverter device.

FIG. 3 is a circuit diagram showing an inverter device for driving the electric motor according to the embodiment of the present invention.

FIG. 4 is a block diagram illustrating a control signal generation circuit of FIG. 3 in detail.

FIG. 5 is a block diagram equivalently showing the overcurrent protection device of FIG. 3 in detail;

FIG. 6 is a waveform diagram showing a state of each part in FIG.

FIG. 7 is a waveform diagram showing a state of each unit in a DC mode.

FIG. 8 is a waveform diagram showing a state of each unit in the AC mode.

FIG. 9 is a flowchart showing an overcurrent protection operation in a DC mode.

[Explanation of symbols]

 2 DC-AC conversion circuit 3 AC motor 5a, 5b, 5c Current detector 8 Overcurrent protection device

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[Procedure amendment]

[Submission date] August 29, 1997

[Procedure amendment 1]

[Document name to be amended] Drawing

[Correction target item name] Fig. 4

[Correction method] Change

[Correction contents]

FIG. 4

Claims (2)

[Claims] 1. A method for supplying power to a three-phase AC motor from a variable frequency / variable voltage type three-phase inverter device, wherein the three-phase AC motor is driven during a DC excitation period before starting the AC motor or during a braking period after stop control. The conversion switch of the inverter device is controlled so that a DC output voltage is obtained from the inverter device, an output current of the inverter device is detected, an effective value or an average value of the output current is obtained, and the detected current value is calculated. The value corresponding to the difference between the detected current value and the reference current value is obtained, and the inverter device is controlled so that the detected current value is limited to the reference current value or less based on the value corresponding to the difference. A method for controlling a three-phase inverter device, comprising: controlling a conversion switch. 2. A variable frequency / variable voltage type three-phase inverter device for supplying electric power to a three-phase AC motor, comprising: a DC excitation period before starting the AC electric machine, or a braking period after stop control. Means for controlling the conversion switch of the inverter device to obtain a DC output voltage from the inverter device; current detection means for detecting an output current of the inverter device; and the output current detected by the current detection device Calculating means for obtaining an effective value or an average value of the detected current value and outputting the detected current value as a detected current value; and obtaining a value corresponding to a difference between the detected current value and a reference current value, and performing the detection based on a value corresponding to the difference. Means for controlling the conversion switch of the inverter device such that a current value is limited to the reference current value or less.