JPS59101949A - Insulation type digital signal transmitting circuit - Google Patents

Abstract

PURPOSE:To output an input signal in a balance differential shape of H and L states and to improve an S/N ratio by converting the input signal to an AC signal by a clock, rectifying the AC signal outputted through a pulse transformer, and also applying the rectified switch switching signal to a switch part. CONSTITUTION:Input data is converted to an AC signal by synchronizing with a clock by a circuit consisting of an inverter 27, AND gates 28, 29 of an open collector, and pulse tranformers 30, 31. This AC signal is rectified by rectifying circuits 32, 33, and when switch changeover signals 34, 35 are in an H state, switch parts 38, 27 are set to an on-state, respectively. Also, a DC output A of the circuit 32 is provided to one end of the switch part 37 and an external load 41, a DC output B of the circuit 33 is provided to one end of the switch part 38 and the load 41, and the other ends of the switch parts 37, 38 are connected to the negative pole side of the circuits 32, 33. In this state, the input data is supplied to the load 41 as an output of a balance differential shape of H and L states, and the influence of a noise is offset.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a balanced differential type NRZ (/y return zero) digital signal transmission circuit in which an input side and an output side are insulated by a pulse transformer.

For data transmission between various control controllers incorporating microprocessors and peripheral input/output devices,
A transmission circuit with high noise resistance, voltage resistance, and reliability is required. By the way, generally speaking, digital is used as a transmission circuit.
There are two types: One of them is an unbalanced transmission circuit, and the other is a balanced differential transmission circuit. The former requires the use of one common ground line even if there are a plurality of signal lines, and although the number of signal lines per circuit is small and the transmission line can be simplified, it has the disadvantage of being susceptible to noise. On the other hand, the latter uses a differential circuit in which the polarity of the signal transmitted through the two signal lines alternately switches between positive and negative.
This has the advantage that the induced noises cancel each other out and the noise resistance is improved compared to the former. Therefore, unbalanced transmission circuits are used for relatively short distances in good noise environments, and balanced differential transmission circuits are used for relatively long distance transmissions.

Next, an example of the basic configuration of a balanced differential transmission circuit is shown in FIG. 1, and its outline will be explained.

At the transmitting station 1, a digital signal created by a transmission data creating section 2 is placed on a transmission line 4 via a line driver 3.

The transmission line 4 is generally a twisted pair wire in order to reduce the influence of magnetically induced noise. At the receiving station 5, the transmitted data is processed by a received data processing unit 6 via a line receiver 7. The transmission distance is long,
If the noise environment is bad, a balanced differential circuit that isolates the transmitting and receiving stations using a pulse transformer can be used to improve noise resistance compared to the transmission circuit shown in Figure 1 and to provide voltage resistance between the transmitting and receiving stations. It is desirable to use a type transmission circuit.

FIG. 2 is a circuit diagram showing an example of a conventional isolated balanced differential transmission circuit using a pulse transformer.

This circuit has the same function as the line driver 3 in FIG. In FIG. 2, 13 and 14 each indicate a pulse transformer.

Next, with reference to FIG. 2, an outline of the insulation mode using the pulse transformer and the basic operation of the circuit will be described.

A pulse transformer transmits the potential difference between both ends of the primary coil as a potential difference between both ends of the secondary coil by changing the current flowing through the primary coil. Limited to alternating current with voltage and one frequency.

Therefore, by simply connecting a pulse transformer to the output side of the line driver 3 shown in FIG. 1, direct current and long-cycle input data cannot be transmitted. Therefore, it is necessary to convert the transmission data into an AC signal with a short period, input it to the primary side of the pulse transformer, and reproduce the AC signal output from the secondary side into the original data again.

In FIG. 2, the clock has a sufficiently shorter cycle than the data cycle. When the data is at the "no.i" level, an inverted clock output is output from the gate 8, and the output from the gate 10 is always at the "6 no.i" level.

Therefore, only the pulse transformer 13 operates, and the output voltage on the secondary side is generated in synchronization with the clock. The generated current is smoothed by the capacitor 17 through the diode 15, and this current turns the transistor 21 on. With the transistor 21 turned on, a positive voltage is supplied from the external power supply 23 from the output terminal 25. The current from the line driver buffer in receiving station 5 (FIG. 1) is returned to external power supply 23 via output 26.

On the other hand, when the data is at "low" level, as above,
Only the pulse transformer 14 operates, and the diode 16. Through the capacitor 18, the transistor 22 is turned on. Therefore, a voltage opposite to the above is generated at the output terminals 25 and 26.

The conventional isolated balanced differential output circuit shown in Fig. 2,
An external power supply 23.24 is required in the circuit on the secondary side of the pulse transformer 13.14.

Unfortunately, it is necessary to supply an external power source from the receiving station 7, which involves the complexity of preparing a power source in addition to the signal line. Furthermore, if the supply of external power is interrupted due to a power supply failure, cable breakage, etc., data transmission will no longer be possible, which will place a great burden on reliability. Furthermore, in conventional circuits, the output voltage is dependent on an external power supply;
There is a drawback that a new external power supply must be prepared if it is necessary to change the output voltage.

In contrast, the present invention was made to solve the problems in the conventional isolated balanced differential output circuit as described above, and also to provide a highly reliable isolated digital output circuit that does not require an external power supply. The purpose is to provide a signal transmission circuit.

The main point of the configuration of this invention is that in a balanced differential digital transmission circuit insulated by a pulse transformer, a digital input signal is converted into an AC signal by a clock, and the converted AC signal is outputted via the pulse transformer. By converting the input data signal into direct current using a rectifier circuit and simultaneously applying a switch switching signal output from the rectifier circuit to the switch section, the "high" and "crow" states of the input data signal can be converted into a balanced differential type output. The point is that it is configured so that it can be output.

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 3 is a circuit diagram showing one embodiment of the present invention, and FIG. 4 is a timing chart of various signals in FIG. 3.

In FIG. 3, a circuit comprised of an inverter 27, open collector buffers 28, 29, and pulse transformers 30, 31 is a part that converts data into alternating current synchronized with a clock signal.

When the data signal is ``no'', one input of the open collector buffer 28 is ``no'', and the open collector buffer 28 is ``on'' only when the clock is ``no''. Therefore, the current from Vcc flows into the open collector buffer 28 via the primary coil of the pulse transformer 30.

A voltage ±Vp (Vp=VccXn) proportional to the turns ratio is generated in the secondary coil of the pulse transformer 30.

At this time, since the output of the inverter 27 is "low", the open collector buffer 29 is "off" regardless of the clock input, and no voltage is generated in the secondary coil of the pulse transformer 310.

On the other hand, when the data signal is "low", the open collector buffer 28 is turned "off" and the open collector buffer 29 is turned "6" as described above.

Since the pulse transformer 31 is repeatedly turned off, a voltage Vp is generated in the secondary coil of the pulse transformer 31.

The timing relationships of the above signals are shown in Figure 4.
The timing charts (■ to ■) show the case where the lock (■) and the data (■) are given.

However, ■ is the output waveform of the inverter 27, and ■ is the output waveform of the buffer 72.
8 is the output waveform, ■ is the output waveform of the buffer 29, ■ is the output of the secondary coil of the pulse transformer 30, and ■ is the output of the secondary coil of the pulse transformer 31.

In FIG. 3, rectifier circuits 32 and 33 and switch section 3
7. The circuit configured as shown in section 38 is a part that reproduces the data signal converted into alternating current by the aforementioned circuit as a balanced differential type output signal. Here, the switch switching signal 34 becomes "high" only when a voltage is excited in the secondary coil of the pulse transformer 30. The switch unit 38 is turned on only when the switch changeover signal 34 is Pa..I''.

In addition, the switch changeover signal 35 is applied to the second pulse transformer 31.
When the voltage is excited in the next coil, the switch section 37 becomes "on" when the switch switching signal 35 is "high" due to the signal that becomes "no".

When the data signal is ``No・I'', the above-mentioned conversion circuit
Voltage ±V generated in the secondary coil of the pulse transformer 30
p is converted into direct current by the rectifier circuit 32,
The output A of 2 has +Vp with reference to the reference potential point 036.
voltage is generated. At the same time, the switch switching signal 34 detected by the rectifier circuit 32 becomes "high", and the switch section 3
8 is turned on. At this time, no voltage is generated from the rectifier circuit 33, and the switch changeover signal 35 is 1" low.

The switch section 37 is turned off. Therefore, the output terminal 3
9 outputs a voltage of +■p with respect to the output terminal 40, and the current flows through the external load 41, the output terminal 40, and the switch section 38.
It returns to the reference potential point 036 via .

When the data signal is 10-”, the output B of the rectifier circuit 33
A voltage of +Vp is generated with reference potential point G36 as a reference, and the switch changeover signal 35 becomes "high" and the switch section 3
7 turns on 1". Therefore, the output terminal 4o is turned on at the output terminal 39.
Since a voltage of -Vp is output with reference to G, the current flows from the output terminal 40 to the external load 41, the output terminal 39, and the switch section 37 to the reference potential point G36, contrary to the former case.
to return to. The relationship between the output of the secondary coil of the pulse transformer 30, 31 (7), the output of the rectifier circuit 32, 33, the output of the switch switching signal 34, 35, and the output terminal 39, 40 is as follows.
This is shown in timing charts ① to 0 in FIG. In addition, ■ is the rectifier circuit 32 output A, and ■ is the rectifier circuit 33 output B.
, hjVi switch switching signal 34.0 is switch switching signal 35, @ is output terminal 39.40 voltage output.

As mentioned above, the input signal of the switch section is at the reference potential point 0.
The fact that a positive or negative voltage is generated with reference to 36 and the switch changeover signal 34°35 is shown in FIG.
0) and 0 are alternately turned on, so the output terminal voltage O appearing as an output is a balanced differential voltage of ±Vp according to the input data signal "high" and "low II K. The transmission waveform is as follows.

Next, the rectifier circuits 32 and 33 and the switch section 37 in FIG.
．． An example of a specific circuit for realizing 38 is shown in FIG. 5, and an outline of its operation will be described. In FIG. 5, a circuit consisting of an inverter 27, open collector pixel 7a 28, 29, and pulse transformers 30, 31 has the same structure as the converter shown in FIG. teriode 42,
A circuit indicated by a capacitor 44 and a resistor 46 replaces the rectifier circuit 32 and switch changeover signal 34 in FIG. 35
corresponds to Transistors 48 and 49 in FIG. 5 correspond to the switch portions 37 and 38 in FIG. 3, respectively.

When the data signal is high, the output of the pulse transformer 30 is an alternating current synchronized with the clock, and is rectified and smoothed by the diode 42 and capacitor 44.The charge stored in the capacitor 44 is used to limit the current. The current flows from the base B of the transistor 49 to the emitter E of the transistor 49 through the resistor 46, and the transistor 49 is turned on. Therefore, the output current passes through the positive side output terminal 39 of the capacitor 44, the external load 41, the output terminal 40, and the transistor 49, and returns from the reference potential point G36 to the negative side of the capacitor 44.

Therefore, the output terminal 39 has +Vp with respect to the output terminal 40.
A potential difference of .

Conversely, if the data signal is 60-'', pulse transformer 3
1 is excited, the DC current rectified and smoothed by the third diode 43 and the capacitor 45 flows through the resistor 47.
from the base B of transistor 48 to the emitter E of transistor 48, turning transistor 48 "on." Therefore, the output current is from the positive side of the capacitor 45 to the output terminal 40. It passes through the external load 41, the output terminal 39, and the transistor 48, and is fed back from the reference potential point G36 to the negative side of the capacitor 45. Therefore, the output terminal 39 has −vp with respect to the output terminal 40.
A potential difference of . It can be seen that the above operation allows this circuit to perform the same operation as the switch sections 37 and 38 in FIG. 3.

The operation of the switch sections 37 and 38 in FIG. 3 is realized.

In addition to the method shown in this example, N-channel J-FET, V
It is also possible to use a switch circuit using channel MO8-, -FET.

According to this invention, a human power data signal is converted into a signal synchronized with a clock, and the human power side and output III are isolated by passing it through a pulse transformer, and then the DC voltage generated by the rectifier circuit is By switching between the switch switching signal and the switch section, a balanced differential voltage is output to the transmission line, so the following effects can be obtained.

b) The switch unit that reproduces the converted input data does not require an external power supply as in the past, so there is no need for a power supply from the receiving side, and the complexity of providing an external power supply circuit including a power line is eliminated. This can be significantly reduced.

By providing an external power source, it is possible to prevent a decrease in the reliability of the transmission system due to failure of the accompanying power source, cable breakage, etc., and it is possible to provide a highly reliable transmission circuit.

c) By decreasing the clock frequency, the BT product of the pulse transformer and the dimensions of the Kehals transformer can be reduced, so the circuit mounting efficiency is increased.

Note that the BT product represents the product of the voltage that can be transmitted without saturating the core of the pulse transformer and the pulse width, and the larger the ET product, the larger the dimensions of the pulse transformer.

2) Since the output voltage can be set arbitrarily by changing the turn ratio of the pulse transformer, it is possible to construct a transmission system with flexibility in changing the line receiver in the receiving station.

e) The data signal that is input to this transmission circuit does not necessarily have to be synchronized with the clock, making it more versatile.

f) As shown in the specific circuit of FIG. 5, the present invention can be realized with a simple circuit with a small number of parts, and has a high cost advantage.

This invention makes it possible to realize a balanced differential digital signal transmission circuit that does not require an external power supply and has high reliability and noise margin. It can also be applied to application fields such as short-range communication between devices, controllers, and long-distance transmission between process input and output devices.

In addition, as an application field other than transmission circuits, inverters (
It is also applicable to DC/AC converter) circuits.

[Brief explanation of drawings]

Fig. 1 is a schematic diagram showing an example of the basic configuration of a balanced differential digital transmission circuit, Fig. 2 is a circuit diagram showing an example of a conventional isolated balanced differential digital transmission circuit, and Fig. 3 is a schematic diagram showing an example of a conventional isolated balanced differential digital transmission circuit. A circuit diagram showing one embodiment of the invention, FIG. 4 is a timing chart of signals of each part in FIG. 3, and FIG. 5 is an example of a specific switching circuit that can be used as the switch section 37 or 38 in FIG. 3. It is a circuit diagram showing. DESCRIPTION OF SYMBOLS 1... Transmission station, 2... Transmission data creation part, 3... Line driver, 4... Transmission line, 5...
. . . Receiving station, 6 . . . Received data processing unit, 7
...Line receiver, 8,10,28.29...Open collector NAND gate, 9.27...Inverter, 11.12,19,20,46.47...Resistor, 13.14, 30.31...Pulse transformer, 1
5゜16.42.43...Diode, 17.18゜44.45...Capacitor, 21,22,48゜49
...Transistor, 23.24...External power supply, 25
．． 26.39.40... Output end, 32.33... Rectifier circuit, 34.35... Switch switching signal, 36...
・Reference potential point G, 37.38...Switch section, 41・
...External load.

Claims (1)

[Claims] A means for converting a digital signal to be transmitted into an alternating current signal using a clock signal and outputting each according to the digital signal value, and an alternating current signal outputted from the means according to the digital signal value, respectively The first .applied to the side winding. a second pulse transformer; Second
The first . a second rectifier circuit; first and second switching means, each of which is connected in parallel to the second rectifier circuit, and to which the output voltage of the other rectifier circuit that is not connected in parallel is supplied as a switching signal; An isolated digital signal transmission circuit characterized in that a balanced differential output of the digital signal to be transmitted is obtained between the series connected circuit terminals of the second switching means.