JPS59100880A - Testing apparatus for image pickup device - Google Patents

Abstract

PURPOSE:To remove the influence of shading and to attain a test in a short time by reading out measuring data and offset data simultaneously from two selected memory blocks and subtracting the outputs from the memory blocks to transfer the subtracted output to a data processor. CONSTITUTION:A selecting signal generator 507 selects a memory block storing offset data out of memory blocks M1-M16 and a selecting signal generator 508 selects a memory block storing measuring data. The offset data read out from a memory body 503 are supplied to an input terminal 506a of a subtractor 506 through a gate 504. The measuring data read out from the memory body 503 are inputted to an input terminal 506b of the subtractor 506 through a gate 505 and the subtracted result is obtained simultaneously with the reading-out. When the subtracted result is transferred to the data processor 108, the processor 108 compares the photoelectric conversion data from which the influence of shading is removed with an expected value, so that the test can be performed in a short time.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an imaging device tester for testing a solid-state imaging device called an image sensor or the like, or a television camera incorporating this solid-state imaging device. It is an object of the present invention to provide a test device having a means for performing arithmetic processing at high speed to eliminate the influence caused by such factors.

Further, the second invention of this application attempts to provide an imaging device tester that allows the number of photoelectric conversion cells of a solid-state imaging device to be tested to be freely selected regardless of the memory capacity of the tester.

<Background of the Invention> Solid-state image sensors have been developed and are being put into practical use for the purpose of downsizing and reducing power consumption of television cameras. As is well known, in a solid-state image sensor, a large number of photoelectric conversion cells made of semiconductors are arranged on one side, and the photoelectric conversion cells are sequentially selected one by one using a selection signal to adjust the amount of light irradiated to the photoelectric conversion cells. Corresponding pixel signals are obtained, and the selection of the photoelectric conversion cells is sequentially switched to perform surface scanning to obtain image signals.

Since each photoelectric conversion cell is formed on a semiconductor substrate using integrated circuit manufacturing technology, it is conceivable that defects may occur in the photoelectric conversion cells during the manufacturing process. Therefore, it is necessary to test whether each photoelectric conversion cell operates normally.

Various test items are considered for testing solid-state image sensors, but one method is to irradiate uniform light onto the solid-state image sensor and measure the photoelectric conversion of each photoelectric conversion cell while receiving the uniform light. The converted value is extracted and compared with a predetermined expected value, and a cell that outputs a photoelectric conversion value that is significantly different from the expected value is determined to be defective. A possible method is to determine whether a solid-state image sensor is good or bad based on the number of solid-state image sensors.

<General description of the solid-state image sensor tester> FIG. 1 shows the overall configuration of the solid-state image sensor tester. In the figure, 101 indicates a solid-state image sensor to be tested. This solid-state image sensor 101 is a CCD
It does not matter whether it is a 3D or MO8 format, or a CPD format that has these features. These types differ only in the formal structure of the photoelectric conversion cell and the method of transferring charges from the photoelectric conversion cell, but can be considered to have the same optical characteristics.

Reference numeral 102 denotes a drive circuit that provides a cell selection signal to the solid-state image sensor 101. It is assumed that the drive circuit 102 selects and scans each of the CCD, MO8, and CPD type solid-state image sensors according to the arrangement of their respective photoelectric conversion cells, and sequentially obtains pixel signals. This scanning speed can be set equal to the standard scanning speed for television signals.

A pixel signal 103 obtained from the solid-state image sensor 101 is amplified by a preamplifier 104 and provided to an AD converter 105. The AD converter 105 AD converts the pixel signal in synchronization with the clock pulse 100 applied from the drive circuit 102, and converts it into, for example, an 8-bit digital pixel signal.

The pixel signal AD-converted by the AD converter 105 is taken into the data memory 106. The data memory 106 counts the clock pulses given from the drive circuit 102 by the address counter 107, and the address is sequentially incremented by one address based on the count output, and the digital pixel signals output from the AD converter 105 are sequentially stored.

The digital pixel signals captured in data memory 106 are sequentially transferred to data processor 108. This data processor 108 has various comparison and determination means,
This determining means determines the quality of the photoelectric conversion cell and the quality of the solid-state image sensor 101 as a whole.

109 is a controller. This controller 109
It starts and stops the drive circuit 102 and controls the data processor 108. Further, a control signal is given to the optical control system 111 to perform control such as gradually changing the amount of light from the light source 112 as the test progresses.

Reference numeral 113 denotes a monitor, which converts the digital pixel signals taken into the data memory 106 from analog to analog to display an image on the screen based on the pixel signals obtained from each photoelectric conversion cell.

<Problems in Executing Tests> Solid-state imaging devices are tested using the configuration roughly shown in FIG. 1, but the following problems exist in executing the tests.

(2) Since the photoelectric conversion output output from the image sensor 101 is a minute level analog signal, it has a poor signal-to-noise ratio and is easily contaminated with noise.

(2) Differences occur in the dark current of each photoelectric conversion cell, or uneven light intensity occurs due to distortion of an optical lens, etc., and this causes a phenomenon in which the photoelectric conversion value outputs a different value for each photoelectric conversion cell. This phenomenon is called shading.

Figures A, B, and C show examples of the effects of shedding. In the figure, the horizontal axis shows the scanning position of the photoelectric conversion cell, and the vertical axis shows the photoelectric conversion output value. As shown in this example, there is a phenomenon in which the photoelectric conversion output differs depending on the position of the photoelectric conversion cell due to dark current or uneven light intensity.

If the test were performed without removing the influence of this shading, even if the photoelectric conversion characteristics, that is, the sensitivity characteristics, etc. of each photoelectric conversion cell were the same, it would be determined to be a defective product. When assembled and used as a camera, the circuit is designed to eliminate the effects of these shadings, so if the sensitivity characteristics etc. are normal, it should be judged as a good product.

In order to solve the above-mentioned problem (2), the influence of noise can be removed by extracting the photoelectric conversion output from each photoelectric conversion cell multiple times and averaging the multiple photoelectric conversion outputs. Therefore, it is assumed that the pixel take taken into the data memory 106 shown in FIG. 1 is the average value of a plurality of times.

This average value can be obtained by adding the digital pixel data each time and taking in the carry-over high-order bit signal.

On the other hand, to remove the influence of shedding, Figure 2A
Offset components due to shading as shown in , B, and C (average value of each photoelectric conversion cell when given the amount of light)
This can be realized by loading the offset component in the memory in advance and sequentially subtracting the offset component loaded in the memory from the measurement data having the average value when changing the amount of light to another light amount.

For this reason, the data memory 106 shown in FIG. 1 has a memory having a capacity to store one screen of the solid-state image sensor 101 as one memory block, and that memory block is divided into multiple memory blocks as shown as Ml-Ml6 in FIG. The offset component B is stored in one of the plurality of memory blocks M 1 =Ml6. The example in FIG. 3 shows a case where offset component B is stored in Mz.

The photoelectric conversion value A obtained when the light intensity is changed and the conditions are changed is stored in the memory block M8. The offset component B is subtracted from this photoelectric conversion value A, and the result of this subtraction is compared with an expected value in the data processor 108.

Although the influence of shading is removed in this way, it is conceivable that the computer provided in the data processor 108 performs calculations to obtain data from which the offset component B has been removed. FIG. 4 shows a program for performing calculations on a computer. In step ■■, the data of the corresponding photoelectric conversion cells is extracted from the memory blocks M3 and Mz+. In step (3), data B taken out from memory block M11 is subtracted from data A taken out from memory block M8, and A -
Find B=C. This calculation result C is stored in the memory provided in the data processor 108 in step (3). Execute the operations of steps ■ to ■ for each photoelectric conversion cell,
The offset component B is stored in the memory provided in the data memory 108.
Obtain data with .

As described above, the arithmetic processing by the computer involves reading out data alternately from the memory blocks M3 and Mll for each photoelectric conversion cell and performing the arithmetic processing, which has the disadvantage of being time consuming. For this reason, there are disadvantages in that it takes a long time to test one solid-state image pickup device, and in order to test a large number of devices, a large number of expensive testers must be prepared.

Objective of the First Invention> The first invention of this application provides a solid-state image sensor tester that can perform arithmetic processing for removing offsets in a short time, and thus can test many solid-state image sensors in a short time. This is what I am trying to do.

Summary of the First Invention> In the first invention of this application, a plurality of memory blocks are configured so that they can be read out simultaneously in parallel, and in this way, the memory blocks storing takes A and B are read out simultaneously, The readout output is applied to a subtracter, the subtraction result is immediately obtained from the subtracter, and the subtraction result is transferred to the data processor 108.

Therefore, according to the first invention of this application, the subtraction result can be obtained at the same time as the memory block containing the data A and B is read, and the calculation result C can be obtained in a short time. Therefore, there is an advantage that the time required for the test can be shortened accordingly.

<Embodiment of the first invention> FIG. 5 shows an embodiment of the first invention of this application.

In FIG. 5, Ml, M2. Ma...Ml6 is the third
This is the memory block explained in the figure. Since each memory block M1 to M16 has the same structure, only memory block M1 will be described in detail here. In other words, each memory block M1 to 1v116 has memory selectors 501 and 5.
02 is provided. These memory selectors 501 or 5
By outputting a select signal from 02, the memory main body 503 is selected and a read operation or a write operation is performed.

At the same time, one of the gates 504 and 505 is controlled to be open by the select signal of the block selectors 501 and 502, and the readout output of the memory main body 503 is supplied to one of the input terminals 506a and 506b of the subtracter 506. .

Block selectors 501 and 502 have multiple memory
The selection is made by block select signals output from block select signal generators 5.07 and 508, which constitute means for simultaneously reading blocks. The block select signal generator 507 selects a memory block storing offset data from among 916 memory blocks Ml-fVII6 using, for example, a 4-bit address signal.

It is assumed that the block select signal generator 508'-I'i still selects the memory block containing the measured data.

For example, the block select signal generator 507 generates address signals such as IQ, 0, 1 . When IJ is output, memory block M3 is selected and the memory main body 503 of memory block M3 performs a read operation.

When memory block M8 is selected by block selector 501, gate 5o4 of memory block M3 is controlled to be open. Therefore, memory selector M3
The offset data read from the memory main body 503 of
supplied to

On the other hand, from the block select signal generator 508, for example, ro
, O, O, and IJ, the block selector 502 of memory block Ml is selected. By selecting this block selector 502, memory block M
+ memory body 503 is not in read operation state, gate 5
05 is controlled to be open. Therefore, the measurement data read from the memory main body 503 of the memory block Ml is sent to the gate 50.
5 to the input terminal 506b of the subtracter 506.

Reference numeral 509 indicates an address signal generator that provides an address signal to the memory main body 503 provided in each memory block M1 to lv'l I6. This address signal generator 509
The address signal output from each memory block M]~
The block select signal generators 507 and 508 described above are supplied to all the memory bodies 503 provided in the Ml et al.
Memory body 503 of the memory block selected by
Only the read operation is executed by this address signal.

When writing, the block select signal generator 507 or
Select one memory block from either one of 08,
A to the memory body 503 of the selected memory block.
Digital pixel data from the D transformer 105 is stored. For this storage, if the number of bits of the AD converter 105 is set to 8 bits, the number of storage bits of the memory body 503 is set to 16 bits, and the AD conversion values output from the AD converter 105 are integrated 128 times, the memory Main body 3
The average pixel data for 128 times can be obtained from the upper 8 bits of 05.

<Operations and Effects of the Invention> As described above, according to the present invention, two memory blocks are selected by the block select signal generators 507 and 508, and measurement data A and offset data B are obtained from the two selected memory blocks. Since the signals are read simultaneously and the read output is subtracted by the subtracter 506, the subtraction result can be obtained at the same time as the read. Therefore, this subtraction result is the first
By transmitting the photoelectric conversion data to the ζ data processor 108 (explained in the figure), the agitator processor 108 can compare the photoelectric conversion data from which the influence of shedding has been removed with the expected value, making it possible to perform a test in a short time.

<Description of the Second Invention> In the first invention described above, the data of each photoelectric conversion cell of the solid-state image sensor 101 is stored in the memory main body 503 provided in each of the memory blocks M1 to M16. However, the number of cells in the solid-state image sensor 101 is 512×5, for example.
Twelve are considered standard, but others are possible. Therefore, the number of photoelectric conversion cells is
If the capacity exceeds the capacity of the memory main body 503 provided in [1-M]6, the test becomes impossible.

A second invention of this application is to provide an imaging device tester having a structure that allows one test to be performed even when the number of photoelectric conversion cells of the solid-state imaging device 101 becomes larger than the capacity of the memory main body 503. It is.

Example of the second invention FIG. 6 shows an embodiment of the second invention of this application.

In the second invention of this application, a means is provided for reading out adjacent memory blocks continuously as necessary.

For this? 1] Eha block select signal generator 5
Adders 601 and 602 are provided on the output side of 07 and 508,
This can be realized by supplying the carry output of the address generator 509 to the adders 601 and 602 and adding the carry output of the address generator 509 to the block select signal. The added value of the adders 601 and 602 is calculated by the data processor 1 when the address signal of the address generator 509 reaches a predetermined address of the adjacent memory block.
It is reset by control commands 603 and 604 from 08 and returned to the starting address of the original memory block.

<Operations and Effects of the Second Invention> According to the second invention shown in FIG. 6, adjacent memory blocks can be successively accessed as necessary.

Therefore, for example, even if the number of photoelectric conversion cells of the solid-state image sensor 101 becomes larger than the storage capacity of the memory block M l -M t 6, adjacent memory blocks can be accessed as necessary. Therefore, it is possible to freely test solid-state imaging devices of various sizes and to freely test highly versatile solid-state imaging devices, thereby providing a highly versatile solid-state imaging concentrator tester.

In the above description, a solid-state image sensor is used as the object to be tested, but a camera using a solid-state image sensor can also be used as the object to be tested. If a camera is used as the test object, the optical system including the solid-state image sensor and the signal processing circuit output from the solid-state image sensor can also be tested, making it a comprehensive test.
It is possible to carry out experiments.

[Brief explanation of the drawings] Fig. 1 is a block diagram for explaining the entire solid-state image sensor, Fig. 2 is a block diagram 7 for explaining the effects of edging that occurs in the solid-state image sensor, and Fig. 3 is a block diagram for explaining the entire solid-state image sensor. Figure 1 is a diagram explaining the configuration of the data memory explained in Figure 1, Figure 4 is a flowchart explaining the program required for the calculation to remove the influence of the conventional 7-a-ten, and Figure 5 is a flowchart explaining the program required for the calculation to remove the influence of the conventional 7-a-tenks. FIG. 6 is a block diagram showing an embodiment of the first invention of the application, and FIG. 6 is a block diagram showing an embodiment of the second invention of the application. 101: Same body image sensor, 106: Data memo 18M 1
-Ml 6: Memory block, 507,508°50
9: Means for simultaneously reading photoelectric conversion values taken into different memory blocks, 506: Arithmetic unit for processing data read from memory blocks 601, 602:
A means of accessing adjacent memory blocks consecutively. Patent applicant: Takeda Riken Kogyo Co., Ltd. Agent
Takuo Kusano 1 Figure 3 Figure Oki 2 Figure

Claims (1)

[Claims] (1) A. A data memory composed of a plurality of memory blocks; B. Means for storing photoelectric conversion values with different light receiving conditions in different memory blocks of this data memory; C1. An imaging device tester comprising means for simultaneously reading out converted values; and D. an arithmetic unit for processing the read output. (21A, a data memory constituted by a plurality of memory blocks; B, means for storing photoelectric conversion values with different light reception conditions in different memory blocks of this data memory; and C0 a means for storing photoelectric conversion values taken into these different memory blocks. D. means for processing the read output; and E. means for successively accessing mutually adjacent memory blocks of the memory blocks.