JPS5899069A - Signal processor for image sensor - Google Patents

Abstract

PURPOSE:To obtain accurate detection information, by comparing a video output from a detection section with a plurality of slice levels each having a different value in a comparison section, and outputting the optimum slice level. CONSTITUTION:A detection section 1 is provided with many photodetectors 2 to detect the detected light from a body 4 to be detected, and generates video signal where a voltage proportional to an amount of photodetection of the photo detectors 2 appears in time series. The video output VS from the detection section 1 is applied to one input terminal of comparison circuits 9, 10, 11 from a terminal 7, and slide level signals VH, VM and VL given from reference terminals 12, 13 and 14 are inputted to the other input terminal for comparison. Each output is fed to output terminals 20, 21 and 22 via buffer circuits 17, 18 and 19 respectively. The optimum slice video output signal is picked up as a detection slice video output signal.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal processing apparatus for an image sensor that optically detects an object to be detected.

Conventionally, an image sensor optically detects detection information such as the position, shape, diameter, length, thickness, etc. of a detected object using an automated fin, etc., and uses a large number of detection lights from the detected object. The detection unit consisting of a photodiode as a light-receiving element receives light through an optical lens, and by extracting signals in time series from each of the many photodiodes, the video output is generated sequentially from the photodiode. is applied to a comparator and compared with the reference slice Vbeμ of the comparator to generate a slice video output, and the detection information is obtained from this slice video output. However, in the above conventional configuration, the amount of detection light varies depending on the type of object to be detected.
The size of the video output from the detection section also varies, so the reference slice level N in the comparison section [if not adjusted appropriately to an appropriate value, the detection information will be distorted, so the adjustment setting of the reference slice level. It was 4, which was tough.

The present invention was made in view of the above circumstances, and its purpose is to eliminate the need for adjusting the reference slice level.

A signal processing device for an image sensor that can obtain accurate detection information.

An embodiment of the present invention will be described below with reference to the drawings.

First, we will discuss the general structure of Image Seven according to Figure 1. 1 is a detection unit, which has a divisor of, for example, 20.
48 (2048 pieces)) photodiodes 2 which are light receiving elements are arranged in a straight line, and the 204 pieces are arranged in a straight line.
The eight photodiodes 2 are set so that they can each take out a signal in time series by receiving light. 3 is the detected object 4
The optical lens is an optical lens that allows the detection unit 1 to receive the detection light 5 from the camera.
and a focus adjustment horizontal groove (not shown).

Now, according to FIG. 2, the electrical configuration of the signal processing equipment will be described. Reference numeral 7 denotes an input terminal to which a video output signal Vi sequentially outputted as a voltage proportional to the amount of light received from each of the 2048 photodiodes 2 of the detection section 1 is supplied. Comparison circuit 9.1
0 and 11, and the other input terminal of the comparator circuits 9.10 and 11 is connected to the reference terminal 1.
2.13 and 14, respectively. In this case, the comparator circuits 9.10 and 11 each have a video output signal v1 applied from the input terminal 7 to one input terminal and a reference terminal 12.13 and 14 applied to the other input terminal as described later.
Slice level signals va, VM and V given from
When the level μ of the video output signal Vs is greater than the level μ of the slice level signals VH, VM, and VL, the slice video output at a high level (It No. 8LVu, 8LVM and 8LVL I Husband J
It is designed to be output. The output terminals of the comparison (8) circuits 9.10 and 11 are connected to buffer circuits 17.18.
and 1# to the output terminals 20, 21 and 22 through each separately. and the comparator circuits 9.10 and 1
The output terminal of the gate circuit 23 is connected to each input terminal of the gate circuit 25, and the output terminal of the gate circuit 23 is connected to the latch circuit 24.
and 25 control terminals. The output terminals of the comparison circuits 9, 10 and 11 are connected to each input terminal of the latch circuit 25. 26 is a counter foot, and its tarlock terminal OK is connected to the clock input terminal 27 by a pseudo I! The clear terminal OL is connected to the star F input terminal 2B, and each output terminal is connected to each input terminal of the petit circuit 24! I'm being treated like that. This own p26 has a count capacity corresponding to the number of photodiodes 2, which is 2048 pieces. Further, the tarot input terminal 27 is supplied with the tarotsuta pulse OF from the tarotsuta pulse generation circuit (not shown), and the star F input terminal 28 is supplied with the tarotsuta pulse OF from the tarotsuta pulse generation circuit (not shown).
An F bus 8r is provided. In this case, the detection '1s102048 diodes 2
The signal was set to be taken out in chronological order from each clock bus in synchronization with this clock bus ~yLOP, and 2048 vine pulses OF were output from the star F bus, 8 PH, and crofter bus generation circuit. After that, after it becomes possible to take out a signal from the 1st (1st bit) photodiode 2 and after it becomes possible to take out a signal from the 2048th (2048th bit) photodiode 2, it is output. It has become. Therefore, (5) the counter 26, to which the clock terminal ON is given the star pulse OF and the clear terminal OL is given the star pattern μ thickness 8P, receives the signal every time the 2048-bit photodiode 2 can sequentially take out a signal. Correspondingly, the count value becomes r204sJ and is cleared to "0" after natsuhiki, and as a result, the count value becomes r204sJ.
The 260 count value is the number of bits of photodiode 2.
Is it true? This will show whether it is ready to be taken out. On the other hand, each output terminal of the petit circuits 24 and 25 is connected to each input terminal of a gate circuit 29, and each output terminal of the gate circuit 29 is connected to each input terminal of a memory circuit 30. Each input/output terminal of the relay circuit 50 is connected to a pass line 51°S2, and is also connected to each input/output terminal of a CPU section S3, which is a control section that operates as will be described later. 34 is a DMA controller, each input terminal of which is connected to the comparator circuits 9, 10 and 1.
Each output terminal is connected to the control terminal of the gate circuit 290 (6) and to the pass line 51.52 via the I/U interface 35. and.

The pass lines 51 and 52 are connected to the reference terminals 12, 15 and 1 through a D/μm analog (D/mu) conversion circuit 36.
4 and I10 interface 3
7f: Connected to the expansion path fin 58 via.

Next, the operation of this embodiment will be explained with reference to FIGS. 3 to 7.

First, the case of adjusting the focus of the optical lens 3 will be described according to Figs. A detection object for focus adjustment is formed by painting a substrate made of a material with good gloss, such as a material with a high gloss, with a material with poor gloss, such as a black hollow coating, and alternately forming reflective portions 39 and non-reflective portions 59b. Body 39 is used. When the object to be detected for focus adjustment 39 is irradiated with ambient light or light from a dedicated light source, the detection light 5, which is the reflected light from the object to be detected for focus adjustment 59, is reflected through the optical lens 3rt. The light is received by the detection unit 1. In the detection unit 1, the 2048-bit photodiode 2 can sequentially extract signals from the 1st bit to the 2048th bit in synchronization with the clock pulse OF.
The object to be detected 39 for focus adjustment is detected by optical scanning in the 0 direction. Then, when the photodiode 2 receives the detection light 5f- from the object to be detected 390 for focus adjustment and the reflection part 39, the video output signal 4+v crosses Vn as shown in FIG. The tube output is now given to input terminal 7. On the other hand, 0PU
When the focus adjustment signal is applied to the ffi 33 by an appropriate operating means, the ffi 33 first applies the high slice level μ signal VHe to the reference terminal 12 via the D/mu conversion circuit 36, and converts the iIf of this high slice level signal Vn. : Gradually lower.

When the high-level slice level signal VH becomes the high-level slice level signal VHa which is smaller than the maximum value of the video output signal Vsa, the high-level comparison circuit 9 is activated as shown in FIG.
), it outputs 8LVHa, which is the high-level slice video output signal 8LVa of the high-repe μ. This high level slice video output signal 8LVHa is the gate circuit 2! I
rt to each control terminal of the latch circuit 24,25.

Latch circuit 25 and high-level slice video output signal 8
The presence of L V Ha is latched, and the latch circuit 2
4 latches the count value of the counter 260 at the rising and falling points of the high-order slice video output signal 8LVHa. and.

The presence of the high-level slice video output signal 8LVHa latched by these latch circuits 24 and 25 and the count value at the rising and falling points are determined by the DM controller 3.
The signal is applied to the memory circuit 30 via the gate circuit 29'f controlled by the memory circuit 29'f, and is stored at a designated address of the memory circuit 50.

Thereafter, the 0PUl 153 supplies the low-level slice level signal Vt to the reference terminal 14 via the %D/mu conversion circuit 56, and the low-level slice level signal Vt.

Gradually increase the value of. When the low-level slice level signal VL becomes the low-level slice level μ signal VL which is larger than the minimum (9) value of the video output signal Vsa, the low-level comparison circuit 11 operates as shown in #g4 diagram (0). High-level μ low-level Swiss video output signal 8LVL
Output a. This low level slice video output signal $8L
VLa is connected to the latch circuit 24.2 via the gate circuit 23Tt.
5 to each control terminal of latch circuit 2.
5 latches the low-level slice video output signal 8LVLa, and the latch circuit 24 latches the count value of the counter 26 at the rising and falling points of the low-level slice video output signal 8LVLa. is stored at the designated address of the message writing circuit 50 as described above. After that, OPU
The unit 33 stores the count value at the nine rising points and the own value at the falling point of the high-order slice video output signal 8LV11m stored in the memory circuit 30, and the count value at the rising point and the count value at the falling point of the low-order slice video output signal 8LVLa. Calculate the deviation values Δisland, Δb, ΔC and Δd.

A 14-frame Pinto machine (not shown) was designed to keep these small.
0) The optical lens 5 is moved as shown by an arrow 41 to perform focus adjustment by driving the lens 41 and the like. When the focus adjustment of the optical lens 3 is completed, the video output signal Vs becomes a substantially rectangular waveform with steep rising and falling edges as shown in FIG. 5(a), and the high-level slice video output signal 8 L
V Ha and low level video output signal 8LVLa
As shown in FIG. 5(b) and (@), the CPU 53 has deviation values Δa, Δb, Δ0, and Δd of the count value at the rising point and the count value at the falling point are zero or extremely small. It is determined that there is, and the adjustment ends.

Now, adjust the grain of the optical lens 3 [If you want to do it]
The description will be made according to FIGS. 6 and 7. In this case, the detected object 4 to be actually detected is used.

In this case as well, since the detection unit 1 optically scans the detected object 4 in the same manner as described above, the photodiode 2 that receives the detection light 5 corresponding to the detected part 4a of the detected object 4 is the photodiode 2 (see figure 6).
The video output signal vI, Vsbrt, is output as shown in FIG. On the other hand, when the OPU unit 33 is given the grain adjustment signal by an appropriate operating means, first,
In the same manner as described above, the high level slice level signal VH is applied to the reference terminal 12, and its constant level is gradually lowered. The high level signal v■ is the video output signal 4j V s b
When the upper limit slice level signal Vnb substantially coincides with the maximum value of , the high-level comparator circuit 9 outputs 1! g6 As shown in figure (b), the upper limit slice video output signal of high level μ is 8Lv.
Outputs HbTt. In this case as well, the presence of the upper limit slice video output signal 8LTab and its rising time counter) value,
The falling point count value is latched by latch circuits 25 and 24 and then stored at a designated address in memory circuit 30. Thereafter, the CPU 535 applies the low-level slice level signal VL l (to the reference terminal 14 and gradually increases its value).

The low level signal VL is the video output signal Vs.
lz7) Lower limit level signal V that approximately matches the minimum value
t, b, the lower comparator circuit 11 outputs the high level to lower limit slice video output signal 8 as shown in FIG. 6(0).
Outputs LVt and bB. In this case too.

The presence of the lower limit slice video output signal 8LVtb, its rising point count value, and falling point count value are latched by the latch circuits 25 and 24 and increased by the circuit 50.
is stored at the specified address. After that,
The upper limit slice video output signal Vab and the lower limit slice video output signal 8LVt when the upper limit slice video output signal 8LVab is stored in the upper third memory circuit 30 of the CPU section 3
Deviation value Δ from lower limit level signal VLb when b is present
By calculating vb and driving the throttle adjustment mechanism Mrt4-ta etc. so that these become large, the throttle adjustment is controlled, and 2! From the high level signal vHrtvHb given to the lI quasi-terminal 12
and the lower level signal VLlVLb applied to the reference terminal 14 is lowered.

When the tightening adjustment of the optical lens 3 is completed, the video output signal VsbFi changes so that the difference between the maximum value and the minimum value becomes large as shown in FIG. 7(a), and it almost matches the maximum value. The upper limit level signal, which is the high level signal VH, is shown in Figure 7 (13) (as shown by aJ, it is not VHc, and the low level slice level signal V, which is approximately equal to the minimum value, is the lower level signal in Figure 7). As shown in (a), it becomes VLo, the upper limit slice video output signal 8LVHc from the comparator circuit 9 and the lower limit slice video output signal 8LVHc from the comparator circuit 11.
L V La ld ta87 Figure (b) and (0)
It is determined that the deviation value ΔVo between the upper limit slice level signal VHo of the CPU section 3 and the lower limit slice level signal VLa is the maximum, and the adjustment is ended.

In addition, in the CPU section 3, the upper limit slice level signal VHo and the lower limit slice level signal VLo after the completion of the tightening adjustment remain in the set state until that time, and when c (c).
(Villa-VLO)/2 )+VLo engineering ΔV
o/2-1- V Lo The intermediate level signal VM, which is set to be
The medium slice video output signal 8LVM output from the medium comparison circuit 10 at that time is used as a reference slice level signal when detecting the medium slice video output signal 8LVM to obtain detection information. Used as an output signal.

Also, the deviation value ΔTo after the OPU section 5 upper 3 tie adjustment is completed.
When Fi is less than a preset value, it is determined that accurate detection of Fi and VL is impossible, and a notification signal is output to notify that VL.

As described above, according to the present embodiment, the video output signal from the detection section 1 is compared with the plurality of three slice level signals VH, VM, and Vt in the comparison section 8, thereby obtaining the slice video output signals 8LVm, 8LVM, and Vt, respectively. 8LVt, rt can be outputted, and can be used as the ninth detected slice video output signal to obtain the detection information from the detected object 4. Therefore, the reference slice level The slice level signal Vmg8 is automatically set, which is extremely convenient and allows accurate detection information to be obtained.

By the way, in this type of image sensor, it is necessary to perform aperture adjustment and focus adjustment of the optical lens 3.
Generally, the video output signal Vsl from the detection unit 1 is drawn as a waveform on an oscilloscope, and the aperture adjustment mechanism is manually operated so that the difference between the maximum value and the minimum value of the waveform is maximized.

The focus adjustment mechanism is manually operated so that the rise and fall of the waveform are the sharpest, but this is inconvenient and requires manual adjustment of the aperture and focus of the optical lens. It was also inaccurate.

Therefore, a detection section 1t is provided which sequentially generates a video output signal Vs depending on the presence or absence of detection light, and a video output signal Vs rt14. from the detection section 1 is provided. A comparator 8rt is provided to generate slice video output signals 8LV'H, 8LVM, and 8LVLI by comparing a plurality of slice level signals VH, VM, and VL with values such that the upper limit of the slice video output signals from the comparator 8 is : x'p Isbey'o output signal and the lower limit slice video output signal
The CPU unit 33 that controls the 1M mechanism has the following configuration, and has the effect of automatically and accurately adjusting the aperture of the optical lens 3. and sequentially count operation [
A counter 26rt is provided to perform the calculation, and the comparison unit 8 determines the count I of the counter 8 when two different slice video output signals among the slice video output signals are generated, and performs an optical calculation so that the deviation value thereof becomes small. This is because the CPU section 55 that controls the cost of the focus adjustment mechanism of the lens 3 is provided.

This has the effect of automatically and accurately adjusting the focus of the optical lens 3.

In the above embodiment, the rising point count value and the falling point count value of the slice video output signal 8 L VM from the comparator circuit 10 [memory contents of the memory 41j circuit 30] can also be read out as detection information. In this case, the microcomputer I performs the denu process.

In addition, in the above embodiment, the focus adjustment (17) of the optical lens 3 and ShibopiiuTr: I tried to do it automatically.

The adjustment is not limited to this, and may be a commonly performed manual adjustment.

Further, in the above embodiment, the slice video output values from the comparator 8 are 4jBLVH, 8LvM, and 5LVt.

The middle slice video output signal 8LVMr is used as the detection slice video output signal, but the point is that if you select the most appropriate slice video output among the plurality of slice video outputs as the detection video output. It's good.

In addition, the present invention is not limited to the embodiments described above and shown in the drawings, and it goes without saying that the present invention can be implemented with appropriate modifications within the scope of the invention.

As explained above, the present invention generates a slice video output from the comparing section by comparing the video output from the detecting section with a plurality of slice levels μ having different values of the comparing section, so that the reference slice level μ It is possible to provide a signal processing device for an image sensor (18) that can obtain accurate detection information without the need for II.

[Brief explanation of the drawing]

The drawings are of the present invention! ! Fig. 1 is a schematic configuration explanatory diagram of an image sensor, Fig. 2 is a block diagram showing an electrical configuration, Fig. 3 is a front view of a detection body for focus adjustment, and Figs. It is a waveform diagram of each part for explaining the action of section 11. In the drawing, 1-digit detection unit, 2-digit photodiode (light receiving element), 3Vi optical lens, j+IJ, detection object, 5 is detection light, 6 is aperture adjustment mechanism, 8-digit comparison unit, 26-digit counter, 30 is memory circuit. m, 55 CPU unit (1!i control unit) is shown. Applicant Sanris Co., Ltd. (19) Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Δ＾ ΔRi
ΔCΔ and Fig. 6 Fig. 7

Claims (1)

[Scope of Claims] 1. A video that is composed of a large number of light receiving elements provided to receive detection light from an object to be detected, and in which a specific voltage appears in time series in proportion to the amount of light received by the large number of light receiving elements. output【
A signal processing device for an image sensor, comprising: a detection unit that generates a slice video output f: a video output f from the detection unit; a comparison unit that generates a slice video output by comparing a plurality of slice levels of different values;