JPS5895844A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5895844A JPS5895844A JP19180881A JP19180881A JPS5895844A JP S5895844 A JPS5895844 A JP S5895844A JP 19180881 A JP19180881 A JP 19180881A JP 19180881 A JP19180881 A JP 19180881A JP S5895844 A JPS5895844 A JP S5895844A
- Authority
- JP
- Japan
- Prior art keywords
- envelope
- package
- sealed
- lid
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Abstract
Description
【発明の詳細な説明】
発明の技術分針
本発明は半導体装置に関し、特に半纏体率子を載置して
封止する外囲ｔｉ＊ｚ電構造にした牛尋体鉄璽に係る。DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a semiconductor device, and more particularly to a cowhide metal envelope having an outer ti*z electric structure on which a semi-integrated element is placed and sealed.
発明の技術的背景
一般に半導体＠ｗＦｉ半導体素子をダイボンドしたのち
ボンディングワイヤなどで外部引出し′電極とＷｃ続し
その恢耐埠境性を持たせるために高子の周囲を封止して
組立てられており、この素子を載置し封止を行なう外囲
器などの違いにより人別して゛メタルタイプ（キャンタ
イプ）、プラスチックモールドタイプ、セラミックパッ
ケージタイプの種間かめる。Technical Background of the Invention In general, a semiconductor@wFi semiconductor element is die-bonded, then connected to an external lead-out electrode using a bonding wire, etc., and then assembled by sealing the periphery of a high platen in order to provide barrier resistance. Depending on the type of envelope used to mount and seal the device, there are three types: metal type (can type), plastic mold type, and ceramic package type.
メタルタイプＦｉ第１図イ）に示すようにガクス１が充
填された金鵬製の素子躯直台（ステムノ２に輩Ｘ線のキ
ャップ３を被嵌して封止したもので、ステム２の素子載
Ｉｔ ＊ ４にダイボンドされた素子５は封入した乾５
ｌｉｔ！窒気、Ｎ、ガスで蝋われている。Metal Type Fi As shown in Figure 1 A), the element mounting stand made by Kinpo filled with GAX 1 (stem 2 is sealed by fitting the X-ray cap 3 on it, and the element of stem 2 is sealed). The element 5 die-bonded to the mounting It * 4 is an encapsulated dryer 5.
lit! It is waxed with nitrogen, N, and gas.
プラスチックモールドタイプは第１図（ρ）に不ずぶう
にリードフレーム６の素子ｌ＠ｔＩＩＬ部１にダイボン
ドされた素子８の周囲を絶縁性の樹脂９でモールドして
封止したもので、外ｔｔｔｉ 会は用いてない。In the plastic mold type, the periphery of the element 8 die-bonded to the element l@tIIL portion 1 of the lead frame 6 is molded and sealed with an insulating resin 9, as shown in FIG. 1 (ρ). The association is not used.
又セラミックパッケージタイプは第１図（ハ）に不す工
うにセラミックパッケージ１ｕにセラミックやメタル製
の飯（リッド）１１を超せて封止したもので、素子１２
の周囲には乾沫仝気、へ、カスが封入されている。In addition, the ceramic package type is a ceramic package 1u as shown in FIG.
The surrounding area is filled with dry air and debris.
背諏技術の問題点
ところで上記の半導体装置のうちメタルタイプ社気密性
の点で優れているが、多ａ１ｉｒ、他構造には不同きで
しかも価格的に不利な欠点がめる。プラスチックモール
ドタイプは最近耐湿性、耐機械的ａｍ性に優れたｍ胎が
開発さ扛て来てはいるものの、メタルタイプやセラミッ
クパッケージタイプのようにハーメチック（気密シール
）タイプのものに比べ封止の確実性に欠けるきらいがめ
る。又セラミックパッケージタイプでは機械的ｔｊｉｖ
Ｉｋが直ｉｊｋ素子に影善するという欠点がるる。従っ
てより可鈴な条件下ではいずれもその特性を保持するこ
とが欅かしく、特に宇宙開発やその他悔撃振動を受ける
素条分野にはその特性を維持できる外囲器ＩＩ−持った
半導体装置が費殖されている。Problems with the Contrary Technology By the way, among the above-mentioned semiconductor devices, the metal type is superior in terms of airtightness, but it has disadvantages in that it is not the same as other structures and is disadvantageous in terms of cost. Although plastic mold types with excellent moisture resistance and mechanical resistance have recently been developed, they are less sealed than hermetic (airtight seal) types such as metal types and ceramic package types. Dislike the lack of certainty. In addition, the ceramic package type has mechanical TJIV
There is a drawback that Ik directly affects the ijk element. Therefore, it is important to maintain these characteristics under more favorable conditions, and semiconductor devices with an envelope II that can maintain their characteristics are particularly important in space development and other fields of materials that are subjected to regrettable vibrations. Expenses are being cultivated.
発明の目的
本発明はかかる点に謙みなされたもので、直置、＆動、
―撃等に強い耐環境性に慣れた半導体装置をｌｌ供する
ことを目的とする。OBJECT OF THE INVENTION The present invention has been made in view of the above points, and is capable of being installed directly, movingly,
- The purpose is to provide semiconductor devices that are highly resistant to shocks and other environmental conditions.
発明のＩｇｔ費
本発明の半導体装置は、牛導体素子を躯′１．これを封
止した第１の外囲器を、弾性プラスチックを介して第２
の外囲器の中に収容すると共に第ｌの外囲器の外部リー
ドと第２の外囲器の外部引出Ｅ７リードとをフレキシブ
ルな配−フィルムで接続し、さらに第２の外囲器の開口
近傍まで弾性プラスチックを充填して第１の外囲器を第
２０外ｖ５器の中に封止して構成される。Igt cost of the invention The semiconductor device of the invention has a main body including a conductor element. The first sealed envelope is inserted into the second envelope through elastic plastic.
The outer lead of the first envelope and the external drawer E7 lead of the second envelope are connected with a flexible wiring film, and the The first envelope is filled with elastic plastic up to the vicinity of the opening, and the first envelope is sealed inside the 20th outer V5 envelope.
発明の実施例
本発明の半導体装置は第２図に示すように、素子１３を
載置してこれを封止したセラミック／＜ツケージ（第１
の外囲器）１４を別のセラミックパッケージ（第２の外
囲器）１５に収容して５１Ｐ性プラスチック層１６およ
びリッド２ａで封止している。素子１３は第１の外囲器
１４に雀−シリコン共晶合金半田などでダイボンドし、
素子１３の電憔１８と第１の外囲器１４の外地引出しリ
ードの電極１９とを金鱒ワイヤ２０で接続して第ｌの外
囲器に躯重し′Ｃめり、メタルやセラミック似のリッド
１１によりシールして封止されてお９、リッド１１下の
ｇ！域には乾１［気等が封入されている。Embodiments of the Invention As shown in FIG. 2, the semiconductor device of the present invention includes a ceramic/<
(envelope) 14 is housed in another ceramic package (second envelope) 15 and sealed with a 51P plastic layer 16 and a lid 2a. The element 13 is die-bonded to the first envelope 14 using sparrow-silicon eutectic alloy solder or the like.
The electric wire 18 of the element 13 and the electrode 19 of the outer lead of the first envelope 14 are connected with a gold trout wire 20, and the wire is connected to the first envelope with a C-turn, similar to metal or ceramic. It is sealed by the lid 11 of 9, and the g below the lid 11! The region contains inui 1 [qi, etc.].
第ｌの外囲器１４の外部リード２１と第２の外囲−１５
の外部引出しリードの１１１１ａ２２とはポリイミドフ
ィルムなどに銅箔を貼付してエツチングにより配鱒な形
成したフレキシブルな虹鱒フィルム２３で嵌統されてお
り、素子１３の電悌１ＢへのａＩ＃過Ｆｉ第２の外囲器
１５の外部リード２４により竹なわれるよ、うになって
いる。弾性プラスチックｍｌらは第ｌの外囲器１４と第
２の外囲器１５との間および第２の外囲器１５の開口２
５０近傍まで形ＩＩＬされ、開口２５を第ｌの外囲器１
４の封止に用いたリッド１１と同様な材質のリッド２６
によりシールして、第１の外囲器１４の封止を竹なって
いる。この場合第２の外囲器の３￥−ルは必ずしも必要
でなく使用目的によってはシールを省略しても良いＣ
以上のようＫＩＡ子１３を載置し封止した第１の外囲−
１４を第２の外囲器１５に収容、封止して素子１３を封
止する外ｍ器を２電にし、帛１の外−一１４と第２の外
囲器１５との電気的接続をフレキシブル記載フィルム２
３で行ない、しかも弾性プラスチック盾１６を第１の外
囲器１４の上方および第２の外囲器１５との間に形成さ
せているので、素子１３お↓び素子１３と外部リード２
４との蒐気的宸絖が、湿度、振動、貢軍等に雅い耐環境
性の優れた半導体装置とすることができる、次に本発明
の半導体装置の製造につい″Ｃ説明すると、第３図げ）
に示すようにセラミックパッケージ２１（第１の外囲ｔ
ｊ）に素子２８ダイボ／ドしたのち金＃Ｍ２９でワイヤ
ボ／ディ／グして素子２ａの’ｆｉ惚３０とセラミック
パッケージ２７の外部引って封止する。次にフレキシブ
ル就蝉フィルム３３の一端の端子をセラミックパッケー
ジ２７の外部リード３４に熱圧着、半田付等で接合する
（同図＜ｌ’ｌ ）。次いで第３図（ハ）に示すように
ゴム状の５ｉＩＬ性プラスチツク材な充填して外部引出
リード′−憔３５より少し下までＩｊＩＩＬ性プラスチ
ック膚３ｂが形成されたセラミックパッケージ（第２の
外囲器）３１に封止されたセラミックパッケージ２７を
収納してフレキシブル虹鱒フィルム３３の他１のｎ子を
セラミックパッケージ３Ｔの外部引出しリード電＠ａｈ
と熱圧庸等で接合する。続いて前述した弾性プラスチッ
ク材を充填してセラミックパッケージ３Ｔの開口近傍ま
で弾性プラスチック虐３Ｂを形成してセラミックパッケ
ージ２７およびフレキシブル配婦フィルム３３を封止し
て（同図（ニ）ノ、そＯ依第２の外囲器３７の端子３９
を折曲形成すれは半導体装置が得られる。なおこの場合
必資に応じて第３図（へ）のようにリッド４０でシール
しても良い。External lead 21 of the l-th envelope 14 and the second envelope-15
The external lead lead 1111a22 is fitted with a flexible rainbow trout film 23 made by pasting copper foil on a polyimide film or the like and forming a pattern by etching. The external lead 24 of the second envelope 15 allows the bamboo to be twisted. The elastic plastic ml is formed between the first envelope 14 and the second envelope 15 and the opening 2 of the second envelope 15.
50, and the opening 25 is connected to the lth envelope 1.
A lid 26 made of the same material as the lid 11 used for sealing 4.
The seal of the first envelope 14 is made of bamboo. In this case, the seal of the second envelope is not necessarily necessary and the seal may be omitted depending on the purpose of use.
14 is housed and sealed in the second envelope 15, and the outer shell for sealing the element 13 is made 2-electric, and the outer shell 14 of the fabric 1 and the second envelope 15 are electrically connected. The flexible writing film 2
3, and since the elastic plastic shield 16 is formed above the first envelope 14 and between the second envelope 15, the element 13 and the external lead 2
4 and 4 can make it possible to make a semiconductor device with excellent environmental resistance against humidity, vibration, tribute, etc. Next, we will explain the manufacturing of the semiconductor device of the present invention. 3 figures)
As shown in FIG.
j) After the element 28 is die-bonded, wire-bonded with gold #M29 and the filament 30 of the element 2a and the outside of the ceramic package 27 are sealed. Next, the terminal at one end of the flexible mounting film 33 is bonded to the external lead 34 of the ceramic package 27 by thermocompression, soldering, etc. (<l'l in the figure). Next, as shown in FIG. 3(C), a ceramic package (second outer envelope) is filled with a rubber-like 5IIL plastic material and has an IJIIL plastic skin 3b formed slightly below the external lead-out lead 35. ) Store the sealed ceramic package 27 in the flexible rainbow trout film 33 and connect the other n-child of the flexible rainbow trout film 33 to the external drawer lead wire of the ceramic package 3T.
and join by heat pressure, etc. Subsequently, the above-mentioned elastic plastic material is filled to form an elastic plastic layer 3B up to the vicinity of the opening of the ceramic package 3T to seal the ceramic package 27 and the flexible mating film 33 (FIGS. 2 and 3). Terminal 39 of second envelope 37
By bending and forming, a semiconductor device is obtained. In this case, depending on the necessity, it may be sealed with a lid 40 as shown in FIG.
以上の実施例では第ｌの外囲器、第２の外囲器ともセラ
ミックパッケージを使用した場合についてｖｉｔ明した
が、メタルタイプのりを囲器な用いることもでき、又素
子の封止には第１の外囲器を用いｆ １ｍ ｍ ＠１ｍ
モールドによって封止しても艮い。In the above embodiment, the case where ceramic packages are used for both the first envelope and the second envelope has been explained, but metal type glue can also be used for the envelopes, and for sealing the element. Using the first envelope f 1m m @1m
It doesn't matter if it is sealed with a mold.
５６に！Ａの幼果
以上説明したように本％明の半導体装置では、千尋体素
子を−一しこれを封止した第ｌの外囲器を、弾性プラス
チックを介して第２の外曲藺の中に収容すると共に第１
の外ｍＩＪ−ドと第２の５Ａｌｆｆ１番の外部引出しリ
ードとをフレキシブルな配鱈フィルムで接続し、さらに
第２の外囲器の開口近傍まで弾性プラスチックを充填し
て第１の外囲器を第２の外囲器の中に封止しているので
、１擺、耐氷動、耐衝撃性に優れたものとなり又容易に
ＩＱ造することができる。To 56! As explained above, in the semiconductor device of the present invention, the first envelope in which the chisel element is sealed is inserted into the second envelope through elastic plastic. The first
The outer mIJ-de and the second 5Alff No. 1 external drawer lead are connected with a flexible cod film, and the second envelope is filled with elastic plastic up to the vicinity of the opening, and the first envelope is closed. Since it is sealed in the second envelope, it has excellent durability, ice movement resistance, and impact resistance, and can be easily manufactured in an IQ manner.
第１図ピ）、−）、（ハ）は促米の半導体装置をボす断
面図、第２図は本発明の半導体装置の一央抛劉をボす断
面図、第３図れ）〜（ホ）は＠２図の夾ね例に示した半
導体装置の製造方法を示す説明図でおる。
１３．２８・・・半導体素子
１４．２７・・・ｗＩＪ１＋２）外囲器１５．３１・・
・第２の外囲器
１６．３６．３８・・・弾性プラスチック虐２１．３４
・・・外部リード
２２．３１・・・外部引出リード電懐Figures 1), -), and (c) are cross-sectional views of the semiconductor device of the present invention, Figure 2 is a cross-sectional view of the semiconductor device of the present invention, and Figure 3) to (c). E) is an explanatory diagram showing a method for manufacturing the semiconductor device shown in the additional example of Figure @2. 13.28...Semiconductor element 14.27...wIJ1+2) Envelope 15.31...
・Second envelope 16.36.38...Elastic plastic material 21.34
...External lead 22.31...External drawer lead flashlight
Claims (1)
弾性プラスチックを介して第２の外ｆｌ器の中に収容す
ると共に第１の外囲器の外部リードと絽２０外＃Ｈｉ器
の外部引出しリードとをフレキシブルな配嶽フィルムで
接続し、さらに第２の外囲−の開口近傍まで弾性プラス
チックを充填し１第１の外曲器を第２の外囲器の中に封
止したことを％砿とする半導体装置。A first external device in which a semiconductor element is installed and sealed,
The first envelope is housed in a second outer flask through elastic plastic, and the outer lead of the first envelope is connected to the outer drawer lead of the second outer flask with a flexible packaging film. 1. A semiconductor device in which an elastic plastic is filled up to the vicinity of the opening of an outer envelope, and a first outer bender is sealed in a second envelope.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19180881A JPS5895844A (en) | 1981-12-01 | 1981-12-01 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19180881A JPS5895844A (en) | 1981-12-01 | 1981-12-01 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5895844A true JPS5895844A (en) | 1983-06-07 |
Family
ID=16280864
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19180881A Pending JPS5895844A (en) | 1981-12-01 | 1981-12-01 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5895844A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4723156A (en) * | 1984-08-20 | 1988-02-02 | Oki Electric Industry Co., Ltd. | EPROM device and a manufacturing method thereof |
| US4746392A (en) * | 1982-12-28 | 1988-05-24 | Gao Gesellschaft Fur Automation Und Organisation Mbh | Method for producing an identification card with an integrated circuit |
| US4768078A (en) * | 1983-08-31 | 1988-08-30 | Kabushiki Kaisha Toshiba | Plastic-molded semiconductor device |
-
1981
- 1981-12-01 JP JP19180881A patent/JPS5895844A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4746392A (en) * | 1982-12-28 | 1988-05-24 | Gao Gesellschaft Fur Automation Und Organisation Mbh | Method for producing an identification card with an integrated circuit |
| US4768078A (en) * | 1983-08-31 | 1988-08-30 | Kabushiki Kaisha Toshiba | Plastic-molded semiconductor device |
| US5010390A (en) * | 1983-08-31 | 1991-04-23 | Kabushiki Kaisha Toshiba | Plastic-molded semiconductor device |
| US4723156A (en) * | 1984-08-20 | 1988-02-02 | Oki Electric Industry Co., Ltd. | EPROM device and a manufacturing method thereof |
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