JPS5894180A - Data fast returning method in musical instrument automatic playing device - Google Patents

Abstract

PURPOSE:To feed data stored in a storage means in the speed corresponding to the time data of the stored data, by providing the 2nd word number data at the final part of a data block in advance. CONSTITUTION:A key information generating circuit 9 detects the state of ON/ OFF of each key switch of a key switch group 6 and key information comprising a key code KC, a key impact strength data SD, and a key confirming code KD is outputted accoding to the result of detection. That is, the circuit 9 has three shift registers 9a-9c driven with clock pulse phi0. A control signal generating circuit 18 counts a clock pulse phi1 supplied from a basic clock generating circuit 19 based on the repetitive data BD from a CPU11 and a clock pulse phi2 obtained from the result is outputted to the CPU11 via a bus line 12.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data fast rewinding method used in an automatic musical instrument performance device such as an automatic piano performance device.

An automatic piano performance device is provided with a key drive solenoid y and a pedal drive pedal solenoid corresponding to each key button and each pedal of the piano, and these solenoids are stored on a cassette tape or floppy disk, etc. automatically driven based on the performance data being played,
This is an automatic piano performance.

In this automatic piano performance device.

If you want to fast-reverse data, in a cassette tape-based automatic performance device, you can fast-reverse the tape to #L using a high-speed rotation of a mechanism such as a motor, but automatic performance using a storage device such as a floppy disk In the case of a device, it would be possible to send the data on a floppy disk at an extremely high speed depending on the rotational speed of the disk, but the speed is too fast and there is no real sense of how many songs can be played. However, when rewinding on an automatic performance device, it is desirable that the data be sent at approximately the same speed as when rewinding a tape. Therefore, the present invention provides a data speed system that can send data stored in a storage means such as a floppy disk at a speed corresponding to the time data of the stored data. The following 1 aims to provide a return method.
An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an automatic piano performance device to which the method according to the present invention is applied.

First, each key of the keyboard 1 is provided with 12 key switches and solenoids 2, 2, . . . for driving the keys. In this case, the two key switches provided for each key operate at different timings in response to key operations (details will be described later in 1.!l).

The key driving solenoid 2 is adapted to drive the key when its plunger protrudes from the solenoid 2. Further, a damper pedal, a sostenuto pedal, etc. (together referred to as a pedal device 3) provided on the piano are each provided with a pedal switch and a solenoid 2 for driving the pedal. Key press/release is detected based on the output of each key switch, and key operation speed is determined based on the operating interval of two key switches provided on one key. That is, the keystroke strength is detected, and the depression/release of each pedal is detected based on the outputs of the ta and pedal switches. Performance data is then created based on these detection results.

The information is written to the disk of the floppy disk device 4.

When reproducing the performance data (when performing automatic piano performance), the performance data stored in the floppy disk device 4 is sequentially read out, subjected to predetermined data conversion, and supplied to the solenoid drive circuit 5.

As a result, the solenoids 2 provided on each key and each pedal are driven based on the performance data.

An automatic piano performance is performed.

The automatic piano performance device described above will be described in detail below.

In FIG. 1, a key switch group 6 is a block showing a set of key switches provided for each key of the keyboard 1. Here, an example of the configuration of two key switches provided for one male key will be explained with reference to FIG. At the bottom, a first key switch and a second key switch are provided, respectively. In this case, the first key switch is 1 and the second key switch is 2.

The tip is folded upward into an inverted J shape and the key 6aK
Movable contact SK□, 8K that constitutes one port of the pressed part
, s' and Q movable contact 8, fixed contacts SK, SK4 close to the lower surface of 5K3O, and the movable contact SK1 of □ on the first key switch is suppressed, and the movable contact of 2 on the second key switch It is set higher than the mouth of the pressed part of SK3 and is close to the lower surface of the key 61. When the operating part of the key 6a is pressed down, the pressed part A first elastically deforms downward and contacts the fixed contact 8, and the first key switch 1 is turned on. By elastically deforming the pressed portion opening downward, the second key switch 2 is turned on.

The pedal switch 7 is composed of pedal switches provided on each pedal of the pedal device 3, and the output of each pedal switch is supplied to the pedal switch interface 8.

The key information generation circuit 9 supplies 1. 1 to each key switch by scanning 2 to
．． Detects the on/off status of K2.

According to this detection result, this circuit outputs key information consisting of key code KC (7 bits 1, key press strength data 5D (8 bits) and key press confirmation code KD (1 bit). In other words, this key information generating circuit 9Fi , three shift registers driven by clock pulse φ0: 9 (16 stages, 7 bits), 9b (16 stages, 8 bits), and 9e (16 stages, 1 bit). When any key c (hereinafter referred to as key) is pressed anew, the key code KC of the key person is transferred to the empty stage of the shift register 9a when 1 is turned on in the first key switch of the key person. (
Now, assume that this empty stage is the 10th stage), and then measure the time from when 1 is turned on in the first key switch of the key person until 2 is turned on in the second key switch. Then, this measurement result is written to the 10th stage of the shift register 9b as data 8D once the key is pressed.

Furthermore, when the key person's second key switch turns on 2, the keystroke confirmation code KD ("1" signal) is released. Also, when the key person releases the key, = turns off on the first key switch and at the 9th point. The data in the 10th stage of each shift register 9a to 9c is erased (set to "O").

Here, the shift registers 91 to 9c described above each have 16
As is clear from the stage configuration, this key information generation port 11G can allocate key information for a maximum of 16 keys to each stage of the shift registers 9&-9c. Then, the key information assigned to each stage of the shift registers 91 to 9c is outputted to the FI-FO memory 10 in a time-division manner according to the aforementioned clock pulse φoK. Central processing unit (hereinafter referred to as CPU)
Reference numeral 11 controls each part of the apparatus based on a program, and is connected to each part of the apparatus via a path line 12.

・ROM (read only memory) 13 is CPU II
This is a memory that stores programs used for various purposes. The RAM (random access memo 14) is a 16 word memory having areas 14a to 14d as shown in FIG. Area 14a~
14c writes data to the disk of the floppy disk device 4;

The area 14d is used as a buffer memory when reading data from the disk, and the area 14d is used as a working area.

The FI-FO memory 10 is a 16x16 bit first-in-first-out memory.

Its writing/reading is controlled by a memory controller 16. That is, when a write command is supplied from the CPU II to the memory controller 16, the memory controller 16 puts the FI-FO memory 10 into a write state. As a result, all data in the shift registers 91 to 9c of the key information generation cycle Ws9 are written to the FI-FO memory 10 based on the clock pulse φ0. 12. C.P.
When a read command is supplied from U 11 to memory controller 16, memory controller 916 FI -
The FO memory 10 is placed in a read state. Due to this.

All data in the PI-FO memory 10 is transferred to the new data area ND in the area 14d of the RAM 14 via the CPU II.
g (Written in FIG. 3, FIG. 1.The reason why the memory 10 is inserted into the FI-) is as follows.

CPU II and key information generation circuit 9 are different.
(This is because it is driven by one clock pulse that is not synchronized.

The pedal switch interface 8Fi detects the on/off state of each pedal switch in the pedal switch group 7, and generates pedal data PD corresponding to the detected on/off state.
This is a circuit that outputs .

The control signal generation circuit 18 receives the 2MH2 clock pulse φ1 supplied from the basic clock generation circuit 19 and outputs it to the CPUI.
It counts based on the repeated data BD supplied from I, and outputs the resulting clock pulse φ2 to the CPU 11 via the pass line 12. The period of this clock pulse φ2 is normally 4 mm@c, but may be changed to 3.5 m5ec, 3ms@a, or 200 um@e depending on the case.

The operation unit 20 includes a start switch, a stop switch,
The floppy disk device 14 is configured with switches such as a write designation switch for designating writing to the disk, a read designation switch for designating reading from the same disk, and a fast rewind switch, and the output of each switch is The signal is encoded and output to the pass line 12.

The solenoid drive circuit 5 is connected from the CPU II to the pass line 12.
> and the solenoid drive data SKD supplied via the output interface A21, a solenoid drive signal having a constant period and a pulse width corresponding to the data SKD is released, and this solenoid drive signal is The CPU via the amplifiers 22, 22...
It is supplied to the solenoids 2, 2, . . . corresponding to the key code KCf or pedal data PD supplied from II.

Next, the operation of the automatic piano performance device configured as described above will be explained.

[1] When performing on the disk of the floppy disk device 4, the performer turns on the disk write designation switch provided in the operation section 20, presses the start switch, and then operates the keyboard 1 and pedal device. 3 to perform normal piano performance.

When the start switch is pressed by the performer.

The CPU 1l first outputs nine repetition data BD specifying a 4m5ec period to the control signal generation circuit 18. After this, 4m5eeJff! W4 clock pulse φ
2 is the output from the control signal generation circuit 18.

It is supplied to the CPU 11. The CPU II performs the following processes every time the clock pulse φ2 is supplied.

■ First, a write command is output to the memory controller 16, and the shift register 9a of the key information generation circuit 9 is
9 Transfer all data in e to FI-FO memory 10. /- (2) Next, the friend data is transferred to the %FI-FO memory 10 and is set in the area 14d of the RAM 14 and written in the ninety-two knee data area NDB (FIG. 3).

■Next, write the pedal data PD output from the pedal switch interface 8 into the new data area NDE of the RAM 14.

(2) Next, "1" is added to the data in the timer area TI set in the area 14d of the RAM 14. The meaning of this will be explained later.

■ Next, the new data Elide NDE of RAM 14
By comparing the data in the old data area ODE set in the area 14d of the RAM 14, changes in the operating state of the pressed keys of the keyboard 1 and the pedal device 3 can be determined. is called an event).

Nasi, old data elibu ODE contains the previous time (4
The contents of the shift registers 91 to 9c and the pedal data PD at the time when the clock pulse φ2 (msec before) is output are stored.

■ If no event is detected in the process of ■ above, B, new data area NDE of RAM 14.
The contents of are moved to the old data area ODE, and the series of processing ends. Thereafter, the CPU 11 waits for the next clock pulse φ2 to occur.

■ If an event is detected in the process of (■) above, the data block c and below shown in FIG. 4.

(referred to as event frame EF), RAM1
Write to area 14m of 4, event frame IF
This will be explained in detail later.

■ Next, if an event is detected, timer area T
Clear I.

■ Next, the contents of the new data area NDI are transferred to the old data area ODE, and the series of operations is completed. Thereafter, the CPU II waits for the next clock pulse φ2 to occur.

As described above, each time the clock pulse φ2 occurs, the CPU
This is the process performed by I.

Here, the data and event frame EFK in the timer unit 1j TE mentioned above will be explained.

First, the data in the timer area TI is cleared every time an event occurs, as is clear from the process of 0 mentioned above, and the data in the timer area TI is cleared every time an event occurs, as is clear from the process of 2 above. 1" is added. That is, the data in the timer area TI at the time of event occurrence is the time from the time when the previous event occurred to the time when the current event occurred (period 4 of clock pulse φ2).
The basic unit is m5ec.

Next, in the event frame EF Vi fourth box, the first word count data WDI, timer data TDC time data)% event frame ED (musical sound data), second
It is composed of four data of word number data WD2. Below, these data will be explained in order.

(1) First word count data WD1 This data indicates the total number of words of the timer data TD and the event check ED.

(If) Timer data TD This is the data stored in the timer area TI of the RAM 14 at the time of performing the process in (2) above, and this timer data TD is the data that is stored in the timer area TI of the RAM 14 at the time of performing the process in (2) above.
is composed of two words.

rllll Event data ED This data is the key or pedal K where the event occurred.
This is data that costs I$ll. In other words, if a key is pressed on the new nine and 2 is turned on on the second key switch,
Figure 5 (As shown in 4, the key code KC of the pressed key (
7 bits), key off code Vl@), and keystroke strength data 8D (8 bits) for the same key become event data ED. The above key code KCb and key press force V data 5DFi are stored in the knee data area NDE.

In addition, when the key is released, one word of data consisting of the key code KC of the released key and the key-off code ("O") becomes the event data ED, as shown in FIG. 5(b). It will be.

When any pedal of the pedal device 3 is turned on, one word of data consisting of the pedal data PD code and the pedal on code (“1”) is the event data D, as shown in FIG. 5(C). When the pedal in the on state is turned off, one word of data consisting of the pedal data PD and the pedal off code ("O") becomes the event data ED, as shown in Figure 5). For example, if two keys are turned on at the same time, Fi, Fig. 5 (4)
The two sets of data shown in FIG. In addition.

The above-mentioned timer data TD and event data ED are collectively referred to as performance data.

2nd word number data WD2 This data is exactly the same as the first word number data WD1. That is, in this embodiment, the same number of words data is added to the beginning and end of the event frame IP.

Next, a process in which the above-described event frame EF is written into the area 141 will be specifically explained using an example.

For example, at time t0 shown in FIG. 6, the start switch is turned on, and at time t4.

2 is turned on in the key switch of key F3 (3rd octave/F note key), and at 1 time t8, key G3 (
2 is turned on in the key switch of the 3rd octave (G key), 1 is turned off on the key switch of key G3 at time t11, and 1 is turned off on the key switch of key F at time t14. 8 time t. When the start switch is turned on, the 4m5e
A clock pulse φ2 is generated at times t1°12 and 13 of every e, but there is no change in the depressed key-shaped portion at these times t1 to t3, and no event is detected.

Next.

When an event check is performed in RJEIlt5.

An event is detected because the pressed state of the key F3 has changed compared to the state at time t, and as a result, the event frame EF-1 shown in FIG.
Written within 1. In this case, the timer data TD-1 is "4" (this data indicates the time T1 in FIG. 6), and the event data ED-1 is the key F3.
Enter the key code KC, key on code 111, and keystroke strength data SD, and enter the 1st. The second word count data 1-1゜wo2-1 both become "4".

Then 1 time 1.1. Event check is performed at these times t6 It, but no event is detected at these times t6 and EF.
When an event check is performed at the 0th and 1st time t, when no creation is performed, an event is detected because the pressed state of the key G3 has changed, and as a result, the event shown in FIG. 7 is detected. 7L/-mu EF-2 is area 1 of RAM14
Within 4a.

The above-described good event frame EF-1 is continuously written. Similarly, at 1:11R112, an event is detected because the pressed key shape of key G3 changes.
As a result, event frame EF-3 shown in FIG. 7 is created in area 14& of RAM 14, and tf#-,
At time t, since the pressed state 5 of key F has changed, an event is detected, and as a result, event frame EF-4 shown in FIG. 7 is created.

In this way, in this embodiment, each time an event is detected, performance data (timer data TD Th and event data ED) is stored in the RAM in the form of frf vent frame EF! When the area 14a becomes full, the event frame IF is recorded in the area 141 of RAM l4.
4b, the CPU II sequentially supplies the data in the area 14a to the floppy disk device 4 via the disk controller 24,
Write to the internal disk. Then, the area 14b becomes full
When the state becomes 1, an event frame EF is created in the area 14e, and the data in the 92 area 14b is written to the disk. in this way.

Areas 14a to 14e are cyclically used stones.

The above is the performance data related to the piano player's performance.

This is the 1st disc recorded on a floppy disk (4 discs).

[2] When performing automatic performance.

Next, the operation of the apparatus shown in the 11th EIK will be described when performance data written on the disk of the floppy disk device 4 is read out and automatic piano performance is performed based on the read performance data.

In this case, the operator turns on the disk read designation switch in step 1s20 and then presses the start switch.

When the start switch is pressed, the CPU II.

First, transfer the data stored on the disk of floppy disk device 4 to 12 words of RAM in area 1 of □4.
The CPU II sequentially transfers data 0 to 4a to 14c, and then outputs the repetition data BD specifying 4m5ec to the control signal generation circuit as in the case of good data recording described above. As a result, a clock pulse φ2 having a period of 4 m5ee is outputted from the control signal generation circuit 18, and is supplied to the CPU II. From then on.

The CPU II selects the area 141 based on the clock pulse φ2.
This process of processing data in ~14@ will be described below. For convenience of explanation, the event frames EF-1, EF-1, and EF-1 shown in FIG.
It is assumed that EF-2, . . . are written.

Then, the CPU II outputs the repetitive data BD specifying the cycle of 4scs@e'' to the control signal generation circuit 1B, and then outputs the first word number data WDI-1 (``4J
) and timing data TD-1 (r4J) in RAM.
14 from the area 14m, and write to the temporary storage area spEs and the timer area TE in the area 14d, respectively. From then on, every time the clock pulse φ2 is output, "1" is subtracted from the contents of the timer area E, This subtraction result is written to the timer area TE again, and the timer area T
The first process is performed when the content of V becomes "0", that is, when time T1 shown in FIG. 6 has elapsed and the time has elapsed.

(1) RAM 14 temporary storage areas 8PE
The first word count data WDI-1 (“4
”), the number of words “2” of the timer data TD is subtracted from the timer data TD.

Cb) This subtraction result, that is, the event data ED-
The event data ED-1 (FIG. 7) is read from the area 14m based on the word number "2" of 1.

Write the read event data ED-1 into the event data area EDE of the area 14d.

(6) Read the first word count data W'D1-2 ("4J)" and timer data TD-2 (1"34) indicating the 7th IlIvc from the area 141, and read the temporary storage area 8PE and timer area TE of the area 14d. Write each to.

When the event data ED-1 is written to the event data area EDE in the area 14d, the process 11 of C above can) is executed.
), this event data ED-1 (key F, key = r
-do KC, keystroke strength data SD, key on code 11
Solenoid drive data created by 8KD based on 1)
It is supplied to the output interface 21 together with the key code KC of the key F3. The output interface 21ti temporarily stores the supplied solenoid drive data SKD and key code KC of key F3, and then transfers the stored data 8KD and key code KC to the solenoid drive data SKD.
Create a solenoid drive signal based on c and pass it through the amplifier 22 to the key F.

It is provided in and supplies to nine solenoid 2. As a result, the key F is driven with a strength corresponding to the keystroke strength data SD.

Thereafter, every time clock pulse φ2 is output.

As in the case described above, "1" is subtracted from the contents of the timer area TE (Kono Jl-kai, l"3J).

Then, at the time point C when the content of the timer area TE becomes "o" (the time point T shown in FIG. 6 has elapsed), the same process as described above is performed again.

Namely.

(s) 1st word count data 1-4 (r4J)
The number of words "2" of the timer data TD is subtracted from the timer data TD.

Based on this subtraction result (2J), event data ED-2 is read from area 14m and written to event data area IDE.

(c) gi word count data WDI- from area 14&
3 ("3" 1) and timer data TD-3 (r2j) are read and written to the temporary storage area SPB and timer area TE, respectively.

Then, event 7-MUE 1) AEDEK (vent data ED-2 (key code KC of key 03).

When the keystroke strength data 8D and key-on code 111) are written, the solenoid 2 provided in the key 03 is driven based on this event data ED-2.

Next, when time T3 (Fig. 6) corresponding to timer data TD-3 (2J) has elapsed, the above-mentioned (1 to (
The same process as in c) is performed, and as a result, the timer area T
Timer data TD-4 (2J) is in I, event data ED-3 is in event data area IDE, and first word count data is in area shg.
o1-4 are written respectively. Then, event data ΣD-3 (key 03) is placed in the event data area IDE.
When the key code KC and key off code 101) are written, the solenoid 2 provided on the key G3 is turned off.

Thereafter, the same process is repeated, the light is blocked, and the piano is automatically played. In the above example, only the driving of the 10 keys on the keyboard has been described, but the driving of the pedals of the pedal device 3 is performed in the same manner.

[3] When performing fast reversal.

When the operator presses the fast rewind switch provided on the operation section 20, the CPU II specifies a cycle of 200 μgl@e and outputs the repeat data BD to the control signal generation circuit 18. As a result, a clock pulse φ2 of 200 μl@e period is outputted from the control signal generation circuit 18 and supplied to the CPU II. From then on, the CPU II reads "1" from the data in the timer area TE- every time the clock pulse φ2 is supplied.
and writes this subtraction result to the timer area TE again, and when the content of the timer area Tl becomes "0", the second event of the previous event 7 frame IF in the progression order of one song is subtracted. Read the word count data WD2 and calculate the address of the timer data TD of the previous event 7 and IF described above based on the word count data WD2. Read the timer data TD of the same event frame E) and store it in the RAM.
After that, the above-described operation is repeated every time the clock pulse φ2 is output. Then, when the operator presses the stop switch.

The above operation stops and fast reversal ends.

In this way, in the case of fast rewind, the timer data TD stored in the areas 14a to 14e are sequentially read out in the reverse order of the progress of the song, and the time indicated by the read nine timer data TD is 200 μflee. Measured as a standard.

In addition, in the case of this fast reversal, 5. The event data is not read out, and therefore, the automatic performance of the piano naturally does not occur and does not cause discomfort.

As explained above, according to the present invention, the second word count data is added to the ninth part of the preliminary data block (event frame EF), and the time data is added based on the second word count data. (timer data TD) and measured this read nine-hour data using short clock pulses with multiple cycles compared to automatic performance, so it can be stored on a storage medium other than tape, such as a floppy disk. Data can be fast-reversed at substantially the same speed as data stored on tape.

[Brief explanation of drawings]

1st WJ is a block diagram showing the configuration of an embodiment of the present invention, 2nd figure is a side cross-sectional view showing the configuration of key switches provided on each key of the piano, K2, and 3rd figure is the RAM 14 in FIG. 1. Figure 4 is a diagram showing the configuration of the event frame IF, Figure 5 (/r)~)
are the four of the event data BD! Figure 6 is a timing chart showing an example of key operation, Figure 7 is a timing diagram showing an example of key operation.
The figure shows the R shown in Figure 111 corresponding to the key operation shown in Figure 6.
It is a figure which shows the data written to AM14. 4...Storage means (floppy disk device),
11-- Central processing unit (CPU), 14-
...Random access memory (RAM),
18... Control signal generation circuit.

Claims (1)

[Scope of Claims] Data blocks including time data, collected sound data, time theta, and first word count data indicating the total number of words of musical tone data are stored in advance in the storage means in the order of progression of the musical play. an instrument that reads out the data blocks in the order in which the music progresses, measures a time corresponding to the time data based on a first clock pulse, and automatically plays the musical instrument based on the measurement result and the musical sound data. Automatic performance 1! At t, second word number data that is the same as the first word number data is read out at the end of the data block in the data processing order during automatic performance. (c) When this time measurement is completed, the music Read the second number of words data in the previous data block in the order of progression. Thereafter, the fast reversal end command is supplied and the above (a) occurs at 2It. (b'), (e) A data fast rewinding method in an automatic musical instrument performance device characterized by repeating the O process.