JPS589363A - Solid state image pickup element - Google Patents

Abstract

PURPOSE:To reduce the capacity of a vertical signal line by a method wherein a well region just under a source or drain region connected to a vertical signal line is made lower in terms of impurity concentration than other parts, when a well region provided semiconductor substrate is divided into a multiplicity of regions by means of element dividing oxide films and the resultant individual well regions are provided with solid state image pickup element, respectively. CONSTITUTION:A P type well region 12 is diffusedly formed on an N type Si substrate 11 and then is divided into a multiplicity of elements by means of a mltiplicity of thick element isolating oxide films 17. Each of the regions 12 is provided with an N<+> type source region 13 and a drain region 14 that are diffusedly formed, and well regions 12 exposed therebetween the provided with gate insulating films 15 whereon gate electrodes 16 are installed. After this, the entire surface is covered with an interlayer insulating film 18 which is turn is provided with an opening whereinto a vertical signal line 19 is attached for the formation of a picture element. In this construction, the well region 12 under the region 14 whereupon the signal line 19 is installed is to be N<-> type region 12' particularly with low impurity concentration. Thus the capacity of the signal line 19 is reduced thereby reducng random noises.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state image sensing device, and particularly to a structure in which random noise is reduced.

Fixed pattern noise and blue 2 ringing were the main problems in conventional gymnastics image elements, but in the compensation circuit, for example, n
- Significantly reduced by adopting the p-n three-layer structure,
Nowadays, random noise has replaced these problems. Random noise is observed as flickering on the screen, and one of its causes is components generated from inside the device.

FIG. 1 shows this type of solid-state imaging device that has been conventionally used. In the figure, a Kp-type well layer 2 is provided on one main surface of an n-type substrate 1, and includes an n-diffusion layer 3.4 and a gate oxide film 5.
A photoelectric conversion element group consisting of a gate electrode 6 and a gate electrode 6 is formed. Each photoelectric conversion element is separated by element isolation tar oxide and an interlayer insulating film 8, and the n-diffusion layer 4 is vertically
[Connected to @No.IIs.

In the solid-state image sensing device having the above configuration, the random noise O1 flow component 1n is 1n with the capacitance of the vertical signal line 9 as CV.
It is expressed as noecy. Here, CV is the interlayer insulation l! between the signal line and the well. [Considering the capacitance component due to 8 and the capacitance component of the p-m junction between the p-type well layer 2 and the n-diffusion layer 3,
Its value is determined by the manufacturing process. In order to reduce the CV, either narrow the vertical gSO width or eliminate the impurity 1Ill in the p-type well layer 2 to reduce the p-m! It is possible to reduce the total capacitance component, but in the former case, distortion is likely to occur, and in the latter case, the storage capacitance of the photodiode formed by the square well layer 2 and the first diffusion layer 3 decreases, resulting in a decrease in the dynamic range. It has the disadvantage of There is also a method of increasing the thickness of the interlayer insulating film 8 to reduce C, but this increases the problem because it increases the difference in level between the two layers. [@ line- tends to cause WIR-, which is also undesirable.

The present invention was made in view of the above circumstances.
, the purpose is to provide a solid-state image sensor with less random noise.

To achieve this purpose, the solid-state imaging device according to the present invention has the impurity concentration of the well layer at the OS level below the diffusion layer, which is in contact with the - mark line, lowered by 1 compared to other parts. Hereinafter, the solid-state imaging device according to the present invention will be described in detail using Examples.

Figure 2 is a clear WIs showing an example of a solid-state image sensor based on the Wi4 of the present invention. In the same figure, a Kp type well layer 12 is provided on the n type substrate 11, and the source of the Mo1il transistor and n+ diffusion layer 13 as a drain
, 14, gate oxidation 1111s and gate electrode 16
is formed. The n-diffusion layer 13 together with the 1p type substrate layer 12 also constitutes a photodiode, and this photodiode and the Mo11 transistor constitute a photoelectric conversion element. Each photoelectric conversion element Fi element isolation oxidation [
The n diffusion layer 14 is connected to the flm (i9 line 11).The m-th line 1s is formed of At or the like.
The region under the n diffusion layer 140 in contact with the vertical 1 [(I9 line 1 snow) of the shape layer 12 is reduced in impurity concentration to form a p-
This is the area 12'.

Generally, the p-m junction capacitance Cp-1 is Cp-n ”N(p
) (N(P) is pli degree), so by forming the p-type well layer 12Kp region 12' as described above, the p-m! 114 can be reduced in capacity. ,' Therefore, -m@ line capacity C
This can be achieved by reducing the value of ma. In this case, since the other regions of the p-type well layer 12 have a sufficiently large p concentration, the storage capacitance of the photodiode formed with the n-type well layer 3 is reduced, and the dynamic range is narrowed. There's nothing to do. When forming the p-type well layer 12, the p-region 12' is formed by implanting and diffusing ions so that the implantation amount is smaller in the p-region 12' than in other parts. easily obtained.

In addition, in the above-mentioned embodiment, only the case of the 3-layer #1 structure of n-sea n using a p-type well layer will be explained. It was p-+a-
Of course, in the case of the p3 layer structure, the same effect can be expected by reducing the n concentration of the well layer below the vertical line 11@.

As explained above, according to the solid-state image sensing device according to the present invention, only one line of the well layer can be formed! Only the region under the diffusion layer that is touched should have a low impurity concentration. *Only the capacity can be reduced. Therefore, without reducing the storage capacitance of the photodiode formed by the well layer and other diffusion layers, I! [[f
It is possible to reduce the capacity of No. A, and it is possible to reduce random noise.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing a conventional solid-state image sensor, and FIG. 2 is a cross-sectional view showing an embodiment of the solid-state image sensor according to the present invention. 11...N-type substrate, 12----P-type well layer, 1
2'...p'''' region 3.14-...+nm1 layer, 16...gate electrode, 19...overlapping signal line.

Claims (1)

[Claims] A well layer having a second conductivity type is provided on the surface of the medium conductive substrate having the first conductivity type, and a first diffusion layer of the first conductivity type constituting the photodiode and the source of the transistor is formed on the well layer. In a solid-state imaging device in which a second diffusion layer and a gate electrode of JII conductivity type 1 and a drain are provided, and the conductivity type 2 diffusion layer is connected to a vertical signal line, one direct [11 mKm contact 1. A solid-state element, characterized in that the II2 impurity concentration in the region under the second diffusion layer is lower than in other regions.