JPS5893463A - Gate circuit for gate turn-off thyristor - Google Patents
Gate circuit for gate turn-off thyristorInfo
- Publication number
- JPS5893463A JPS5893463A JP56190863A JP19086381A JPS5893463A JP S5893463 A JPS5893463 A JP S5893463A JP 56190863 A JP56190863 A JP 56190863A JP 19086381 A JP19086381 A JP 19086381A JP S5893463 A JPS5893463 A JP S5893463A
- Authority
- JP
- Japan
- Prior art keywords
- current
- gto
- voltage
- gate
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/06—Circuits specially adapted for rendering non-conductive gas discharge tubes or equivalent semiconductor devices, e.g. thyratrons, thyristors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Power Conversion In General (AREA)
- Thyristor Switches And Gates (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はゲートターンオフサイリスタ(G’j’0)の
ゲート回路に係b、*にオフ時に大きな遮断電流を流し
つるゲート回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a gate circuit for a gate turn-off thyristor (G'j'0), and relates to a gate circuit that allows a large breaking current to flow through b and * when turned off.
一般にGTOをインバータ(9)路に採用する場合定常
的な電流は可制御電流°内での使用となるが、例えばイ
ンバータの負荷短絡時等は限流リアクトルを極力小さい
ものにしたいという事がらGTOの最大遮断電流は出来
るだけ大きい値が要求される。しかしGTOの最大遮断
電流は、素子のベレット構造が決ってしまえば、外部要
因で決定されてしまう。外部要因としてはスナバコンデ
ンサ容量およびゲート回路による引出し電荷量がある。Generally, when GTO is used in the inverter (9) path, the steady current is used within a controllable current range, but for example, when the inverter load is short-circuited, it is necessary to make the current limiting reactor as small as possible. The maximum breaking current of is required to be as large as possible. However, the maximum breaking current of the GTO is determined by external factors once the pellet structure of the device is determined. External factors include the snubber capacitor capacity and the amount of charge drawn out by the gate circuit.
しかし、インバータ回路においては、負荷短絡時などの
大きな遮断電流が必要な時だけスナバコンデンサの値を
変更する事は実際上出来ない。However, in an inverter circuit, it is practically impossible to change the value of the snubber capacitor only when a large breaking current is required, such as when a load is short-circuited.
そこで本発明は、ゲート回路による引出し電荷量を大き
くする事が電子回路によシ現在のゲート回路で実現可能
である点に着目し、異常の発生によって大きな遮断電流
が必要の時のみ、ゲート回路の負の印加電圧を高くしう
るゲート回路を提供しようとするものである。Therefore, the present invention focuses on the fact that it is possible to increase the amount of charge extracted by the gate circuit using current gate circuits instead of using electronic circuits. The purpose of this invention is to provide a gate circuit that can increase the negative applied voltage.
第1図にゲート回路の基本回路を示す。降圧トランス1
で降圧された、電圧は整流回路2によシ整流され、直流
電圧E−dr1.− Edtが作られる。こと ・で、
降圧トランセ1のV、 、 Vtは同じ電圧値に設定さ
れている為Eds =Ed、となる。Edll Ed。Figure 1 shows the basic circuit of the gate circuit. Step-down transformer 1
The voltage stepped down by the rectifier circuit 2 is rectified to form a DC voltage E-dr1. - Edt is created.・So,
Since V, , and Vt of the step-down transer 1 are set to the same voltage value, Eds = Ed. Edll Ed.
の電圧は、GTO素子の−Voi保証値が13Vである
為一般的には12Vに設計される。Ed2がGTO3を
offする時のp:goff電圧となるが、このEgo
ffと最大遮断電流の関係は第6図の如くEgo[fが
大きい程最大遮断電流IMは大きくなる事が確認されて
いる。この様なデータにもとすき第2図の様な本発明回
路を考案したのである。Since the -Voi guaranteed value of the GTO element is 13V, the voltage is generally designed to be 12V. This is the p:goff voltage when Ed2 turns off GTO3, but this Ego
The relationship between ff and maximum breaking current is as shown in FIG. 6. It has been confirmed that the larger Ego[f, the larger the maximum breaking current IM. In order to handle such data, we devised the circuit of the present invention as shown in FIG.
動作を説明すると、まず、降圧トランス1で2次電圧を
降圧するがこの時Vt<v2になる様降圧トランス2次
巻線の巻数比を変える。整流された直流電圧Edl <
EdB となシEd2はコンデンサ6.7によシ分圧
されEd2とEd+に分けられる。To explain the operation, first, the step-down transformer 1 steps down the secondary voltage, and at this time, the turns ratio of the step-down transformer secondary winding is changed so that Vt<v2. Rectified DC voltage Edl <
EdB and Ed2 are voltage-divided by a capacitor 6.7 and divided into Ed2 and Ed+.
この時Ed、 = Ed、とする事によシ制御回路8は
第1図と同一電圧の印加となり同一動作となる。At this time, by setting Ed, = Ed, the control circuit 8 applies the same voltage as in FIG. 1 and performs the same operation.
GTo3が定常動作状態時はスイッチ9は接点a側に接
触し第1図の基本回路とまったく同じ働きとなる。GT
O3オフ時の負のゲート電流の流れを第4図に示す。負
荷短絡等で異常電流が流れ非常遮断が必要な場合はGT
o3の遮断電流も大きくなる為スイッチ9をb側に接触
させEd、の電圧でGTo3を遮断する事になpEgo
ffが高い場合と同じである為大きな遮断電流まで遮断
出来ることになる。GTO3オフ時の負のゲート電流の
流れを第5図に示す。スイッチ9は第3図の如く電子回
路で構成され短時間の動作に追従出来るようにする。、
スイッチング素子としては、トランジスタの他にサイリ
スタの使用も可能である。また端子10は非常遮断指令
入力端子である。ここに入ってくる信号を短時間、例え
ば100μs程度とする事によりGTOを非常遮断後は
スイッチ9はa側へ自動的に切換えられる為長時間にわ
たって素子の−Voにが13V以上の電圧が印加される
事はなく、短時間の動作の為EdaとしてはGTo3の
−Vaxのアバランシェ電圧以上に設定する事が可能で
、GTo3の大電流を確実に遮断する事が可能となる。When the GTo3 is in a steady operating state, the switch 9 is in contact with the contact a side, and functions exactly the same as the basic circuit shown in FIG. 1. GT
FIG. 4 shows the flow of negative gate current when O3 is off. If abnormal current flows due to load short circuit etc. and emergency shutoff is required, use GT.
Since the cutoff current of o3 also increases, the switch 9 is brought into contact with the b side and GTo3 is cut off with the voltage of Ed, pEgo.
Since this is the same as when ff is high, it is possible to interrupt even a large interrupting current. FIG. 5 shows the flow of negative gate current when GTO3 is off. The switch 9 is constructed of an electronic circuit as shown in FIG. 3, and is capable of following short-time operations. ,
In addition to transistors, thyristors can also be used as switching elements. Further, the terminal 10 is an emergency cutoff command input terminal. By making the input signal short, for example, about 100 μs, the switch 9 is automatically switched to the a side after the GTO is cut off in an emergency, so a voltage of 13 V or more is applied to the -Vo of the element for a long time. Since it is a short-time operation, it is possible to set Eda higher than the -Vax avalanche voltage of GTo3, and it is possible to reliably cut off the large current of GTo3.
第7図に実際のインバータに採用した時の実施例を示す
。実際のインバータでは非常遮断時、図のようなN側G
T03ケをオフすればよ<GTOのゲート回路電源を1
ケにする事が出来ることからスイッチ9としては1ケあ
ればよく、簡単な回路構成で大電流を確実に遮断するこ
とが出来る。FIG. 7 shows an example in which the present invention is applied to an actual inverter. In an actual inverter, during emergency shutoff, the N side G as shown in the figure
Just turn off T03.<Turn the GTO gate circuit power supply to 1.
Since the switch 9 can be made into multiple switches, only one switch 9 is required, and a large current can be cut off reliably with a simple circuit configuration.
本発明によシ異常時の大電流遮断が出莱、装置の限流リ
アクトルの定数値を小さく出来、小形化出来る効果があ
る。The present invention has the advantage of being able to cut off a large current in the event of an abnormality, making it possible to reduce the constant value of the current limiting reactor of the device, and making it possible to downsize the device.
第1図はGTO用ゲート回路の基本回路、第2図は本発
明によるゲート回路の実施例、第3図はスイッチ部の電
子回路例、第4図は定常時のオフ電流の経路図、第5図
は異常時のオフ電流の経路図、第6図はp:goffと
最大遮断電流IMの関係図、第7図はインバータ回路に
おける実装回路例を示す図である。
1・・・降圧トランス、2・・・整流素子、3・・・G
To。
4・・・オン用コンデンサ、5・・・オフ用コンデンサ
、6・・・オフ用コンデンサ、7・・・オフ用コンデン
サ、8・・・制御回路、9・・・切換スイッチ、10・
・・検出端子、11・・・オン用トランジスタ、12・
・・LG。
13・・・オフ用サイリスタ、14・・・スイッチ制御
回第 1 口
語 21D
め 4 ロ
アf15 詔
Y 乙 I
loffFig. 1 is a basic circuit of a gate circuit for GTO, Fig. 2 is an embodiment of a gate circuit according to the present invention, Fig. 3 is an example of an electronic circuit of a switch section, Fig. 4 is a path diagram of off-state current in steady state, FIG. 5 is a path diagram of off-state current during abnormality, FIG. 6 is a diagram showing the relationship between p:goff and maximum cut-off current IM, and FIG. 7 is a diagram showing an example of a circuit mounted in an inverter circuit. 1... Step-down transformer, 2... Rectifying element, 3... G
To. 4... Capacitor for ON, 5... Capacitor for OFF, 6... Capacitor for OFF, 7... Capacitor for OFF, 8... Control circuit, 9... Selector switch, 10...
...Detection terminal, 11...Turn-on transistor, 12.
...LG. 13... Thyristor for off, 14... Switch control time 1st colloquialism 21D Me 4 Lower f15 Edict Y Otsu I loff
Claims (1)
て、装置の負荷短絡等で上記ゲートターンオアサイリス
タに流れる過大電流を確実に遮断する為に異常時0みオ
フ用電圧を上げる為の電源部と切換スイッチを設けた事
を特徴とするゲートターンオフサイリスタのゲート回路
。1. In the gate circuit of the gate turn-off thyristor, in order to reliably cut off the excessive current flowing to the gate turn-off thyristor due to a load short-circuit of the device, etc., a power supply section and a changeover switch are installed to increase the voltage for turning off in the event of an abnormality. A gate circuit for a gate turn-off thyristor characterized by the following.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56190863A JPS5893463A (en) | 1981-11-30 | 1981-11-30 | Gate circuit for gate turn-off thyristor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56190863A JPS5893463A (en) | 1981-11-30 | 1981-11-30 | Gate circuit for gate turn-off thyristor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5893463A true JPS5893463A (en) | 1983-06-03 |
Family
ID=16265016
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56190863A Pending JPS5893463A (en) | 1981-11-30 | 1981-11-30 | Gate circuit for gate turn-off thyristor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5893463A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1992005636A1 (en) * | 1990-09-18 | 1992-04-02 | General Electric Company | Gate turnoff thyristor control circuit with shorted gate detection |
US5262691A (en) * | 1990-09-18 | 1993-11-16 | General Electric Company | Gate turnoff thyristor control circuit with shorted gate detection |
-
1981
- 1981-11-30 JP JP56190863A patent/JPS5893463A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1992005636A1 (en) * | 1990-09-18 | 1992-04-02 | General Electric Company | Gate turnoff thyristor control circuit with shorted gate detection |
US5262691A (en) * | 1990-09-18 | 1993-11-16 | General Electric Company | Gate turnoff thyristor control circuit with shorted gate detection |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69835173T2 (en) | High voltage device for a discharge lamp | |
JPH0629810A (en) | Voltage-controlled semiconductor switch drive circuit | |
KR20010102962A (en) | Inverter apparatus | |
US3401303A (en) | Circuit closing and interrupting apparatus | |
JP7036033B2 (en) | Arc suppression device | |
US4275430A (en) | DV/DT Protection circuit device for gate turn-off thyristor | |
US4298809A (en) | Gate circuit for gate turn-off thyristor | |
JPH0514690Y2 (en) | ||
JPS5893463A (en) | Gate circuit for gate turn-off thyristor | |
JPH0250518A (en) | Driving circuit for static induced type self-arc extinction element and inverter device static induced type self-arc-suppressing element | |
US4687985A (en) | Two terminal control switch having a main switch and a saturable current transformer whose primary winding is series connected with the main switch | |
GB1171254A (en) | Arrangement for On-Load Tap-Changing in Regulating Transformers | |
US4636906A (en) | Solid state circuit interruption employing a stored charge power transistor | |
JPS54144922A (en) | Control system for switching power | |
JPH0847158A (en) | Short-circuit | |
JPS54113038A (en) | Dc power supply circuit | |
US4160921A (en) | Thyristor control | |
JP6919486B2 (en) | DC cutoff device | |
KR920002335Y1 (en) | Ac power supply control circuit | |
JPH0214289Y2 (en) | ||
SU1140106A1 (en) | A.c.voltage regulator-stabilizer | |
JPS639234Y2 (en) | ||
JPH0318053Y2 (en) | ||
US3531713A (en) | Non-arcing tap changing system | |
JPS5922442A (en) | Driving controller of semiconductor switching element |