JPS5922442A - Driving controller of semiconductor switching element - Google Patents

Abstract

PURPOSE:To prevent a switching element from being destroyed, by detecting a power supply voltage of a driving controller, comparing it with a minimum voltage driving safely a main switching element, and stopping the transfer of an on- gate signal when the voltage does not attain to the minimum. CONSTITUTION:A semiconductor switching element (GTO)10 is turned on/off by a driving circuit 30. A control signal on/off-controlling the GTO is inputted to a trigger signal input circuit 40. A power supply voltage detecting circuit 70 detects that the voltage of a power supply circuit 20 has attained to a reference voltage or over to turn on the GTO set in advance, and generates a signal. A logical circuit 80 discriminates that the voltage of the power supply circuit 20 is the reference voltage or over by using a control output signal of the trigger signal input circuit 40 and this detecting signal as input conditions. Only when either the output signal of the logical circuit 80 or the control signal exists, a control signal output circuit 60 outputs a driving signal to the driving circuit 30.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control device for a semiconductor switching element,
In particular, the present invention relates to a drive control device for self-extinguishing semiconductor switching elements such as gate turn-off thyristors and power transistors.

Generally, semiconductor switching elements are widely used in power control devices such as choppers and inverters. Among such semiconductor switching elements, self-extinguishing switching elements such as gate turn-off thyristors and power transistors are useful in various respects as control elements of power control devices.

However, many issues remain in order to safely operate one-gate turn-or-size risk and power transistors. That is, in order to safely operate a gate turn-off risk or a power transistor, a gate or base signal having a necessary and sufficient peak value must be supplied to the control terminal.

However, when a device using these elements is started, stopped, or momentary power outage occurs, there is a period in which the power supply voltage of the gate or base drive circuit is lower than a predetermined established value.

If a signal is applied to the gate or base in such a state, power dissipation during the switching transient period, especially during the steady on period in power transistors, increases, and in extreme cases, this can lead to destruction of these devices.

The present invention solves the above problems and provides a drive control device that can safely operate a semiconductor switching element by detecting the power supply voltage and controlling the operation of the drive control circuit. There is a particular thing.

DESCRIPTION OF THE PREFERRED EMBODIMENTS A drive control device for a semiconductor switching element according to an embodiment of the present invention will be explained below with reference to FIGS. 1 to 3.

FIG. 1 shows an embodiment of a drive control device applied to a gate turn-off switch (hereinafter referred to as GTO) as a semiconductor switching element, and 10 is the GTO.

20 is a power supply circuit of the drive control device, and 30 is a gate drive circuit that turns on/off a signal supplied to the gate, which is a control pole of the GTO. In order to control the gate drive circuit 30, a gate trigger signal input circuit 40, a minimum on-time setting circuit 50, and a gate signal output circuit 60 are provided.

In particular, in the present invention, the power supply voltage of the gate drive circuit 30, that is, the drive control A power supply voltage detection circuit 70 for detecting whether the voltage of the power supply circuit 20 of the device is higher or lower than a predetermined reference voltage, and a logic operation circuit 80 for performing a logical operation on the detection signal of the power supply voltage detection circuit 70 are provided. It is being More specifically, the control power supply circuit 20 includes a primary winding 21a, a secondary winding! It has a power transformer 21 having 21b and 21c, rectifiers 22a and 22b1, smoothing capacitors 23a and 23b, and a constant voltage circuit 24,
Connected as shown.

The gate drive circuit 30 includes a first field effect transistor 3
1. It has a second field effect transistor 32 and a third field effect transistor 33, and a resistor 34, 35 and a Zener diode 36 are connected between the source and gate of the transistor 31, and the power supply of the drive control device is connected. circuit 2
0 as shown. The source of the transistor 31 is connected to the gate of the GTOIQ, and the gate is connected to the source of the transistor 32 via a resistor 37.

The gate of the transistor 32 is connected to the gate signal output circuit 6.
0 sources are respectively connected to the negative electrode of the rectifier 22b. The source of the transistor 33 is connected to the gate of the GTO 10, and the gate is connected to the gate signal output circuit 60. Gate signal input image FM! r40 is a photocoupler 41, a transistor 42, and a first Schmitt trigger circuit 4.
It has 3.

A light emitting diode 41a of the photocoupler 41 has a diode 44 connected antiparallel to it and a resistor 45b connected in parallel, and is connected between input terminals 46a and 46b via the resistor 45a.

The anode side of the photodiode 4 ], b of the photocoupler 41 is connected to the base of the transistor 42 . The collector of the transistor 42 is connected to the cathode side of the photodiode 41b via a resistor 45C, and this cathode side is further connected to the constant voltage circuit 24 in the same manner as described above.

The input terminal of the first Schmitt trigger circuit 43 is connected to the connection point between the collector of the transistor 42 and the resistor 45c. The power supply voltage detection circuit 70 includes voltage detection elements such as a Zener diode 71, a transistor 72, and a second
The Zener diode 71 is connected to the control power supply circuit 2 via resistors 74a and 74b.
0 is connected in parallel to the capacitor 23b. Transistor 72 is connected to constant voltage circuit 24 of power supply circuit 20 and capacitor 23b via resistor 74c.

The input terminal of the second Schmitt trigger circuit 73 is connected to the collector of transistor 72. The logic operation circuit 80 has an operation element, for example, an AND circuit 81, and one input terminal of the AND circuit 81 is connected to the output terminal of the first Schmitt trigger circuit 43 of the gate trigger signal input circuit 40. .

The other terminal of the AND circuit 81 is connected to the power supply voltage detection circuit 70
The output terminal of the second Schmitt trigger circuit 73 is connected to the output terminal of the second Schmitt trigger circuit 73. The minimum on-time setting circuit 50 is an OR circuit 5
1. It is composed of a multivibrator 52 and an OR circuit 53.

One input terminal of the OR circuit 51 is connected to the AND circuit 81 , and the other input terminal is connected to the multivibrator 52 and to the constant voltage circuit 24 of the power supply circuit 20 .

One input terminal of the OR circuit 53 is connected to the output terminal of the multivibrator 52, and the other input terminal is connected to the output terminal of the AND circuit 81. The gate signal output circuit 60 includes an amplifier 61, an inverting amplifier 62, and resistors 63 and 64. The input terminals of the amplifier 61 and the inverting amplifier 62 are connected to the output terminal of the OR circuit 53.

Further, the output terminal of the amplifier 61 is connected to the gate of the transistor 32 of the gate drive circuit 30, and the output terminal of the amplifier 61 is connected to the gate of the transistor 32 of the gate drive circuit 30.
The output terminal of is connected to the gate of the field effect transistor 33.

In the gate drive control device having the above configuration, the DC output voltage of the control power supply circuit 20 is smoothed by the capacitors 23a and 23b, and a constant voltage is generated by the constant voltage circuit 24.

The operation of this device will be explained next. When the voltage of the power supply circuit 20 of the drive control device is normal, that is, VD in FIG.
It is assumed that a gate trigger signal is supplied between the input terminals 46a and 46b of the gate trigger signal input circuit 40 when the voltage S1 indicated by -E is equal to or higher than the reference voltage VZDJ. That is, as shown in FIG. 2, when the gate trigger signal S2 is supplied, the light emitting diode 41a/
Z light is emitted, and the transistor 42 becomes conductive via the photodiode 41b.

Accordingly, the input signal of the first Schmitt trigger circuit 43 becomes low level, and its output becomes high level.

Here, the capacitor 23b of the drive control device power supply circuit 20
The terminal voltage S1 is the breakdown voltage VZ of the Zener diode 71
Since the voltage is higher than the reference voltage j'ZDi defined by D, current flows through the circuit consisting of the Zener diode 71, the parent resistor 74, and 74b, and a potential difference is generated across the resistor 74b, turning on the transistor 72. are doing.

As a result, the collector potential of the transistor 72 becomes a value close to zero. This signal is input to the second Schmitt trigger circuit 73 to clearly distinguish between the on and off states of the transistor 72. Therefore, since the transistor 72 is on here, VCQl shown in FIG. 2 is at a low level, and the output of the second Schmitt trigger circuit 73 is at a high level. This signal and photocoupler 41
By taking the AND with the gate trigger signal ゛ inputted via A high level signal is output ($2/fll=indicator ANI), f4. ).

\Here\N~! ■ To h 9 To Tsuta AND circuit 8J output signal S
4, it is input to the multi-bye break 52 through the OR circuit 51. As a result, the multi-by-break 52 operates, and its output signal S5 is input to one input terminal of the OR circuit 53, and the output signal S4 of the AND gate 81 is input as is to the other input terminal.

Therefore, an output signal S6 corresponding to one of the output signals S5 of the monostable multivibrator 52 and the output signal S4 of the AND circuit 81, which has a wider pulse width, is output to the output terminal of the OR circuit 53. , t2
- A minimum on-time of tl-Δt is set.

The output signal S6 of the OR circuit 53 is the gate signal output circuit 6
0 amplifier 61 and an inverting amplifier 62. Therefore, since the output signal of the OR circuit 53 is at a high level, the output of the amplifier 61 of the gate signal output circuit 60 is at a high level, and the output of the inverting amplifier 62 is inverted and amplified and becomes a low level.

As a result, the field effect transistor 33 of the gate drive circuit 30 is turned on, and as a result, the transistor 31 is turned on, and the GTOIQ receives power from the power supply circuit 20 to the gate while the on signal S7 is supplied to the gate drive circuit 30. is supplied, and this GTO 10 is turned on.

Next, when the power supply voltage of the drive control device is lower than the reference voltage VzD1 due to the above-mentioned factors, the gate trigger signal S
The operation when signal 2' enters the gate trigger signal input circuit will be explained. Capacitor 2 of power supply circuit 20 of drive control device
31) becomes lower than the reference voltage due to an external factor, no current flows through the Zener diode 71. Therefore, the transistor 72 is turned off, and the input of the second Schmitt trigger circuit becomes high level as shown in S3 of VCQl shown in FIG. As a result, the AND circuit 81 inputs the high level signal of the first Schmitt trigger circuit 43 and the low level signal of the second Schmitt trigger circuit 73, so the output of the AND circuit 81 is low level. becomes.

Therefore, the output of the OR circuit 51 becomes low level,
The multivibrator circuit is not triggered and the input of the OR circuit 53 which is to be operated is at a morrow level, so its output is at a low level. As a result, in the gate signal output circuit,
The output of the inverting amplifier circuit 62 becomes high level, and the transistor 33 is turned on. When the transistor 33 turns on,
A closed circuit is formed from the positive electrode of the capacitor 23b to the cathode of GTo, 10, the gate, the transistor 33, and the negative electrode of the capacitor 23b, and the gate of GTOIO is reverse biased to maintain an off state.

As explained above, even if a gate trigger signal is input to this device when the power supply voltage of the drive control device is lower than the reference voltage VzDl, GTOlo will not be turned on.

As a result of the above, a gate pulse having a peak value insufficient to completely operate 'jTOIQ is not applied to the gate of GTOIQ.

In addition, in order to operate GTOIQ safely, a negative pulse is applied to its gate, and at the time of turning off, the voltage of the snubber capacitor (not shown) of GTOIQ is discharged to a sufficiently low value. In order to satisfy this condition, it is necessary to ensure the minimum on-time required to discharge the charge accumulated in the snubber capacitor.

The drive control device of the present invention includes a minimum on-time setting circuit 50 to ensure this for the input trigger signal.
is included. This circuit is connected to the voltage detection circuit 70.
As shown in FIG. 3, by incorporating the power supply voltage S1 after the
Even when the voltage changes and there is a transition from a state below the reference voltage VZD to a state above it, or from a state above the reference voltage VZD to a state below this, the GTOIQ is supplied with gate power that ensures the minimum on-time. be done. therefore,
GTOIQ can be gate turned off safely.

That is, as shown in FIG. 3, the gate trigger signal is
The voltage Sl of the power supply circuit 20 is relative to the reference voltage VZDIK,
When spanning the period of transition from low to high (not shown), multi-byte occurs when the output of the AND circuit 81 changes to high level.

The plater circuit 52 is set, and the output S5 is input to the OR circuit 53 for a predetermined period from time to.

Further, when the voltage S1 straddles a period (t3 in the figure) in which the voltage S1 changes from high to low with respect to the reference voltage VZDt, the multivibrator circuit 52 is set by the output S4 of the AND circuit 81, and the multivibrator circuit 52 is set for a predetermined period from time t3. ,
One output S5 is input to the OR circuit 53.

As described above, even if the power supply voltage of the power supply circuit 20 of the drive control device changes due to starting, stopping, or instantaneous power failure of the power control device, sufficient power is supplied to the control electrodes of the GTO, power transistor, etc., and as a result, , the main switching element is not destroyed.

As described above, according to the present invention, the power supply voltage of the drive control device power supply circuit is detected, this detected voltage is compared with the minimum voltage required to safely drive the corresponding main switching element, and the power supply voltage is determined. Since the transmission of the on-gate signal is stopped when the voltage does not reach this reference voltage, when the power supply voltage of the drive control circuit is less than the reference voltage, the corresponding main switching element is automatically turned off. By doing this, it is possible to effectively prevent destruction of this main switching element.Also, if the power supply voltage exceeds the reference value, it will automatically return to the normal operating state, and there is no need to reset it.Furthermore, The present invention has technical and practical advantages, such as providing a minimum on-time setting circuit after the power supply voltage detection circuit and ensuring that the on-time is always greater than the minimum allowable on-time determined by the characteristics of the power transistor by adjusting the snubber circuit constant (GTO or ). It has excellent practical effects.

[Brief explanation of the drawing]

FIG. 1 is an electrical wiring diagram of a drive control device for a semiconductor switching element according to an embodiment of the present invention, and FIGS. 2 and 3 are diagrams showing its operation timing, respectively. DESCRIPTION OF SYMBOLS 10... Gate turn-off thyristor, 20... Drive control device power supply circuit, 30... Drive circuit, 40... Trigger signal input circuit, 50... Minimum on-time setting circuit, 60... Gate signal Output circuit, 70...Power supply voltage detection circuit, 80...Logic circuit 0 Application agent Patent attorney Kikuchi Go Department 23

Claims (2)

[Claims] (1) A drive circuit that turns on and off the semiconductor switching element, a power supply circuit of the drive control device, a trigger signal input circuit that receives a trigger signal and inputs a control signal for controlling the semiconductor switching element on and off, and the power supply circuit. a power supply voltage detection circuit that detects that the voltage has exceeded a preset reference voltage for turning on the semiconductor switching element and issues a signal; and a detection signal of the power supply voltage detection circuit and the trigger signal input circuit. a logic circuit for discriminating that the voltage of the power supply circuit is equal to or higher than the reference voltage using the control output signal of the control output signal as an input condition; 1. A drive control device for a semiconductor switching element, comprising a control signal output circuit for operating a drive circuit. (2) A drive circuit that turns on and off the semiconductor switching element, a power supply circuit of the drive control device, a trigger signal input circuit that receives a trigger signal and issues a control signal for controlling the switching element on and off, and the power supply circuit. a power supply voltage detection circuit that detects that the voltage has exceeded a preset reference voltage for turning on the semiconductor switching element and generates a signal, and a detection signal of the power supply voltage detection circuit and a control signal input circuit a logic circuit that uses a control output signal as an input condition and discriminates whether or not the power supply voltage is equal to or higher than the reference voltage; and means that uses the output signal of the logic circuit as an input and obtains a minimum allowable on-time signal of the semiconductor switching element. , a minimum on-time setting circuit having an OR circuit whose input condition is the signal generated by this means and the output signal of the logic circuit, and the output signal of this minimum on-time setting circuit as input, and the drive circuit 1. A drive control device for a semiconductor switching element, comprising: a control signal output circuit for operating a semiconductor switching element.