JPS5893243A - Improvement of polysilicon thin film semiconductor - Google Patents

Improvement of polysilicon thin film semiconductor

Info

Publication number
JPS5893243A
JPS5893243A JP19219881A JP19219881A JPS5893243A JP S5893243 A JPS5893243 A JP S5893243A JP 19219881 A JP19219881 A JP 19219881A JP 19219881 A JP19219881 A JP 19219881A JP S5893243 A JPS5893243 A JP S5893243A
Authority
JP
Japan
Prior art keywords
hydrogen
thin film
polysilicon
substrate
laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19219881A
Other languages
Japanese (ja)
Inventor
Keiji Kobayashi
啓二 小林
Yasuo Nakai
康雄 中井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP19219881A priority Critical patent/JPS5893243A/en
Publication of JPS5893243A publication Critical patent/JPS5893243A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To improve electrical conductivity of polycrystal by annealing a poly crystalline Si film deposited on a substrate with laser or electron beam and diffusing hydrogen into the polycrystalline grain boundary using the activated atoms or molecules of hydrogen excited by a micro wave under the particular conditions of reaction temperature and pressure. CONSTITUTION:An ordinary polycrystalline Si thin film deposited on a substrate using monosilane is annealed by the laser or electron beam in order to make large the crystal grain size, the activated atoms or molecules of hydrogen activated by the microwave is diffused deeply into the Si in order to activate the grain boundary and a barrier height of grain boundary is reduced. At this time, the hydrogen activating treatment is carried out at the reaction temperature of 200-500 deg.C and pressure of 0.2-2.0 Torr. Thereby, electrical characteristic of polycrystalline Si thin film is improved and a semiconductor substrate having excellent quality for industrial use can be obtained.

Description

【発明の詳細な説明】 本発明は多結晶シリコンをアニールし、結晶粒を成長さ
せて後マイクロ波により励起された活性化水素を拡散せ
しめて半導体素子としての特性を向上せしめる方法に関
する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of annealing polycrystalline silicon to grow crystal grains and then diffusing activated hydrogen excited by microwaves to improve the characteristics of a semiconductor device.

絶縁膜基板に薄膜トランジスタを形成する場合、多結晶
シリコン(以下ボリシ11コン)を用いるデバイスかあ
る。ポリシリコンは他薄膜材料に比較して信頼性に優れ
ているが定堆積したままのポリシリコンでは薄膜I−ラ
ンジスタにした場合、しきい値電圧が大きいこと、電界
効果移動度が小さいことなどから十分良好な特性が得ら
れない。この原因として微結晶の集合体であるボ1)シ
リコンの境界にある粒界に欠陥準位密度が1018cm
”程度存在していることがあげられる。従って表面及び
空乏層にある欠陥がフェルミ−にそって動き、ゲート電
圧は反転層や蓄M層を形成するより非伝導体領域の電荷
を満すのに利用される。またチャンネル形成後もゲート
電圧は欠陥と相互関係をもち、コンダクタンスを減少さ
せる。粒界のポテンシャル障壁は伝導性を悪くし、電界
効果移動度を減少させる。
When forming a thin film transistor on an insulating film substrate, there is a device using polycrystalline silicon (hereinafter referred to as polycrystalline silicon). Polysilicon has superior reliability compared to other thin film materials, but when using polysilicon as deposited to form a thin film I-transistor, the threshold voltage is large and the field effect mobility is small. Sufficient characteristics cannot be obtained. The reason for this is that the density of defect levels is 1018 cm in grain boundaries at the boundaries of silicon, which is an aggregate of microcrystals.
Therefore, the defects on the surface and depletion layer move along the Fermi, and the gate voltage fills the charge in the non-conducting region rather than forming an inversion layer or storage M layer. Even after channel formation, gate voltage interacts with defects and reduces conductance. Potential barriers at grain boundaries impair conductivity and reduce field-effect mobility.

このためポリシリコンの粒界の改善のため棟ソの対策考
えられている。その主なものにレーザー、電子線等によ
るアニールを行い、結晶粒を成長させ、単位容積あたり
の粒界を減少させる方法や、水素プラズマ処理により粒
界の局在準位筐度をさげる方法等がある。
For this reason, countermeasures are being considered to improve the grain boundaries of polysilicon. The main methods include a method of annealing using lasers, electron beams, etc. to grow crystal grains and reducing the number of grain boundaries per unit volume, and a method of reducing the localized level density of grain boundaries by hydrogen plasma treatment. There is.

従来用いられているプラズマ水素処理方法は水素の拡散
層は数、μ以下で、その反応層がうずく、又結晶粒径の
成長も期待できない。薄膜トランジスタの移動度も1〜
10Cm2/v−8程度であり、このプラズマ水素処理
方法では粒径が50A程度であり、粒界のポテンシャル
障壁は不純物濃度によって依存するが、例えば、1×l
QCm  の場合0.5 e Vが0.3 e Vに減
少する程度である。次きにレーザー等によるアニール工
程で、ポリシリコンを改善スる場合、レーザー出力に依
存するが、一般に高出力の方が、結晶粒が大きくない粒
界の性質も改善される傾向にある。しかしレーザーアニ
ールを施されたポリシリコンの薄膜トランジスタの特性
の温度依存性よりみるかぎり、結晶粒の成長と粒界での
格子不整、中性点欠陥帯電点欠陥を涜少せしめ、ポテン
シャル障壁の改善が計れているようだが、レーザーアニ
ール陵も粒界散乱効果が残留し、単結晶シリコンに比較
すると点欠陥密度の多い材料であることが分る。この点
欠陥の存在はポリシリコンの内部にも多数存在しており
、この密度を減少させるためにはプラズマ水素処理化を
施すことによりその特性の改善が一層計れることが分っ
た。しかし従来のプラズマ水素処理方法では水素拡販が
表面層のみで効果が未だ十分ではない。
In conventional plasma hydrogen treatment methods, the hydrogen diffusion layer is less than a few microns, the reaction layer is tingling, and no growth in crystal grain size can be expected. The mobility of thin film transistors is also 1~
10Cm2/v-8, and in this plasma hydrogen treatment method, the grain size is about 50A, and the potential barrier at the grain boundary depends on the impurity concentration, but for example,
In the case of QCm, 0.5 eV decreases to 0.3 eV. Next, when polysilicon is improved by an annealing process using a laser or the like, it depends on the laser output, but in general, higher output tends to improve the properties of grain boundaries where crystal grains are not large. However, as far as we can see from the temperature dependence of the characteristics of polysilicon thin film transistors subjected to laser annealing, it is possible to reduce the growth of crystal grains, lattice misalignment at grain boundaries, neutral point defects, charged point defects, and improve the potential barrier. However, the grain boundary scattering effect remains even after laser annealing, indicating that the material has a higher density of point defects than single-crystal silicon. A large number of these point defects exist inside polysilicon, and it has been found that the properties can be further improved by applying plasma hydrogen treatment to reduce this density. However, with conventional plasma hydrogen treatment methods, hydrogen sales are only achieved in the surface layer, and the effect is still not sufficient.

本発明は上記の点に鑑み、ポリシリコン薄膜の効果的な
電気的特性の改善方法を提供することを目的とする。 
 。
In view of the above points, it is an object of the present invention to provide a method for effectively improving the electrical characteristics of polysilicon thin films.
.

本発明は、モノシランから形成された普通のポリシリコ
ンをレーザー、電子線等でアニールして結晶粒径を犬き
くシ、シかる後、マイクロ波により励起された水素活性
化原子をポリシリコン中に深く拡散せしめて粒界の活性
化、粒界のバリアハイドを減少せしめポリシリコン薄膜
の電気的特性の改善をはかることを特徴とする。
In the present invention, ordinary polysilicon formed from monosilane is annealed with a laser, an electron beam, etc. to increase the crystal grain size, and then hydrogen activated atoms excited by microwaves are added to the polysilicon. It is characterized by deep diffusion to activate grain boundaries, reduce barrier hydride at grain boundaries, and improve the electrical characteristics of polysilicon thin films.

更に本発明の特徴とするところはポリシリコン薄膜の水
素活性化処理に於て、反応温度と圧力を最適化するかま
たはマイクロ波で励起された水素原子を反応炉に訪導し
、粒径の拡大と粒界の水素偏析による水素活性化を行う
ことにある。
A further feature of the present invention is that in the hydrogen activation treatment of polysilicon thin films, the reaction temperature and pressure are optimized, or hydrogen atoms excited by microwaves are introduced into the reactor to reduce the particle size. The purpose is to activate hydrogen through expansion and hydrogen segregation at grain boundaries.

本発明ではシリコン又はガラス等の基板の上にポリシリ
コン膜を所望の厚さに堆積、形成させる。普通のモノシ
ランから形成されたポリシリコンの粒径は50A以下で
非常に小さいものであるが、これをアニールする。アニ
ールは結晶の格子振動を与えるエネルギー臨を使用し、
通常熱、レーザー、電子線等いずれを使用してもよい。
In the present invention, a polysilicon film is deposited and formed to a desired thickness on a substrate such as silicon or glass. Polysilicon made from ordinary monosilane has a very small grain size of 50A or less, but it is annealed. Annealing uses an energy beam that causes lattice vibrations in the crystal.
Any of ordinary heat, laser, electron beam, etc. may be used.

粒径を充分成長させた後、マイクロ波で励起された水素
原子を結晶内に拡散せしめる。
After the grain size has grown sufficiently, hydrogen atoms excited by microwaves are diffused into the crystal.

水素は主に粒界内に拡散、偏析し粒界の電気特性の改善
に寄与する。アニール後、水素を拡散させる理由はアニ
ールによって結晶粒径を大型化し、粒界の水素を失うこ
となく、粒径の拡大と粒界の活性化を行い、これらの相
乗効果によって従来のレーザアニールだけでは得られな
かった粒界ポテンシャルバ11アの減少、欠陥密度の減
少が期待できる。また普通のプラズマ水素処理では水素
の侵入深さが数μ以下であるのに対し、この相乗効果に
よって、反応温#200〜500C1圧力0.2〜2.
0 Torrの範囲にすると水素の侵入深さが蔵人0.
5 flMにもなりうることを見出した。こ\で反応温
度を上記範囲に設足する理由は、200C以下では拡散
が不充分であり、500C以上では水素がとんでしまっ
て導入ができないからである。また圧力が0.2TOr
r以下では拡散の効果が少く、2.0TOrr以上では
放電の効果が少い。またポリシリコンの水素化方法に関
し、反応炉前にマイクロ波で励起された原子秋水累を導
入するとレーザーアニールポリシリコン中の内部に存在
する点欠陥の改善が計れる。このプラズマ処理は素子作
製時のゲート酸化後に行ってもよい。
Hydrogen mainly diffuses and segregates within the grain boundaries and contributes to improving the electrical properties of the grain boundaries. The reason for diffusing hydrogen after annealing is that annealing increases the crystal grain size, expands the grain size and activates the grain boundaries without losing hydrogen at the grain boundaries, and the synergistic effect of these increases the efficiency of conventional laser annealing. A reduction in the grain boundary potential barrier 11a and a reduction in defect density, which could not be obtained in the conventional method, can be expected. In addition, in ordinary plasma hydrogen treatment, the penetration depth of hydrogen is several microns or less, but due to this synergistic effect, the reaction temperature #200-500C1 pressure 0.2-2.
When the pressure is set to 0 Torr, the penetration depth of hydrogen is 0.
We found that it can be as high as 5 flM. The reason why the reaction temperature is set within the above range is that at temperatures below 200C, diffusion is insufficient, and at temperatures above 500C, hydrogen is blown off and cannot be introduced. Also, the pressure is 0.2 TOr
Below r, the diffusion effect is small, and above 2.0 TOrr, the discharge effect is small. Regarding the method for hydrogenating polysilicon, introducing microwave-excited atomic hydration in front of the reactor can improve point defects existing inside laser-annealed polysilicon. This plasma treatment may be performed after gate oxidation during device fabrication.

次に本発明の詳細を実施例と図面を参明しながら説明す
ることにする。比抵抗2Ωcmの厚さ400μmのシリ
コン基板を用い、これに約300OAの酸化膜を形成す
る。シランを原料としたポリシリコン(厚ざ] 、a 
m )をこの酸化膜上に630Cに於て堆積させた。こ
の基板を使用し、熱レーザー、電子絆等のアニールを行
った後、次の各種水素プラズマ処理を行い、基板の電気
特性、拡散深さ等を測定した。またこれらの半導体基板
を用いてP−チャンネル、AlゲートTPTを製作しそ
の移動度を測定した。
Next, details of the present invention will be explained with reference to examples and drawings. A 400 μm thick silicon substrate with a specific resistance of 2 Ωcm is used, and an oxide film of about 300 OA is formed on it. Polysilicon (thickness) made from silane, a
m) was deposited on this oxide film at 630C. Using this substrate, after annealing using thermal laser, electronic bonding, etc., the following various hydrogen plasma treatments were performed, and the electrical characteristics, diffusion depth, etc. of the substrate were measured. Furthermore, a P-channel, Al-gate TPT was manufactured using these semiconductor substrates, and its mobility was measured.

実施例I CW、Arレーザー10W1スキヤンスピード12 c
TrL/ see、ΔY(Y方向送り)−40μm1ス
ポツト径78、μm1基板温度500Cでポリシリコン
基板をアニールし、圧力P−01〜2,0Torr温度
T=300〜450t:’でプラズマ水素処理を行った
。この基板の水素の侵入深さと温度との関係を第1図に
、侵入深さと出力との関係を第2図に、比抵抗とイオン
注入の濃度の関係を第3図に示した。第1図および第2
図の■はブラスマ水素処理のみ(第1図ではP = 0
.5Torr、15時間、餌2図ではT=400??1
4時間)のテークであり、■はIOW、CWArレー廿
−アニールとプラズマ水素処理とを行ったものである。
Example I CW, Ar laser 10W1 scan speed 12c
TrL/see, ΔY (Y direction feed) - 40 μm 1 spot diameter 78, μm 1 Polysilicon substrate is annealed at a substrate temperature of 500 C, and plasma hydrogen treatment is performed at a pressure P of 1 to 2,0 Torr and a temperature T of 300 to 450 t:' Ta. FIG. 1 shows the relationship between hydrogen penetration depth and temperature in this substrate, FIG. 2 shows the relationship between penetration depth and output, and FIG. 3 shows the relationship between resistivity and ion implantation concentration. Figures 1 and 2
■ in the figure indicates only plasma hydrogen treatment (P = 0 in Figure 1)
.. 5 Torr, 15 hours, bait 2, T = 400? ? 1
4 hours), and (2) is one in which IOW, CWAr radiation annealing, and plasma hydrogen treatment were performed.

第1図および第2図から明らかに、■よりもQ)の場合
の侵入深さは大きくなっている。また第3図に於て、■
はプラズマ処理のみ(300tl?)のもの、■はレー
ザ−7ニールのみを行ったもの、■はレーザ−アニール
と水素プラズマ処理とを行ったものであり、レーザーア
ニールと水素プラズマ処理を行ったC)は不純物濃度が
低濃度碩域で特に改善されている。
It is clear from FIGS. 1 and 2 that the penetration depth in case Q) is larger than in case ①. Also, in Figure 3, ■
1 is for plasma treatment only (300 tl?), 2 is for laser 7 annealing only, 2 is for laser annealing and hydrogen plasma treatment, ) is particularly improved in the low impurity concentration range.

本例のレーザーアニールとプラズマ水素処理とを行った
ものの粒径は2〜10μmであり、プラズマ処理のみの
もの、1は50Aであった。
In this example, the particle size of the sample subjected to laser annealing and plasma hydrogen treatment was 2 to 10 μm, and the particle size of sample 1, which was subjected to only plasma treatment, was 50A.

・1: 実施例2 上記基板(10WCWA rレーザーアニール、)’ 
= 0.5 Torr 、温1350C)を用いてP−
チャンネルAA’ゲートFETを作製した。即ち51(
100)基板十に300OAの酸化膜をつけ、この上に
800OAのポリシリコンを減圧CVD法によってつけ
た。Pを130 K e Vll Q  cmでイオン
注入を行い、レーザーアニール(IOW)を行った。こ
れを基板としてまず酸化膜2700Aを形成し、これに
PSGIIIを700OA形成し、これをソースとドレ
イン形成のマスクとして、P+デボを行い、接合を形成
する。しかる後全面はくすして、再び酸化膜を形成し、
フィールドにP及びBのリーク防止層を形成した。
・1: Example 2 Above substrate (10WCWA r laser annealing,)'
= 0.5 Torr, temperature 1350C)
A channel AA' gate FET was fabricated. That is, 51 (
100) An oxide film of 300 OA was applied to the substrate, and a polysilicon film of 800 OA was applied thereon by low pressure CVD. P ion implantation was performed at 130 K e Vll Q cm, and laser annealing (IOW) was performed. Using this as a substrate, an oxide film 2700A is first formed, and 700 OA of PSGIII is formed thereon. Using this as a mask for forming the source and drain, P+ deposition is performed to form a junction. After that, the entire surface is scrubbed and an oxide film is formed again.
P and B leak prevention layers were formed on the field.

その後フィールド酸化膜をCVD法により1.1±0.
1μ形成し、ゲート領域をエツチングして、HCl酸化
法により、100OIZ’、]050Aのゲート酸化膜
を形成する。ゲート酸化膜形成後チャンネルインプラ後
、Nt アニールを1000Cで行い、プラズマ水素処
理を350t’?、0.5’[’orrで行った。Al
蒸着で電極形成後シンクを行い、FETを作製した。本
デバイスのチャンネル長は8μ、チャンネル幅は16μ
であり、= 95 Cm2/ V −seeであった。
After that, a field oxide film of 1.1±0.
A gate oxide film of 1000IZ', ]050A is formed by etching the gate region and using the HCl oxidation method. After gate oxide film formation and channel implantation, Nt annealing was performed at 1000C, and plasma hydrogen treatment was performed at 350t'? , 0.5'['orr. Al
After forming electrodes by vapor deposition, sinking was performed to fabricate an FET. The channel length of this device is 8μ and the channel width is 16μ.
and = 95 Cm2/V-see.

又移動度の温度依存性は前者はTo・5後者はrr  
Iの温度依存性をもつことがわかった。レーザー処理を
稚さないプラズマ処理のみの基鈑ではa h = 1〜
10Cm2/v−戟であった。
Also, the temperature dependence of mobility is To・5 for the former and rr for the latter.
It was found that it has a temperature dependence of I. For a base plate with only plasma processing that does not require laser processing, a h = 1~
It was 10 Cm2/v-geki.

以上述べたように、本発明の処理法はFETの基板処理
上して効果的であり、工業的にすぐれた半導体基板が得
られる。本処理法は単にFETだけではなく、ポ11シ
リコン太陽電池の基板にも適用できることは勿論である
As described above, the processing method of the present invention is effective in processing FET substrates, and an industrially excellent semiconductor substrate can be obtained. Of course, this processing method can be applied not only to FETs but also to substrates of polysilicon solar cells.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の処理による水素の侵入深さと処理温度
との関係を示す図、第2図は同じく水素の侵入深さと圧
力との関係を示す図、第3図は同じく比抵抗と不純物濃
度との関係を示す図である。 出願人代理人 弁理土鈴 江 飲 彦 才3図 −B P−濃戊(cm’)
Figure 1 is a diagram showing the relationship between hydrogen penetration depth and treatment temperature in the treatment of the present invention, Figure 2 is a diagram showing the relationship between hydrogen penetration depth and pressure, and Figure 3 is also a diagram showing the relationship between specific resistance and impurity. FIG. 3 is a diagram showing the relationship with concentration. Applicant's agent: Patent Attorney Tosuzu E Nin Hikosai 3-B P-Nogi (cm')

Claims (3)

【特許請求の範囲】[Claims] (1)  ポリシリコン薄膜を基板に堆積後、レーザー
、電子線などのアニールを施し、マイクロ波により励起
された水素活性化原子及び分子により、ポリシリコンの
粒界内に水素を拡散せしめてポリン11コンの電気伝導
性を改善することを特徴とするポリシリコン薄膜半導体
の改善方法。
(1) After depositing a polysilicon thin film on a substrate, it is annealed using laser, electron beam, etc., and hydrogen activated atoms and molecules excited by microwaves diffuse hydrogen into the grain boundaries of polysilicon, forming polysilicon 11. A method for improving a polysilicon thin film semiconductor, characterized by improving the electrical conductivity of a conductor.
(2)  前記水素活性化処理は、反応温度200C〜
500C1圧力0.2〜2. Q ’i’orrの条件
下で行う特許請求の範囲第1項記載のポリシリコン薄膜
半導体の改善方法。
(2) The hydrogen activation treatment is performed at a reaction temperature of 200C~
500C1 pressure 0.2-2. The method for improving a polysilicon thin film semiconductor according to claim 1, which is carried out under the condition of Q'i'orr.
(3)  前記水素活性化処理は、水素をマイクロ波で
励起し、原子状の水素を反応炉に誘導し処理するもので
ある特許請求の範囲第1項記載のポリシリコン薄膜半導
体の改善方法。
(3) The method for improving a polysilicon thin film semiconductor according to claim 1, wherein the hydrogen activation treatment involves exciting hydrogen with microwaves and guiding atomic hydrogen to a reactor for treatment.
JP19219881A 1981-11-30 1981-11-30 Improvement of polysilicon thin film semiconductor Pending JPS5893243A (en)

Priority Applications (1)

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JP19219881A JPS5893243A (en) 1981-11-30 1981-11-30 Improvement of polysilicon thin film semiconductor

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Application Number Priority Date Filing Date Title
JP19219881A JPS5893243A (en) 1981-11-30 1981-11-30 Improvement of polysilicon thin film semiconductor

Publications (1)

Publication Number Publication Date
JPS5893243A true JPS5893243A (en) 1983-06-02

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62272521A (en) * 1986-05-21 1987-11-26 Toshiba Corp Manufacture of semiconductor device
JPH01238112A (en) * 1988-03-18 1989-09-22 Sanyo Electric Co Ltd Treating method of semiconductor
JPH0282578A (en) * 1988-09-19 1990-03-23 Seiko Epson Corp Manufacture of thin film transistor
JPH04186735A (en) * 1990-11-20 1992-07-03 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPH04206837A (en) * 1990-11-30 1992-07-28 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
WO1993019022A1 (en) * 1992-03-25 1993-09-30 Kanegafuchi Chemical Industry Co., Ltd. Thin polysilicon film and production thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62272521A (en) * 1986-05-21 1987-11-26 Toshiba Corp Manufacture of semiconductor device
JPH01238112A (en) * 1988-03-18 1989-09-22 Sanyo Electric Co Ltd Treating method of semiconductor
JPH0282578A (en) * 1988-09-19 1990-03-23 Seiko Epson Corp Manufacture of thin film transistor
JPH04186735A (en) * 1990-11-20 1992-07-03 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPH04206837A (en) * 1990-11-30 1992-07-28 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
WO1993019022A1 (en) * 1992-03-25 1993-09-30 Kanegafuchi Chemical Industry Co., Ltd. Thin polysilicon film and production thereof
US5517037A (en) * 1992-03-25 1996-05-14 Kanegafuchi Chemical Industry Co., Ltd. Polysilicon thin film with a particulate product of SiOx
US5739043A (en) * 1992-03-25 1998-04-14 Kanegafuchi Chemical Industry Co., Ltd. Method for producing a substrate having crystalline silicon nuclei for forming a polysilicon thin film

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