JPS5892296A - Thick film integrated circuit device - Google Patents

Thick film integrated circuit device

Info

Publication number
JPS5892296A
JPS5892296A JP19159681A JP19159681A JPS5892296A JP S5892296 A JPS5892296 A JP S5892296A JP 19159681 A JP19159681 A JP 19159681A JP 19159681 A JP19159681 A JP 19159681A JP S5892296 A JPS5892296 A JP S5892296A
Authority
JP
Japan
Prior art keywords
integrated circuit
thick film
film integrated
film
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19159681A
Other languages
Japanese (ja)
Inventor
稔 田中
在田 義雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyowa Electronic Instruments Co Ltd
Original Assignee
Kyowa Electronic Instruments Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyowa Electronic Instruments Co Ltd filed Critical Kyowa Electronic Instruments Co Ltd
Priority to JP19159681A priority Critical patent/JPS5892296A/en
Publication of JPS5892296A publication Critical patent/JPS5892296A/en
Pending legal-status Critical Current

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  • Combinations Of Printed Boards (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は、厚膜集積回路装置に関するものであり、特に
装置の内部回路同士の間および装置内部と外部との間を
確実に静電シールドしてなり、製造工程が多くなく、し
かも高集積度の新規な厚膜集積回路装置を提供しようと
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thick film integrated circuit device, and in particular, it provides electrostatic shielding between the internal circuits of the device and between the inside and outside of the device, thereby speeding up the manufacturing process. The present invention aims to provide a novel thick film integrated circuit device which is not so large and has a high degree of integration.

混成集積回路装置は、セラミック基板上に配線膜、受動
素子構成膜等を形成し、その配線膜、受動素子膜にトラ
ンジスタチップ、集積回路チップ等をボンディングして
な・るものであり、種々の電子機器等に用いられる。
A hybrid integrated circuit device is a device in which a wiring film, a passive element structure film, etc. are formed on a ceramic substrate, and a transistor chip, an integrated circuit chip, etc. are bonded to the wiring film and passive element film. Used in electronic equipment, etc.

ところで、混成集積回路装置に高利得増幅回路、高周波
回路等がある場合、発振防止等のため静電シールドをす
ることが必要となる。そのような場合は従来においては
、混成集積回路装置をシールドケース内に設けるように
したり、あるいは混成集積回路装置の適宜な位置にシー
ルド板を設けたりしていた。
By the way, when a hybrid integrated circuit device includes a high gain amplifier circuit, a high frequency circuit, etc., it is necessary to provide an electrostatic shield to prevent oscillation. In such cases, conventionally, the hybrid integrated circuit device has been provided within a shield case, or a shield plate has been provided at an appropriate position of the hybrid integrated circuit device.

また、混成集積回路装置の基板の裏面にアルミニウム、
ステンレス等からなる金属筐体を固着し、これをシール
ド用接地電極とすることも試もみられた。
In addition, aluminum and
Attempts have also been made to fix a metal case made of stainless steel or the like and use this as a shielding ground electrode.

しかしながら、これらの混成集積回路装置は静電シール
ドするためにシールド板等の比較的重く且つ嵩張る部材
を必要とし2更に、実際に混成集積回路装置を電子機器
に組み込む場合に工数を要する。特に、厚膜集積回路装
置の基板裏面に金属筐体を固着してなるものは装置の製
造工程が比較的多くなるという問題があった。
However, these hybrid integrated circuit devices require a relatively heavy and bulky member such as a shield plate for electrostatic shielding2, and furthermore, it takes many man-hours to actually incorporate the hybrid integrated circuit device into electronic equipment. In particular, thick film integrated circuit devices in which a metal casing is fixed to the back surface of a substrate have a problem in that the number of manufacturing steps is relatively large.

本発明は、このような事情に鑑みなされたもので、装置
の内部回路同士の間および装置内部と外部との間を確実
に静電シールドしてなり、製造工数が徒らに多くなく、
しかも高集積度の新規な厚膜集積回路装置を提供するこ
とを目的としている。
The present invention has been developed in view of the above circumstances, and it provides electrostatic shielding between the internal circuits of the device and between the inside and outside of the device, thereby reducing the number of manufacturing steps.
Furthermore, it is an object of the present invention to provide a novel thick film integrated circuit device with a high degree of integration.

この目的は、絶縁基板の一方の主面上に配線導体膜、受
動素子構成膜およびこれらの膜に接続された電気部品か
らなる電子回路を構成し他方の主面上に静電シールド用
導体膜を形成した複数の厚膜集積回路板の周縁ないしは
内側に、導体膜か(なる凹状ないしはスルーホール状の
連結線接続部を複数個ずつ形成し、複数個の厚膜集積回
路板を各回路板に設けられた前記各連結線接続部同士の
位置が互いに整合されるように重ね合わせ、互いに整合
された連結線接続部同士をそれぞれに半田付された1つ
の導電性連結線によって連結してなり、上記連結線の少
なくとも1本を、各厚膜集積回路の静電シールド用導体
膜と電気的に接続せしめてなることにより達成できる。
The purpose of this is to construct an electronic circuit consisting of a wiring conductor film, a passive element constituent film, and electrical components connected to these films on one main surface of the insulating substrate, and a conductor film for electrostatic shielding on the other main surface. A plurality of concave or through-hole connecting wire connections are formed on the periphery or inside of the plurality of thick film integrated circuit boards formed with a conductor film, and the plurality of thick film integrated circuit boards are The connection line connection parts provided in the above are overlapped so that the positions thereof are aligned with each other, and the mutually aligned connection line connection parts are connected by one conductive connection line soldered to each one. This can be achieved by electrically connecting at least one of the connecting wires to the electrostatic shielding conductive film of each thick film integrated circuit.

以下、本発明を添付図面に示した実施例に従って詳細に
説明する。
Hereinafter, the present invention will be described in detail according to embodiments shown in the accompanying drawings.

第1図乃至第3図は、本発明の一実施例の構成を示すも
のであり、図において、1,1・・・・・・は厚膜集積
回路板であり、それぞれ円板状の例えばセラミック基板
等からなる絶縁基板2の一方の主面(表面)に配線導体
膜3,3・・・・・・、および抵抗構成膜4.コンデン
サ電極構成膜5.コンデンサ誘電体構成膜6等の受動素
子構成膜を形成し、絶縁基板2の他方の主面(裏面)に
メツシュ状の静電シールド用導体膜7を形成してなるも
のである。
1 to 3 show the structure of an embodiment of the present invention. In the figures, 1, 1, . . . are thick film integrated circuit boards, each of which has a disk shape, On one main surface (front surface) of an insulating substrate 2 made of a ceramic substrate or the like, wiring conductor films 3, 3, . Capacitor electrode constituent film 5. A passive element constituent film such as a capacitor dielectric constituent film 6 is formed, and a mesh-shaped electrostatic shielding conductive film 7 is formed on the other main surface (back surface) of the insulating substrate 2.

8.8・・・・・・は各厚膜集積回路板1,1・・・・
・・の周縁に例えば、等間隔をおいて設けられた連結線
接続部で、絶縁基板2,2・・・・・・の周縁に弧状の
切欠9゜9 ・・・を形成し、該切欠9,9・・・・・
・の上下両周縁に前記導体膜3,3・・・・・・と同質
の導体膜10 、10・・・・・・を形成し、更にその
切欠面に上下の導体膜10゜10同士を接続する側面導
体膜11 、11・・・・・・を形成する”ことによっ
て設けることができる。
8.8... are each thick film integrated circuit board 1, 1...
For example, an arc-shaped notch 9°9 is formed on the periphery of the insulating substrates 2, 2, . 9,9...
Conductor films 10, 10, . . . , of the same quality as the conductor films 3, 3, . This can be provided by forming connecting side conductor films 11, 11, . . . .

12 、12・・・・・・は、厚膜集積回路板1,1.
1の配線導体膜3,3・・・・・・に半田付されたコン
デンサチップ、13 、13・・・・・・は厚膜集積回
路板1.1・・・・・・の配線導体膜3,3にボンディ
ングされた集積回路チップで、その各電極はコ1ネクタ
線14 、14・・・・・・を介して配線導体膜3,3
・・・・・・に接続されており、そしてチップ表面およ
び線接続部上は適宜な絶縁性材料で保護されている。1
5はトランジスタで、そのリード線16 、16・・・
・・・は配線導体膜3,3・・・・・・に半田付されて
いる。17 、17・・・・・は、金属からな  □る
連結線であり、これによって、上記厚膜集積回路板が互
いにある間隔をおいて重ね台わされた状態に保たれてい
る。すなわち、集積回路板1,1・・・・・の周縁に設
けられた各連結線接続部8,8・・・・・・が他の各集
積回路板1.1・・・・・・の周縁に設けられた各連結
線接続部8,8・・・・・・と整合するように全部の厚
膜集積回路板1,1・・・・・を互いにある間隔をおい
て重ね合わぜ、その状態で、互いに整合された複数個(
厚膜集積回路板1の数と同数)の連結線接続部8,8・
・・−・・に一つの連結線を添わせ、該連結線17と各
連結線接続部8,8・・・・・・とを互いに必要に応じ
半田付することを順次繰返すことによって厚膜集積回路
を形成してなる。18は、半田を示す。そして、複数個
の厚膜集積回路板1,1・・・・・同士を互いに連結す
る複数の連結線17 、17・・・・・・のうちの一部
は、各集積回路板1,1・・・・・・の裏面に設けられ
た静電シールド用導体膜7,7・ ・と電気的に接続さ
れ且つ接地されている。なお、連結線17 、17・・
、・・・のうちのある一部は、単に厚膜集積回路板1.
1 ・・同士を機械的如連結するにすぎないものとして
利用されているが、他の一部は異なる厚膜集積回路板1
,1・・・・・・の回路同士を互いに電気的に連結する
配線としても利用されている。
12, 12... are thick film integrated circuit boards 1, 1 .
Capacitor chips soldered to wiring conductor films 3, 3, . . . 1, 13, 13, . . . are wiring conductor films of thick film integrated circuit board 1.1. 3, 3, each electrode is connected to the wiring conductor film 3, 3 via the connector wire 14, 14...
..., and the chip surface and the wire connection portion are protected with an appropriate insulating material. 1
5 is a transistor, and its lead wires 16, 16...
. . are soldered to the wiring conductor films 3, 3, . . . . Reference numerals 17, 17, . . . are connection lines made of metal, which keep the thick film integrated circuit boards stacked one on top of the other with a certain distance between them. That is, each connecting line connecting portion 8, 8, . . . provided on the periphery of the integrated circuit boards 1, 1, . Lay all the thick film integrated circuit boards 1, 1... on top of each other at a certain distance so as to align with each connection line connecting portion 8, 8... provided on the periphery, and then In the state, multiple pieces aligned with each other (
(same number as the number of thick film integrated circuit boards 1) connection line connection parts 8, 8.
. . . by attaching one connecting wire to the connecting wire 17 and soldering the connecting wire connecting portions 8, 8, . . . to each other as necessary. It is formed by forming an integrated circuit. 18 indicates solder. A part of the plurality of connection lines 17, 17, . . . , which connect the plurality of thick film integrated circuit boards 1, 1, . It is electrically connected to the electrostatic shielding conductor films 7, 7, . . . provided on the back surfaces of . In addition, connecting lines 17, 17...
, . . . are simply thick film integrated circuit boards 1.
1...Thick film integrated circuit board 1 is used as nothing more than a mechanical connection between the two, but some of the other parts are different.
, 1, . . . are also used as wiring to electrically connect circuits.

以上詳述したように1本発明に係る厚膜集積回路装置は
、絶縁基板の一方の主面上に配線導体膜、受動素子構成
膜およびこれらの膜に接続された電気部品からなる電子
回路を構成し他方の主面上に静電ンールド用導体膜を形
成した複数の厚膜集積回路板の周縁ないしは内側に、導
体膜からなる凹状ないしはスルーホール状の連結線接続
部を複数個ずつ形成し、複数個の回路板を各回路板に設
けられた前記各連結線接続部同士の位置が互いに整合さ
れるように重ね合わせ、互いに整合された連結線接続部
同士をそれぞれに半田付された1つの導電性連結線によ
って連結してなり、I−記述結線の少なくとも1本を各
厚膜集積回路の静電シールド用導体膜と電気的に接続し
てなるものであるから、各回路板の裏面(主面)に設け
られた静電シールド用導体膜によって、各回路板内の電
子回路をそれぞれ他の回路板の電子回路および厚膜集積
回路装置外部の電子回路から静電シールドすることがで
きる。従って、発振、電波障害等を生じないようにする
ことができる。
As detailed above, the thick film integrated circuit device according to the present invention has an electronic circuit comprising a wiring conductor film, a passive element constituent film, and electrical components connected to these films on one main surface of an insulating substrate. A plurality of concave or through hole-shaped connection line connection portions made of a conductive film are formed on the periphery or inside of a plurality of thick film integrated circuit boards each having a conductive film for electrostatic rolling formed on the other main surface. , a plurality of circuit boards are stacked so that the positions of the connecting line connecting parts provided on each circuit board are aligned with each other, and the aligned connecting line connecting parts are soldered to each other. At least one of the I-description connections is electrically connected to the electrostatic shielding conductor film of each thick film integrated circuit, so The electrostatic shielding conductor film provided on the (main surface) can electrostatically shield the electronic circuits on each circuit board from the electronic circuits on other circuit boards and the electronic circuits outside the thick film integrated circuit device. . Therefore, it is possible to prevent oscillation, radio interference, etc. from occurring.

また、本発明に係る厚膜集積回路装置によれば、従来の
ように厚膜集積回路板にそれと別体の静電シールド用部
材を取付けることによって静電シールドを行なうのでは
なく、厚膜集積回路板を形成する過程で裏面に一体的に
形成された静電ンールド用導体膜によって静電シールド
を行なうので、静電シールドをするために厚膜集積回路
装置自体の製造工数が徒に増大したり、あるいは厚膜集
積回路装置の電子機器への組込みに要する工数が増大し
たりすることを回避することができる。
Further, according to the thick film integrated circuit device of the present invention, instead of providing electrostatic shielding by attaching a separate electrostatic shielding member to the thick film integrated circuit board as in the past, the thick film integrated circuit During the process of forming the circuit board, electrostatic shielding is performed using a conductor film for electrostatic rolling that is integrally formed on the back surface, so the number of man-hours required to manufacture the thick film integrated circuit device itself increases unnecessarily to provide electrostatic shielding. It is possible to avoid an increase in the number of man-hours required for incorporating the thick film integrated circuit device into electronic equipment.

更にまた、本発明によれば、本来的に回路の集積密度の
高い複数の厚膜集積回路板を更に互いに重ね合わせるよ
うにしたので、厚膜集積回路装置の回路の集積度を著し
く向上させることができる。
Furthermore, according to the present invention, a plurality of thick film integrated circuit boards, which inherently have high circuit integration density, are further stacked on top of each other, so that the degree of circuit integration of the thick film integrated circuit device can be significantly improved. Can be done.

なお、本発明は、上述した実施例に何ら限定されるもの
ではなく、種々の態様での変形実施が可能である。
Note that the present invention is not limited to the embodiments described above, and can be modified in various ways.

例えば、上述の実施例においては、各連結線接続部8.
8・・・・・・は、厚膜集積回路板1.1・・・・・・
の周縁を凹状に切欠くようにしてなるものであるが、厚
膜集積回路板1,1・・・・・・内側にスルーホールを
形成し、該スルーホール内面および上下両周縁部に導体
膜を形成することによって設けるようにしてもよい。
For example, in the embodiment described above, each connecting line connection portion 8.
8... is a thick film integrated circuit board 1.1...
A through hole is formed inside the thick film integrated circuit board 1, 1, and a conductive film is formed on the inner surface of the through hole and on both upper and lower peripheral edges. It may be provided by forming a.

また、上記実施例においては、静電シールド用導体膜7
は、そのパターンがメツシュ状にされているが、厚膜集
積回路板1,1・・・・・・の裏面の殆んどを覆うよう
に形成してもよい。但し、メツシュ状にした方が導体膜
の材料が少なくて済み、その公経済的であり、しかも静
電シールド効果は、低下しないので、メツシュ状にした
方がより好ましいといえる。
Further, in the above embodiment, the electrostatic shielding conductor film 7
Although the pattern is in the form of a mesh, it may be formed so as to cover most of the back surfaces of the thick film integrated circuit boards 1, 1, . . . . However, the mesh shape is more preferable because it requires less material for the conductor film, is more economical, and does not reduce the electrostatic shielding effect.

更にまた、上述した実施例においては、各厚膜集積回路
板1,1・・・・・・が円形であるが、必ずしもそのよ
うにする必要はなく、例えば、矩形状にしてもよいこと
は勿論である。
Furthermore, in the above-described embodiment, each thick film integrated circuit board 1, 1, . . . is circular, but it does not necessarily have to be so. Of course.

【図面の簡単な説明】[Brief explanation of drawings]

図面は、いずれも厚膜集積回路装置の一実施例の構成を
示すもので、第1図は縦断面図、第2図は底面図、第3
図は斜視図である。 l・・・・・・厚膜集積回路板、  2・・・・・・絶
縁基板、3・・・・・・配線導体膜、 j、 5 、6
・・・・・・受動素子構成膜、 7・・・・・静電シー
ルド用導体膜、8・・ゾ・連結線接続部、  9・・・
・・切欠、10 、11・・・・・・導体膜、 12 
、13 、15・・・・・電子部品、17・・・・・・
連結線、 秦 l 図 第 3 図
The drawings all show the configuration of an embodiment of a thick film integrated circuit device, with FIG. 1 being a vertical sectional view, FIG. 2 being a bottom view, and FIG.
The figure is a perspective view. l... Thick film integrated circuit board, 2... Insulating substrate, 3... Wiring conductor film, j, 5, 6
... Passive element constituent film, 7 ... Conductor film for electrostatic shielding, 8 ... Connection line connection part, 9 ...
...Notch, 10, 11... Conductor film, 12
, 13 , 15...Electronic parts, 17...
Connecting line, Qin l Figure 3

Claims (2)

【特許請求の範囲】[Claims] (1)絶縁基板の一方の主面上に配線導体膜、受動素子
構成膜およびこれらの膜に接続された電気部品からなる
電子回路を構成し他方の主面上に静電シールド用導体膜
を形成した複数の厚膜集積回路板の周縁ないしは内側に
、導体膜からなる凹状ないしはスルーホール状の連結線
接続部を複数個ずつ形成し、複数個の厚膜集積回路板を
各回路板に設けられた前記各連結線接続部同士の位置が
互いに整合されるように重ね合わせ、互いに整合された
連結線接続部同士をそれぞれに半田付された1つの導電
性連結線によって連結してなり、上記連結線の少なくと
も1本を各厚膜集積回路の静電シールド用導体膜と電気
的に接続せしめてなることを特徴とする厚膜集積回路装
置。
(1) An electronic circuit consisting of a wiring conductor film, a passive element constituent film, and electrical components connected to these films is formed on one main surface of an insulating substrate, and a conductor film for electrostatic shielding is formed on the other main surface. A plurality of concave or through-hole connecting wire connection portions made of a conductive film are formed on the periphery or inside of the plurality of thick film integrated circuit boards formed, and a plurality of thick film integrated circuit boards are provided on each circuit board. The above-mentioned connecting wire connecting portions are overlapped so that the positions of the connecting wire connecting portions are aligned with each other, and the mutually aligned connecting wire connecting portions are connected by one conductive connecting wire soldered to each one, and the above-mentioned A thick film integrated circuit device characterized in that at least one of the connecting wires is electrically connected to a conductor film for electrostatic shielding of each thick film integrated circuit.
(2)静電シールド用導体膜がメツシュ状のパターンを
有していることを特徴とする特許請求の範囲第1項記載
の厚膜集積回路装置。
(2) The thick film integrated circuit device according to claim 1, wherein the electrostatic shielding conductive film has a mesh-like pattern.
JP19159681A 1981-11-28 1981-11-28 Thick film integrated circuit device Pending JPS5892296A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19159681A JPS5892296A (en) 1981-11-28 1981-11-28 Thick film integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19159681A JPS5892296A (en) 1981-11-28 1981-11-28 Thick film integrated circuit device

Publications (1)

Publication Number Publication Date
JPS5892296A true JPS5892296A (en) 1983-06-01

Family

ID=16277262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19159681A Pending JPS5892296A (en) 1981-11-28 1981-11-28 Thick film integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5892296A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5529274U (en) * 1978-08-17 1980-02-26

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5529274U (en) * 1978-08-17 1980-02-26

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