JPS5890224A - Electronic device - Google Patents

Electronic device

Info

Publication number
JPS5890224A
JPS5890224A JP56188107A JP18810781A JPS5890224A JP S5890224 A JPS5890224 A JP S5890224A JP 56188107 A JP56188107 A JP 56188107A JP 18810781 A JP18810781 A JP 18810781A JP S5890224 A JPS5890224 A JP S5890224A
Authority
JP
Japan
Prior art keywords
power
power supply
back panel
electronic circuit
connector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56188107A
Other languages
Japanese (ja)
Other versions
JPS62527B2 (en
Inventor
Tsukasa Mizuno
司 水野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56188107A priority Critical patent/JPS5890224A/en
Publication of JPS5890224A publication Critical patent/JPS5890224A/en
Publication of JPS62527B2 publication Critical patent/JPS62527B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)

Abstract

PURPOSE:To reduce the power loss and the generation of heat, by setting symmetrically electric circuit package and a power supply device on the basis of the surface of a back panel and then supplying the electric power to the electric circuit package from the power device via a connector of the back panel. CONSTITUTION:The plural pairs of electronic circuit packages 1 and power supply devices 3 are set symmetrically on the basis of the surface of a back panel 2. These packages 1 and devices 3 are connected to each other via the connector 8 provided on the panel 2. Thus the electric power is supplied to each package 1. For connection via the connector 8, a socket 9 is fixed to the panel 2 and the device 3 is connected to the package 1 via a pin 10. In this case, the socket 9 is connected to the power supply layer or a ground layer of the panel 2. As a result, the impedance of the feeding route can be kept low to reduce the power loss and the generation of heat.

Description

【発明の詳細な説明】 本発明は電子回路パッケージへの電力供給構造を有する
電子計算機や通信装置等の電子装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic device such as an electronic computer or a communication device having a structure for supplying power to an electronic circuit package.

第1図を参照すると、従来の電子計算機等の電子装置で
は、バックパネル2に電子回路パッケージ1を複数枚搭
載して形成される電子回路部と、該電子回路部が必要と
する夛電力を供給する電源部3とが分離して配置され構
成されている。この構成において、電源部3から電子回
路部への給電は、電源部3とバック・パネル2とが接続
される電源ケーブル4、バックパネル2の電源層、グラ
ンド層および多極コネクタ6および7を介して行われて
いる。
Referring to FIG. 1, in a conventional electronic device such as an electronic computer, there is an electronic circuit section formed by mounting a plurality of electronic circuit packages 1 on a back panel 2, and the electric power required by the electronic circuit section. The power supply unit 3 for supplying the power supply unit 3 is arranged and configured separately. In this configuration, power is supplied from the power supply section 3 to the electronic circuit section through the power cable 4 to which the power supply section 3 and the back panel 2 are connected, the power supply layer and ground layer of the back panel 2, and the multi-pole connectors 6 and 7. It is done through.

近年、電子回路部品の高集積化および高速化にともない
、電子回路パッケージの高密度実装化が図られ、電子回
路パッケージ1枚当りの電力が増大してきたため低電圧
でかつ大電流の電源を供給する必要が生じつつある。ま
た、装置性能の向上にともない、電子回路パッケージ間
の配線長を短縮するために、電子回路部全体をコンパク
トに実装する必要がある。しかし、上述の従来実装構造
では電源部と電子回路部とが分離して実装されているた
め、前述給電経路での電力損失が天性く、電圧降下も大
きくなシ、この結果、回路機能に支障をきたす。これを
防ぐには、?tT、 n+:iケーブル等の断面積の噌
大数の増加:I?よびバックパネルの電源層グランド層
の層数の増加等の大規模な給電系の補強を行う心安があ
る。址だ+IJ Nt養げ、力1貫失は熱となるため冷
却部品5の冷却能力を電子回路部品の発熱を取シ除くよ
う111シカ以−にに増強せねばならない。従来実装構
造けこれらの袖強、増強を行わねばならず、実捧密1u
二向」−がさ寸たけられるという欠点がある。
In recent years, as electronic circuit components have become more highly integrated and faster, electronic circuit packages have become more densely packaged, and the power per electronic circuit package has increased, making it necessary to supply power at low voltage and high current. A need is emerging. Furthermore, as device performance improves, it is necessary to mount the entire electronic circuit section in a compact manner in order to shorten the wiring length between electronic circuit packages. However, in the conventional mounting structure described above, the power supply section and the electronic circuit section are mounted separately, so there is a natural power loss in the aforementioned power supply path, and the voltage drop is also large.As a result, the circuit function is hindered. cause How to prevent this? tT, n+: Increase in cross-sectional area of i cable, etc.: I? It is also safe to carry out large-scale reinforcement of the power supply system, such as increasing the number of layers in the power supply layer and ground layer of the back panel. Since one loss of force becomes heat, the cooling capacity of the cooling component 5 must be increased to more than 111 in order to remove the heat generated by the electronic circuit components. Conventional mounting structure had to be strengthened and strengthened, and the actual implementation was difficult.
It has the disadvantage that the ``two-muka'' part is exposed.

本考案の]」的は」二連の欠点をiVr決した電子装置
を提供することにある。
The object of the present invention is to provide an electronic device that overcomes two drawbacks.

本発明の装置は、複数の′「「子回路パッケージを搭載
したバックパネルをイイする111;子装置において、
Allll子電子回路パッケージ1℃源、Wluとを前
記バックパネル而を対称面として面対称位置に配置しM
I記バックパネル−にに設けたコネクタを介して前記1
1を源装置から前記)゛[℃子回路パッケージに電力を
供給するようにしたことを”r−1F徴々する。
The device of the present invention has a plurality of ``back panels equipped with slave circuit packages.
All child electronic circuit packages are arranged at 1° C. source and Wlu in plane symmetrical positions with the back panel as a plane of symmetry.
I above 1 through the connector provided on the back panel.
1 to supply power from the source device to the child circuit package described above.

次に本発明について(ツ1を参照して詳細に説明する。Next, the present invention will be explained in detail with reference to Section 1.

第2図を参照すると、本発明の一実施例は、バックパネ
ル2を対称面とし、電子回路パッケージ1と電源装置3
とを複数組、面対称に配置し、バックパネル2上に設け
たパワーコネクタ8で両者を接続し各電子回路パッケー
ジ1に電力を供給するよう構成されている。
Referring to FIG. 2, one embodiment of the present invention has a back panel 2 as a symmetrical plane, an electronic circuit package 1 and a power supply device 3.
A plurality of sets of electronic circuit packages 1 are arranged symmetrically in a plane, and a power connector 8 provided on the back panel 2 connects the two to supply power to each electronic circuit package 1.

パワーコネクタによる接続部分の拡大図を示す第3図を
参照すると、ソケット9がバックパネル2に固定されピ
ン10を介して電源装置3と電子回路パッケージ1とが
接続されている。第3図に示す実施例では、電源装置か
ら電子回路パッケージに直接給電したが、この時ソケッ
ト9をバックパネルの電源層、凍たけグランド層にスル
ーホールを介して接続しておくと給電系路のインピーダ
ンスを低く保つことができ電気的に非常に効果がある。
Referring to FIG. 3, which is an enlarged view of the connecting portion by the power connector, a socket 9 is fixed to the back panel 2, and the power supply device 3 and the electronic circuit package 1 are connected through pins 10. In the embodiment shown in Fig. 3, power is supplied directly from the power supply device to the electronic circuit package, but at this time, if the socket 9 is connected to the power supply layer of the back panel and the frozen ground layer via a through hole, the power supply system will be connected. It is very effective electrically as it can keep the impedance low.

第4図を参照すると、電子回路パッケージ1の多極コネ
クタ6と、バックパネル2の多極コネクタ7とによυ電
気的接続がなされ、特に電源についてはパワーコネクタ
8を介して接続がなされる。この接続構成に、さらに、
第3図で示したソケット9をバックパネルの電源層、廿
たはグランド層に1妾絖して、1′?けげ、多極コネク
タ6および7を介してもm;源の供給ができ、71L源
系のインピーダンスの低MU J=よびノイズ防止のた
めにも効果がある。捷たパッケージ間に布線の必装のあ
る場合は上記多(執コネクタ7のピンを用い電源装置側
で行うことができる。
Referring to FIG. 4, electrical connections are made between the multi-pole connector 6 of the electronic circuit package 1 and the multi-pole connector 7 of the back panel 2, and in particular, the power supply is connected via the power connector 8. . In addition to this connection configuration,
Connect the socket 9 shown in Figure 3 to the power supply layer, ground layer or ground layer of the back panel. However, the power source can also be supplied through the multi-pole connectors 6 and 7, which is effective in reducing the impedance of the 71L source system and preventing noise. If it is necessary to wire between the separated packages, it can be done on the power supply side using the pins of the connector 7 mentioned above.

」二連の実装構造をとることにより、?1を子回路部と
電源部を接近させて配置16′することができるため従
来*装構造による欠点(社):解決される。すなわち、
′電源ケーブルはたは′fに源ノ(ス・バー)等、バッ
クパネルのT電源層およびグランド層を使用せずに給電
を行うため従米実裟構造による電力1′i−4失、発熱
は除却され、1托圧降下も小さく押えることができる。
” By taking a two-part implementation structure? 1, the slave circuit section and the power supply section can be arranged 16' close to each other, which solves the disadvantages of the conventional mounting structure. That is,
Because power is supplied without using the T power layer and ground layer of the back panel, such as a power source cable or a source bar, the power is lost due to the conventional structure, and heat is generated. is eliminated, and the pressure drop per tube can be kept small.

この結果、給電系、冷却部品の補強は不要となり実装密
度を向」ニさせることがでへる。
As a result, there is no need to reinforce the power supply system and cooling components, making it possible to improve packaging density.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の実装構成例を示す図、第2図は本発明の
一実施例を示す図、第31ν1け第2図の5− A−A’ 断面のパワーコネクタ部分を示す図および第
4図は第2図の電子回路パッケージ1とバックパネル2
の接続部とを示す斜視図である。 第1図から第4図において、■・・・・・・電子回路パ
ッケージ、2・・・・・・バック・パネル、3・・・・
・・電源装置、4・・・・・・電源ケーブル、5・・・
・・・冷却部品、6・・・・・・多極コネクタ、7・・
・・・・多極コネクタ、8・・・・・・パワーコネクタ
、9・・・・・・ソケット、10・・・・・・ピン、1
1・・・・・・筐体。 6−
FIG. 1 is a diagram showing an example of a conventional mounting configuration, FIG. 2 is a diagram showing an embodiment of the present invention, and FIG. Figure 4 shows the electronic circuit package 1 and back panel 2 shown in Figure 2.
FIG. In Figures 1 to 4, ■... Electronic circuit package, 2... Back panel, 3...
...Power supply device, 4...Power cable, 5...
...Cooling parts, 6...Multi-pole connector, 7...
...Multi-pole connector, 8...Power connector, 9...Socket, 10...Pin, 1
1... Housing. 6-

Claims (1)

【特許請求の範囲】 複数の電子回路パッケージを搭載したバックパネルを有
する電子装置において、 前記電子回路パッケージと電源装置とを前記バックパネ
ル面を対称面として面対称位置に配置し前記バックパネ
ル上に設けたコネクタを介して前記電源装置から前記電
子回路パッケージの各々に電力を供給するようにしたこ
とを特徴とする電子装置。
[Claims] In an electronic device having a back panel on which a plurality of electronic circuit packages are mounted, the electronic circuit packages and the power supply device are disposed in plane-symmetrical positions with the back panel surface as a plane of symmetry, and the electronic circuit packages and the power supply device are arranged on the back panel. An electronic device characterized in that power is supplied from the power supply device to each of the electronic circuit packages through a provided connector.
JP56188107A 1981-11-24 1981-11-24 Electronic device Granted JPS5890224A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56188107A JPS5890224A (en) 1981-11-24 1981-11-24 Electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56188107A JPS5890224A (en) 1981-11-24 1981-11-24 Electronic device

Publications (2)

Publication Number Publication Date
JPS5890224A true JPS5890224A (en) 1983-05-28
JPS62527B2 JPS62527B2 (en) 1987-01-08

Family

ID=16217820

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56188107A Granted JPS5890224A (en) 1981-11-24 1981-11-24 Electronic device

Country Status (1)

Country Link
JP (1) JPS5890224A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0242970A2 (en) * 1986-04-18 1987-10-28 Tandem Computers Incorporated Fault tolerant modular computing system
EP0357362A2 (en) * 1988-09-02 1990-03-07 Ncr Corporation Housing for electronic components
CN108323077A (en) * 2018-04-03 2018-07-24 苏州风中智能科技有限公司 A kind of protective base of electronic component

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0242970A2 (en) * 1986-04-18 1987-10-28 Tandem Computers Incorporated Fault tolerant modular computing system
EP0357362A2 (en) * 1988-09-02 1990-03-07 Ncr Corporation Housing for electronic components
CN108323077A (en) * 2018-04-03 2018-07-24 苏州风中智能科技有限公司 A kind of protective base of electronic component

Also Published As

Publication number Publication date
JPS62527B2 (en) 1987-01-08

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