JPS5879719A - Method for doping impurity into semiconductor crystal - Google Patents

Abstract

PURPOSE:To permit doping of impurities with high accurate alignment by a method wherein two kinds of mask members are formed one above another and the lower mask member is made smaller than the upper mask member through etching. CONSTITUTION:A Ti layer 3 and a photoresist 4 are formed on a conductive- type region 2 formed on a semiconductor crystal 1, and the photoresist 4 is exposed and developed to form an upper mask member 6. Then, the Ti layer 3 is etched with the upper mask member 6 being as a mask, so as to attain a lower mask member 5. A this time, the lower mask member 5 is made to have the reduced size at a certain ratio through side etching. When doping desired impurities 7, 8 into the semiconductor crystals 1, 2, an impurity doped region 7 is first formed with the upper mask member 6 being as a mask. Then, after removing the mask member 6, an impurity doped region 8 is formed with the lower mask member 5 being as a mask. By so doing, it becomes possible to control the gap between the regions 7 and 2 with high accuracy.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in techniques for doping crystals with impurities to make semiconductor devices.

In the manufacture of diodes, transistors, and integrated circuits, the most basic and important technique is to selectively dope a predetermined region of a semiconductor crystal with a predetermined impurity by diffusion or ion implantation. Regarding the technique of doping impurities only in a predetermined region, the most common method for ion implantation is to wetly apply a photoresist, provide a photoresist window in a predetermined region, and perform ion implantation through this window. For diffusion, 5in2°5iBN4 or the like is usually used as a mask material. In any case, the doping mask must have windows opened at precisely predetermined locations. In recent years, there has been an increasingly strong demand for improved high-frequency characteristics and increased integration of semiconductor devices, but to meet these demands, it is necessary to reduce the brightness of the devices, and for this reason, impurity doping is required. There is a strong demand for highly accurate positioning in even smaller areas.

However, in the conventional method, as illustrated in FIG.
′ is formed, further regions 7′ and 7#
In order to dope desired impurities into the semiconductor device, a manufacturing method is adopted in which a photoresist 6 is formed and ions are implanted using this as a mask. For this reason, how accurately doping can be done in a predetermined area is determined by the alignment accuracy when transferring the photomask pattern to the photoresist pattern 6, but as long as conventional exposure equipment is used, the limit is ±1 μm. Unfortunately, it was difficult to obtain greater precision.

The present invention aims to improve upon these drawbacks of the conventional method, and aims to perform impurity doping with highly accurate positioning of ±1 tzm or less.

The present invention will be explained below.

The present invention provides two
When more than one mask material is layered and the upper mask pattern is used as a mask and the lower mask material is etched, the lower mask material has a predetermined size larger than the upper mask pattern. This method takes advantage of the fact that it is etched to become smaller at a reduction rate. That is, by performing ion implantation with the upper mask pattern in place and then performing ion implantation using the lower mask pattern, the initial ion implantation position and subsequent ion implantation position can be adjusted to predetermined positions. It is something to keep in mind.

The present invention will be explained in detail below using the figures.

In FIG. 2, l is a semiconductor crystal such as semi-insulating GaA
The s-crystal substrate 2 is a region of one conductivity type, for example, an n-type GaAs epitaxial layer, formed in advance on one main surface of the crystal substrate l. First, a Ti layer 3 is formed on the crystal surface by vapor deposition. A photoresist 4 is applied on top of the photoresist. After that, as shown in FIG. 8, the photoresist 6 is exposed and developed using a conventional method to leave the photoresist 6 only in a predetermined area. Using this photoresist as a mask, the Ti layer 8 is etched, and only the lower part of the resist 6 is etched. ni 5 no like (Ti
remain. At this time, Ti 5 is removed by side etching.
A smaller size than that of the upper layer resist 6 can be obtained.

As shown in FIG. 4, a desired impurity such as Si is selectively doped into the semiconductor crystal by ion implantation using the resist 6 as a mask to form an n+ region 7.

Next, as shown in FIG. 5, the resist 6 is removed and the Ti
Using layer 5 as a mask, desired impurities such as Si are selectively ion-implanted.

In the illustrated example, the second ion implantation is performed deeper than the first ion implantation, that is, with high energy and with a lower doping amount than the first ion implantation. This is an example of obtaining a structure in which eight deep n-type regions are interposed between seven n+ regions. Here, the interval between 7 and 2 is determined by the pattern size difference between resist 6 and Ti5, that is, the amount of pattern reduction due to side etching.
For example, since high-precision etching is possible using plasma etching, the amount of side etching can be reduced to ±1 μm.
Therefore, the spacing between 7 and 2 can be controlled with high precision.

The present invention can be modified and applied in various ways other than the above examples. For example, for Ti in 3 and 5, other metals that can be etched with high precision such as Mo and Ta, or insulators such as 5 in 2 can also be used. Further, the impurity to be doped is not limited to Si, and any n-type or p-type impurity can be used. Furthermore, since the essence of the present invention is to use the difference in pattern size between 5 and 6, during the second implantation, ions are implanted diagonally without removing 6, and substantially only 5 is implanted. The object of the present invention can also be achieved by having the mask serve as a human mask. Moreover, the crystal is not limited to GaAs, but can also be Si.

Any material such as Ge or InP can be used.

Doping is not limited to twice, but can be done twice or more.

As described above, according to the present invention, in a double mask, when etching is performed using the upper mask pattern, a mask pattern smaller in a certain ratio than the lower mask pattern is created on the lower side, so that extremely high precision alignment can be achieved. Doping with impurities becomes possible.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a conventional method, and FIGS. 2 to 5 are process diagrams showing an embodiment of the present invention. l ...... Semiconductor crystal substrate 2.2'
......-Conductivity type region 8#5...
・・・・・・Second mask material 4.6・・・・・・
...The first mask material? , q−q”, 8...
......Impurity doped region τ1121

Claims (1)

[Claims] (1) In a method of selectively topping impurities into a semiconductor crystal, a second mask material is provided on the surface of the semiconductor crystal;
forming a first mask material on top of the second mask material;
By forming the first mask material to a predetermined size and then forming the second mask material using the first mask material as an etching mask, the second mask is made smaller than the first mask material. impurities into a semiconductor crystal, characterized in that a first ion implantation is performed using a first mask material as a mask, and a second ion implantation is performed after removing the first mask material. Doping method (forming a region of one conductivity type on a semi-insulating substrate of 21GaAs, forming a Ti layer on this surface, forming a pattern consisting of a mask material of 7 otresist on the Ti layer,
Using the photoresist mask material as an etching mask, the Ti layer is etched by plasma etching to obtain a Ti layer mask material, and after this, the first ion implantation such as S- is performed using the photoresist mask as a mask. After removing the photoresist mask material, Ti
A method for doping impurities into a semiconductor crystal according to claim 1, characterized in that a second ion implantation of Si + or the like is performed using the layer as a mask.