JPS5869961U - hybrid integrated circuit - Google Patents

hybrid integrated circuit

Info

Publication number
JPS5869961U
JPS5869961U JP16507481U JP16507481U JPS5869961U JP S5869961 U JPS5869961 U JP S5869961U JP 16507481 U JP16507481 U JP 16507481U JP 16507481 U JP16507481 U JP 16507481U JP S5869961 U JPS5869961 U JP S5869961U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
active element
fixed
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16507481U
Other languages
Japanese (ja)
Inventor
宮内　秀男
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP16507481U priority Critical patent/JPS5869961U/en
Publication of JPS5869961U publication Critical patent/JPS5869961U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

Landscapes

  • Structure Of Printed Boards (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来の混成集積回路の一例の回路図、第２図は
第１図に示す回路を実現した混成集積回路の平面図、第
３図は本考案の一実施例に使用する膜回路板の平面図、
第４図は本考案の一実施例の平面図である。 １・・・・・・接続用パッド、２・・・・・・能動素子
固着領域、３、　４．　５・・・・・・導体配線、６．
　７．　８．　９・・・・・・金属線、１０・・・・・
・絶縁基板、１１’、　　１２．　１３゜１４・・・・
・・識別マーク。Figure 1 is a circuit diagram of an example of a conventional hybrid integrated circuit, Figure 2 is a plan view of a hybrid integrated circuit that realizes the circuit shown in Figure 1, and Figure 3 is a membrane circuit used in an embodiment of the present invention. plan view of the board,
FIG. 4 is a plan view of an embodiment of the present invention. 1... Connection pad, 2... Active element fixing area, 3, 4. 5... Conductor wiring, 6.
7. 8. 9...Metal wire, 10...
- Insulating substrate, 11', 12. 13゜14...
··Identifying mark.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶縁基板に能動素子固着領域、抵抗領域、導体配線並び
に接続用パッドが設けられ、能動素子が固着され、他の
受動素子が固着されミ前記能動素子、前記受動素子、前
記接続用パッド、前記導体配線等の間が金属線で接続さ
れている構造の混成集積回路において、前記能動素子固
着領域、導体配線並びに接続用パッドの前記金属線で接
続されるべき箇所の対向する端部に同一形状で向い合せ
た識別マークの組を少くとも一組設けたことを特徴Ｘす
る混成集積回路。An active element fixing area, a resistance area, conductor wiring, and connection pads are provided on an insulating substrate, and the active element is fixed, and other passive elements are fixed.The active element, the passive element, the connection pad, and the conductor are fixed. In a hybrid integrated circuit having a structure in which wiring, etc. are connected by metal wires, the active element fixing region, the conductor wiring, and the connection pad have the same shape at opposite ends of the portions to be connected by the metal wires. A hybrid integrated circuit characterized in that at least one set of identification marks facing each other is provided.
JP16507481U 1981-11-05 1981-11-05 hybrid integrated circuit Pending JPS5869961U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16507481U JPS5869961U (en) 1981-11-05 1981-11-05 hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16507481U JPS5869961U (en) 1981-11-05 1981-11-05 hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS5869961U true JPS5869961U (en) 1983-05-12

Family

ID=29957284

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16507481U Pending JPS5869961U (en) 1981-11-05 1981-11-05 hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS5869961U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5216859B2 (en) * 1973-09-20 1977-05-12
JPS5378768A (en) * 1976-12-23 1978-07-12 Toshiba Corp Wire bonding method of semiconductor element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5216859B2 (en) * 1973-09-20 1977-05-12
JPS5378768A (en) * 1976-12-23 1978-07-12 Toshiba Corp Wire bonding method of semiconductor element

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