JPS586420B2 - Total data error detection method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for detecting errors in data transmission.

In order to guarantee the reliability of data, it is extremely necessary to detect whether or not there are any errors when data is transmitted and received.

This error detection method includes the so-called parity method, but these methods only detect errors in the data itself probabilistically, and do not reliably detect errors caused by hardware failures at the transmitting/receiving station. It cannot be detected.

For example, in a transmission system in which output data is sequentially transmitted from a plurality of data transmitting units on the transmitting side, and the output data is sequentially input to a plurality of receiving units provided corresponding to the above-mentioned transmitting units on the receiving side, the transmitting side The number of units on the receiving side may not match the number of units on the receiving side due to some kind of mistake, and errors caused by this are actually more common than errors of the type detected by methods such as barity.

Errors caused by such hardware failures cannot necessarily be detected using conventional software detection methods. There was the trouble of having to perform wear-related inspections.

This invention was made in view of the above background, and its purpose is to detect not only software errors mentioned above, but also hardware errors occurring on the transmitting side or receiving side. , and its detection is
To provide a total data error detection method that can be performed only on a receiving side without providing data redundancy on the transmitting side.

Hereinafter, the present invention will be explained in detail based on the drawings showing embodiments thereof.

First, a description will be given of a transmission system to which the error detection method according to the present invention is applied. As shown schematically in FIG. ．． P2, P3. Pn
But it is connected.

Each transmitting/receiving station P1, P2, P3, Pn has its own code set for each station, and when any one station specifies its own code and sends it to line L, the sent code Transmitting/receiving stations that have the same code set are selectively called, and data is exchanged between the station that sent its own code and the called station.

As shown in detail in FIG. 2, each transmitting/receiving station P1 to Pn receives data from one of the transmitting/receiving stations onto the transmission line L, first receives it at the receiver R, and sends it to the mono-multivibrator. It is designed to lead to an MMI trigger input, a character detector 1, and a data comparator 2, respectively.

When the character detector 1 detects that bit information for one character has been received, its detection output C
S is designed to increment the count of the step counter K1 by one.

Therefore, the count of the counter K1 increments from 0 to 1 when data for one character is received.

Further, the data comparator 2 compares the received data with the self-code issued from the self-code setting section 3.

This self-code consists of one character.

When this self-code and the contents of the received data match, the comparator 2 outputs a match output.

When this coincidence output is generated when the count content of the counter K1 is 1, the gate G1 is opened and the self-code generated from the self-code setting section 3 is sent to the transmission line L via the driver D, and the flip-flop FF1 is set, and the clock generator CLK is stored in the transmission data storage section 5.
A clock signal CP from CP is introduced.

The own code sent from the driver D to the common transmission line L is also received by the receiver R of the own station, and as a result, the count content of the counter K1 increments from 1 to 2.

When the count of the counter K1 reaches 2, the gate G2 is opened and the receiving station code issued from the receiving code specifying section 4 is sent to the transmission line L via the driver D, thereby specifying the receiving station.

At this time, the receiving station code is also received by the receiver R of the local station, and the count content of the counter K1 increments from 2 to 3.

When the count content of counter K1 reaches 3, logic gate A1
is closed, the count input Ci of the counter K1 is inhibited, and the gate G3 is opened so that the data from the transmission data storage section 5 is sent to the transmission line L via the driver D.

Then, when the data transmission is finished, the mono multivibrator MM1, which has been continuously triggered until now, loses the trace of the subsequent trigger signal, and its output falls after a certain waiting time.

That is, this causes the data frame signal FS to be generated.

With the fall of the output of frame signal FS, ie, MMI, counter K1 and flip-flop FF1 are reset and returned to their initial states.

Next, when the count content of the counter K1 increments from 0 to 1, if a coincidence output is not issued from the data comparator 2, that is, if the first character data content of the received data is not a self-code. , the count content of the counter K1 increments from 0 to 1, but at the stage where it increments to 1, no interrogation is performed and the system waits for the next character data to be input.

When the next character data comes in and the count contents of the counter K1 increments from 1 to 2, and the data contents match the own code, flip-flop FF2 is set and the received data storage section 6 is stored. A clock signal CP is introduced.

As a result, the storage unit 6 enters a state in which data is taken in.

Thereafter, when the next character data comes in, the count of the counter K1 increments from 2 to 3.

When the count of the counter K1 reaches 3, the gate G3 is opened, and the data that will be subsequently received will be taken into the received data storage section 6.

When the received data runs out for a certain period of time, a frame signal FS is generated, and the counter K1 and flip-flop FF2 are reset and returned to their initial states.

Data is transmitted and received as described above, and in the transmitting/receiving station P1 shown in FIG. 2, a call code scanning circuit Su is arbitrarily inserted into the circuit. ing.

This scanning circuit Su includes a code scanning counter K2 that scans in response to the frame signal Fs, and a gate Go that opens when the counted content of the step counter K1 is 00 and leads the counted content of the scanning counter K2 to the driver D. have.

The transmitting/receiving stations P1 to Pn are detachably connected via connectors.

Here, the count contents of the scanning counter K2 at each argument stage correspond to the self-code set for each station.

In the state where the call code scanning circuit Su interrupts, when the count content of the step counter K1 is 00, the gate Go
is opened, and the count value X of the scanning counter K2 at that time is sent to the transmission line L via the driver D.

Then, the transmitting/receiving station to which the same self-code as the counted content X is set is called, and data is transmitted from there.

When this data transmission is completed, a frame signal Fs is issued and the scanning counter K2 is incremented.

Then, this incremented new count content (X+1) is sent to line L, another transmitting/receiving station that has the same self-code as the count content (X+1) is called, and the same process is repeated. be fed.

In this way, each time the scanning counter K2 is incremented by 1, a large number of transmitting/receiving stations P connected to the transmission line L are
1 to n are sequentially called and send data to each.

In other words, a designated scan of the transmitting station is performed.

Next, a portion where the error detection method according to the present invention is implemented and surrounding portions will be described.

First, to explain the peripheral parts thereof, as shown in FIG. 3, the transmission data storage section 5 and the reception data storage section 6 each have a plurality of removable data transmission units No. 1-k and data reception units Ni 1-k. These units No1-k and Ni1-k formed by the above are each in charge of transmitting and receiving data for one character.

Therefore, the number of transmitting units No. 1 to No. k on the transmitting side and the number of receiving units Ni1 to Ni on the receiving side are the same and are made to correspond to each other.

Then, units No. 1 to k, Ni at each transmitting/receiving station
The numbers l to k are arbitrarily determined depending on the amount of data to be transmitted, but between stations where data is sent and received,
The number of transmitting and receiving units must always match.

If the numbers do not match between the transmitting and receiving stations due to some mistake, such as forgetting to install some units or incompletely installing them, the data may be transmitted, but the transmitted and received data itself may be incorrect. turn into.

By the way, when the transmitting units No. 1 to k and the receiving units Ni to k are respectively installed, as shown in FIG. l1.
connected to l2.

Selection of units No. 1 to k and Ni1 to k is performed based on the count of the search scanning counter K3.

If the transmitting unit is normally installed at a location corresponding to the count content of counter K3, the unit installed at that location is selectively driven, and that unit outputs data for one character or Input is now available.

At this time, if the unit is a transmitting unit, a selected signal DS1 indicating that the unit is selected is outputted from the unit and transmitted to the common transmitting unit detection line U1 via the connector.

Further, if the unit is a receiving unit, a selected signal DS2 indicating that the unit is selected is outputted from the unit and transmitted to the common receiving unit detection line U2 via the connector.

That is, when any one of the plurality of transmitting units NO1 to NOk normally attached via the connector is selected by the scanning counter K3, the line U1 receives the signal Ds.
A signal Ds2 appears on the line U2 when any one of the plurality of receiving units Ni1 to Nik, which are also normally attached via the connector, is selected by the scanning counter K3. There is.

Here, it is assumed that the transmitting/receiving station P1 is designated as the transmitting station, the set output S1 is issued from the flip-flop FF1, and the count content of the step counter K1 becomes 3.

Then, the search scanning counter K3 is set to the operating state and starts counting from 0.

First, when the count value is 00, if the transmitting unit is not installed at the location corresponding to 0, the counting force Ci of the scanning counter K3 is inputted via the logic gate A2.
Clock signal CP is introduced and counter K3 is run at high speed.

This fast stepping continues until the signal Dsl appears on line U1.

When the signal Dsl appears on the line U1, i.e. when the step has progressed to the number corresponding to the location where the first transmitting unit No. 1 is installed, at that point the gate A2 is closed and the clock signal CP is inhibited. .

That is, counter K3 receives signal Dsl from line U1.
Search for the unit by walking rapidly until it appears.

When the first transmission unit No. 1 is retrieved, one character's worth of data is outputted therefrom and sent to the transmission line L via line l1, gate G3, and driver D.

When data for one character is transmitted, this is also received by the local station and a character detection signal CS is issued.

This signal CS passes through gates A6 and A3 to counter K.
3, thereby causing the first transmitting unit N
The location next to o1 is selected.

If another transmitting unit is normally installed at that selected location, the counter K3 will not increment until the next character detection signal CS is issued, but if a transmitting unit is not normally installed there. , the gate A2 is opened again, and the counter K3 is rapidly incremented until its count reaches the number corresponding to the location where the second transmitting unit No. 2 is mounted.

In other words, the location where no transmitting unit is installed is skipped and the next location where the transmitting unit is installed is searched.

In this way, when the search for all transmitting units completes one cycle and data for one character is output from each transmitting unit, the count value of counter K3 becomes the number (n+1) corresponding to the non-selected location. .

When this (n+1) count output is generated, the flip-flop FF1, FF2 heliset signal Rs
are sent, the transmission is completed, and the transmitting/receiving station P1 returns to its initial state.

Next, it is assumed that the transmitting/receiving station P1 is designated as a receiving station, a set output S2 is issued from the flip-flop FF2, and the count content of the step counter K1 becomes 3.

Then, the search scanning counter is set to the operating state as in the case of transmission described above, and this time the search for the plurality of receiving units Ni1 to Nik, which should be installed in the same number as the transmitting units on the transmitting side, is started. It is done sequentially.

In this case, when the count value of the counter K3 does not correspond to the mounting location of any receiving unit, the count input of the counter K3 is connected to the clock signal CP via the gate A4.
will be introduced.

Further, when the counter K3 is incremented at high speed by the clock signal CP and its count reaches the number corresponding to the mounting position of the receiving unit, that receiving unit is selected and driven, and one character is written there. The received data for the following minutes is input.

When this data input is completed, a character detection signal is input to the counter K3 through gates A6 and A5, and the counter K3 is again incremented at high speed to search for the location where the next receiving unit is installed. .

As described above, as in the case of transmission, a plurality of receiving units Nil to k are sequentially searched, and data for one character is input to each receiving unit.

Here, if the number of receiving units Ni1 to Nik is the same as the number of transmitting units No.1 to k on the transmitting side, and if they are all installed correctly, then when the transmitting side data transmission is completed, the receiving unit The count value of the counter K3 becomes the number (n+1) corresponding to the selected location, and the character detection signal CS should not be generated thereafter.

However, if there is some kind of mistake at this point, for example, the number of units installed on the sending or receiving side is incorrect, or the installation is incomplete, the number of units may be too large or too small for the amount of data. If there is, the situation will be as follows.

In other words, if the number of properly installed receiving units is insufficient for the amount of data actually received, the counter K3 searches for receiving units once and the count value (
Even after reaching n+1), the character detection signal CS is generated.

Furthermore, if the number of receiving units is too large for the amount of data actually transmitted, the search for receiving units by counter K3 may be completed before the selection signal DS2 appears on line U2. , the data is lost and a frame signal FS is issued.

Here, an AND game A which takes the logical product of the selected signal Ds appearing on the line U2 and the frame signal Fs
7 is provided as the first detection means, and the AND gate A is configured to take the logical product of the output when the count value of the counter K3 is (n+1) and the character detection signal CS.
8 is provided as the second detection means.

Then, the first detection means emits a detection signal Do when the number of receiving units is insufficient for the amount of data actually received, and the second detection means emits a detection signal Do. , Contrary to the above, when there are too many receiving units, the detection signal Du is generated.

Therefore, the OR gate A is the logical sum of both detection signals Do and Du.
9, it is possible to detect the excess or deficiency of the number of units on the receiving side with respect to the number of units on the transmitting side from the logical sum (Do + Du), and furthermore, the logical sum is used as the latch input of the latch circuit FF3. By inputting the error detection signal D0 into the circuit FF3, it is possible to obtain the error detection signal D0 held by the circuit FF3.

The fact that this error detection signal DF is issued indicates that there is an excess or deficiency in the number of units on the receiving side relative to the amount of data, as described above.

Furthermore, if the number of units on the receiving side is as specified and all are installed normally when the error detection signal D8 is issued, this means that there is some abnormality on the transmitting side.

In other words, errors in both transmitting and receiving stations can be detected only on the receiving side.

Moreover, this detection can be performed using only the minimum necessary data without adding redundancy to the data.

As described above, the total data error detection method according to the present invention sequentially transmits output data from a plurality of data transmitting units on the transmitting side, and transmits the output data to a plurality of receiving units provided corresponding to the transmitting units on the receiving side. In a data transmission system in which data is input sequentially, the data to be input to one receiving unit on the receiving side is treated as one character, and a detection signal is issued each time this one character data is received. and a scanning means for sequentially searching the plurality of receiving units each time the character detection signal is emitted, and data transmission ends before the scanning means completes one cycle of searching. Then, a first detection means is provided to output a signal, and a second detection means is provided to output a signal when the character detection signal is emitted at the stage where the search has completed one cycle, The system detects whether the number of units on the receiving side is excessive or insufficient with respect to the number of units on the transmitting side from the logical sum of both output signals of these first and second detection means. It is also possible to detect hardware errors occurring on the transmitting side or the receiving side, and this detection can be performed only on the receiving side without providing data redundancy on the transmitting side.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an example of a transmission system to which the present invention is applied, Fig. 2 is a circuit diagram showing an example of a transmitting/receiving station thereof, and Fig. 3 is a total data error detection system in which the present invention is implemented. FIG. 2 is a circuit diagram showing a portion and its surroundings. P1~n...Transmission/reception station, L...Common transmission line, 1
... Character detector, 5... Transmission data storage section,
6...Received data storage unit, FFI, FF2...Flip-flop, K1...Step counter, MM1
...Mono multivibrator, K3...Search scanning counter, Nol~k...Data transmission unit, Ni1
~k...data receiving unit, A7, A8...A
ND gate, FF3...latch circuit, FS...frame signal, CS...character detection signal, CP...
Clock signal, D9...Error detection signal, Dsl, D
s2...Selected signal, D...Driver, R...Receiver.

Claims (1)

[Claims] 1. In a data transmission method in which output data is sequentially transmitted from a plurality of data transmission units on the transmitting side, and the output data is sequentially inputted to a plurality of receiving units provided corresponding to the above-mentioned transmitting units on the receiving side, ,
A character detector, in which data to be input to one receiving unit is regarded as one character, and a detection signal is emitted each time this one character data is received, and each time this character detection signal is emitted. a first detection means, which is provided with a scanning means for sequentially searching the plurality of receiving units, and outputs a signal when the data transmission is completed before the scanning means completes the search; At the stage where the above-mentioned search has completed one round, a second detection means is provided which outputs a signal when the above-mentioned character detection signal is issued, and the logic of both output signals of these first and second detection means is A total data error detection method that detects the excess or deficiency of the number of units on the receiving side relative to the number of units on the sending side from the sum.