JPS5864057A - Manufacture of al spot lead frame - Google Patents

Manufacture of al spot lead frame

Info

Publication number
JPS5864057A
JPS5864057A JP16459881A JP16459881A JPS5864057A JP S5864057 A JPS5864057 A JP S5864057A JP 16459881 A JP16459881 A JP 16459881A JP 16459881 A JP16459881 A JP 16459881A JP S5864057 A JPS5864057 A JP S5864057A
Authority
JP
Japan
Prior art keywords
lead frame
tape
continuously
coated
prescribed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16459881A
Other languages
Japanese (ja)
Other versions
JPS6248386B2 (en
Inventor
Nobuo Ogasa
小笠 伸夫
Akira Otsuka
昭 大塚
Fumio Ootsuji
大辻 文雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP16459881A priority Critical patent/JPS5864057A/en
Publication of JPS5864057A publication Critical patent/JPS5864057A/en
Publication of JPS6248386B2 publication Critical patent/JPS6248386B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4828Etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To continuously and inexpensively obtain a lead frame coated with Al spot by coating Al on the entire surface of one side of an iron-nickel alloy or copper alloy tape as a composite tape, continuously punching the tape in the prescribed lead frame shape and then removing Al at the unnecessary part. CONSTITUTION:Al is coated on the overall surface in thickness of 1-10mum on one side surface of an Ni-Fe alloy tape in a continuous vacuum device. This Al-coated tape is continuously punched by a press in the prescribed lead frame shape, and the coated Al layer except the prescribed part is removed by a continuously partial etching device. The prescribed Al part on the lead frame which is fed from a supply 19 is masked with an elastic material 23, is dipped and passed through heated aqueous NaOH solution to remove the coated Al except the prescribed part, is then washed water, and is passed through a drying step, thereby continuously manufacturing an Al spot ion-nickel alloy lead frame.

Description

【発明の詳細な説明】 本発明は集積回路(IC)装置用リードフレームの製造
法に関する。特に近年ますます要求が強いICの小型化
、安価に対処できるIC用リードフレームに関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing lead frames for integrated circuit (IC) devices. In particular, the present invention relates to an IC lead frame that can meet the growing demand for IC miniaturization and low cost.

tcのパッケージについては、特に高信頼性を必要とす
るものについては、低融点ガラスセラミック封止(Ce
r DLP )が、又低価格品については、プラスチッ
ク封止が夫々用いられている。
For tc packages, especially those requiring high reliability, low melting point glass ceramic encapsulation (Ce
r DLP ), and for low-cost products, plastic sealing is used, respectively.

このうち前者の低融点ガラスセラミック封止に用いられ
るリードフレームは第1図に示す如く、鉄・ニッケル合
金テープlの上にa2をストライプ状に被覆した、いわ
ゆるアルミストライプテープ3が広く用いられ、その大
半はロール圧延法により、又一部は真空蒸着法により連
°続的に複合テープを作り、それをプレスで打抜くこト
K 、1.って所要のリードフレームが作られている。
Among these, the lead frame used for the former low-melting point glass-ceramic sealing is a so-called aluminum stripe tape 3, which is a striped striped coating of A2 on an iron-nickel alloy tape L, as shown in Fig. 1. Most of the tapes are rolled using a roll method, and some are made using a vacuum deposition method to continuously produce a composite tape, which is then punched out using a press.1. The required lead frame is made.

一方、プラスチック封止に用いられるリードフレームは
、第2図に示す如く、鉄・ニッケル合金又は銅合金テー
プ5をプレス打抜加工又はエツチング法によりリードフ
レームとしたものの上に、金又は銀の如き貴金属を部分
的にメッキ4を施したものが広く用いられている。
On the other hand, as shown in Fig. 2, the lead frame used for plastic sealing is a lead frame made of iron-nickel alloy or copper alloy tape 5 by press punching or etching. Partially plated noble metals 4 are widely used.

しかし乍ら、近年ICチップそのものの大型化が進行す
る中で、パッケージそのものの小型化は高密度実装への
要求から避は難く、従来のDLP(Dual in L
ine Package )は−ツノ限界に来ティる。
However, as IC chips themselves have become larger in recent years, miniaturization of packages themselves is inevitable due to the demand for high-density packaging, and conventional DLP (Dual in L)
ine Package) reaches the -horn limit.

こうした中で、パッケージリードをICチップの二方向
のみでなく四方向から取り出すパッケージ方式としてフ
ラット・パッケージやチップ・キャリア型パッケージが
ますます注目されつつある。
Under these circumstances, flat packages and chip carrier type packages are attracting more and more attention as packaging methods in which package leads are taken out not only from two directions but from all four directions of an IC chip.

ところで、比較的パッケージコストが安価で、かつ信頼
性が高いことから今後のICパッケージ方式の中で重要
な位置を占めると考えられる低融点ガラス・セラミック
封正方式のフラットパッケージ、やチップキャリア型バ
、ツケージを採用しようとすると、アウターリード部に
Mが被覆した部分が不可避的に形成され、これがエレク
トロマイグレーション現象によるリード間ショートや半
田付性の障害要因となるなど品質上の大きな問題となる
By the way, low-melting point glass/ceramic sealed flat packages and chip carrier-type packages are expected to play an important role in future IC packaging because of their relatively low package cost and high reliability. , when trying to adopt a screw cage, a portion coated with M is inevitably formed on the outer lead portion, which causes major quality problems such as short-circuiting between the leads due to electromigration phenomenon and failure of solderability.

一方、プラスチックパッケージ用の貴金属、メッキリー
ドフレームについては低コスト化のため、省貴金属、更
には脱貴金属化に対する要求が高まりつつある。
On the other hand, in order to reduce the cost of precious metals and plated lead frames for plastic packages, there is an increasing demand for reducing precious metals and even eliminating precious metals.

本発明はか−る問題点を有する従来のIC用リードフレ
ームの改良に関するものであり、第8図に示すA1スポ
ット7、被覆型ICリードフレーム9を安価に製造する
方法を提供せんとするものである。
The present invention relates to an improvement of the conventional IC lead frame having the above-mentioned problems, and aims to provide a method for manufacturing the A1 spot 7 and covered type IC lead frame 9 shown in FIG. 8 at low cost. It is.

本発明の方法は、鉄・ニッケル合金又は銅合金テープ8
の上に真空蒸着、イオンブレーティングあるいはスパッ
タリング法などのPVD法で片面全面にMを被覆して複
合テープとした後に、所要のリードフレーム形状に連続
的にプレス打抜加工を施し、これを次に述べる方法で不
要の部分のすを除去することによって連続的にリスポッ
トリードフレームを製造するこζを特徴とする。
The method of the present invention uses iron-nickel alloy or copper alloy tape 8
After coating the entire surface of one side with M using a PVD method such as vacuum evaporation, ion blasting, or sputtering, a composite tape is made, which is then continuously press punched into the desired lead frame shape. The present invention is characterized by continuously manufacturing respot lead frames by removing unnecessary portions by the method described in .

打抜加工したリードフレーム上の不要な部分のMを除去
する方法としては、1つは第5図tζ示す如く、エンド
レスベルト22にリードフレームノヒツチに合わせたゴ
ム等の弾性体23を設け、溶解槽21を通過する際に、
Mの必要な部分にマスキング用弾性体を押し付けた状態
でNaOH水溶液中に浸漬し、マスキング部以外の局を
溶解除去した後、水洗槽25、乾燥炉26を通して巻取
ドラム27に巻取る方法である。これによって第3図に
示すリスポットリードフレームを連続的に製造できる。
One way to remove unnecessary portions M on the punched lead frame is to provide an elastic body 23 such as rubber on the endless belt 22 to fit the lead frame nozzle, as shown in Fig. 5 tζ. When passing through the dissolution tank 21,
M is immersed in a NaOH aqueous solution with a masking elastic body pressed against the necessary portions, and after dissolving and removing the portions other than the masking portions, the material is passed through a washing tank 25 and a drying oven 26 and wound onto a winding drum 27. be. As a result, the respot lead frame shown in FIG. 3 can be manufactured continuously.

不要のすを除去する他の方法は公知のレジスト印刷を用
いることも可能である。
Another method for removing unnecessary dirt may be to use known resist printing.

以下実施例によって説明する。This will be explained below using examples.

実施例 板厚0.125−に圧延された42憾Ni−Fe合金テ
ープの片面に第4図に示す如き連続真空装置中で真空度
I Q  ’ Torr  で連続的に厚さ3μ鶏でM
を全面に被覆した。第4図で、14がサプライ、15が
テークアツプ、lflが駆動ロール、17が水冷銅ロー
ル、18が合金テープ、11がA−eを溶融する54@
、l 2がマスク、13がプレヒートである。このM被
覆テープをプレスにて所要のリードフレーム形状に連続
的に打抜き、加工を行った。そのあと、第5図に示す連
続部分エツチング装置により、所要部分以外の被覆M層
を除去した。即ち、サプライ19から送り出されたリー
ドフレーム上のり所要部を弾性体23でマスキングし、
その間に60°Cに加熱した151NaOH水溶液中を
浸漬通過させて所要部以外の被覆りを除去し、水洗、乾
燥工程を経て連続的にリスポット鉄・ニッケル合金リー
ドフレームを製造することができた。
EXAMPLE One side of a 42 mm Ni-Fe alloy tape rolled to a thickness of 0.125 mm was continuously coated with a 3 μm thick film at a vacuum degree of IQ' Torr in a continuous vacuum apparatus as shown in FIG.
covered the entire surface. In Figure 4, 14 is the supply, 15 is the take-up, lfl is the drive roll, 17 is the water-cooled copper roll, 18 is the alloy tape, and 11 is the melter A-e 54@
, l 2 is a mask, and 13 is a preheat. This M-covered tape was continuously punched and processed into a desired lead frame shape using a press. Thereafter, the covering M layer was removed from the required portions using a continuous partial etching apparatus shown in FIG. That is, the required portions of the lead frame sent out from the supply 19 are masked with the elastic body 23,
During that time, it was immersed in a 151NaOH aqueous solution heated to 60°C to remove the coating other than the required parts, and through a water washing and drying process, it was possible to continuously manufacture a Rispot iron/nickel alloy lead frame. .

上記の製造において第5図のエンドレスベルト22上に
、1つのマスキングの後次のマスキングに至る間に溶解
液を除去する装置を回転中に付加することによって、ス
ポットMの位置精度及び表面状態を改善することも可能
、である。
In the above manufacturing process, by adding a device to the endless belt 22 shown in FIG. 5 during rotation to remove the solution between one masking and the next masking, the positional accuracy and surface condition of the spot M can be improved. It is possible to improve it.

上述の如く本発明の方法によって、低融点ガラス・セラ
ミック封止型のフラットパッケージICやチップキャリ
ア型IC及びプラスチック封止型ICに用いられるMス
ポット被覆リードフレームを連続的にかつ安価に製造す
ることが可能となり、ICパッケージの小型化及び低コ
スト化に多大な効果が得られた。
As described above, by the method of the present invention, it is possible to continuously and inexpensively manufacture M-spot coated lead frames used for low melting point glass/ceramic sealed flat package ICs, chip carrier type ICs, and plastic sealed type ICs. This has made it possible to achieve a significant effect in reducing the size and cost of IC packages.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のりストライプテープの外観図、第2図は
従来の貴金属部分メッキテープの外観図、第3図は本発
明の方法にょろりスポットテープの外観図、第4図は本
発明の方法に用いる連続真空蒸着装置の例を示す概念図
、第5図は同じく本発明の方法に用いる装置の1例を示
す概念図である。 1、8.18;  鉄・ニッケル合金テープ、2;スト
ライプ状M13;アルミストライプテープ、4;スポッ
ト貴金属メッキ、5;鉄・ニッケル又は銅合金テープ、
6;貴金属部分メッキテープ、7;スポット状AA 、
9 ; AAスポットテープ、lO;真空容器、ll;
坩堝、12;マスク、13;ブレヒート、14.19;
サプライ、15;テークアツプ、16;駆動ロール、1
7;水冷銅ロール、20 ; NaOH出入口、21;
溶解槽、22;エンドレスベルト、23;弾性体、24
;プーリ、25;水洗槽、26;乾燥炉、27;巻取ド
ラム。 代理人弁理士 上 代 哲 司 71図 72図 73図 74図 75図 9 0
Fig. 1 is an external view of a conventional glue stripe tape, Fig. 2 is an external view of a conventional precious metal partially plated tape, Fig. 3 is an external view of the Nyorori spot tape according to the method of the present invention, and Fig. 4 is an external view of the method of the present invention. Fig. 5 is a conceptual diagram showing an example of a continuous vacuum evaporation apparatus used in the method of the present invention. 1, 8.18; Iron/nickel alloy tape, 2; Striped M13; Aluminum stripe tape, 4; Spot precious metal plating, 5; Iron/nickel or copper alloy tape,
6; Precious metal partial plating tape, 7; Spot-like AA,
9; AA spot tape, lO; vacuum container, l;
Crucible, 12; Mask, 13; Breheat, 14.19;
Supply, 15; Take-up, 16; Drive roll, 1
7; water-cooled copper roll, 20; NaOH port, 21;
Dissolving tank, 22; Endless belt, 23; Elastic body, 24
; Pulley, 25; Washing tank, 26; Drying oven, 27; Winding drum. Representative patent attorney Satoshi Tsukasa 71Figure 72Figure 73Figure 74Figure 75Figure 9 0

Claims (1)

【特許請求の範囲】 [1)ICリードフレーム用のMスポットテープを連続
的に製造する方法において、基板テープの片面に1〜1
0μ痛の厚さにMを全面被覆し、該被覆テープをプレス
打抜加工を行い、次の工程で必要部分以外を除去するこ
とを特徴とするりスポットリードフレームの製造法。 (2、特許請求の範囲第(1)項において、Mの全面被
覆にPVD法を用いることを特徴とするリスポットリー
ドフレームの製造法。 (3)特許請求の範囲第(1)項において、打抜加工後
弾性体によって必要部分のみマスキングしっ〜、NaO
H水溶液に浸漬してマスキング部以外のA!を溶解除去
することを特徴とする。リスポットリードフレームの製
造法。 (4)特許請求の範囲第(1)項において、打抜加工後
の工程をレジスト印刷を用いて不要部分のすを除去する
ことを特徴とするリスポットリードフレームの製造法。
[Claims] [1] In a method for continuously manufacturing M-spot tape for IC lead frames, one to one
A method for manufacturing a spot lead frame, which comprises coating the entire surface with M to a thickness of 0 μm, performing press punching on the coated tape, and removing other than necessary portions in the next step. (2. In claim (1), a method for manufacturing a respot lead frame, characterized in that a PVD method is used for the entire surface coating of M. (3) In claim (1), After punching, mask only the necessary parts with an elastic body. NaO
Immersed in H aqueous solution to remove parts other than the masking part A! It is characterized by dissolving and removing. Manufacturing method of Rispot lead frame. (4) A method for manufacturing a respot lead frame according to claim (1), characterized in that the step after punching involves removing unnecessary portions by using resist printing.
JP16459881A 1981-10-14 1981-10-14 Manufacture of al spot lead frame Granted JPS5864057A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16459881A JPS5864057A (en) 1981-10-14 1981-10-14 Manufacture of al spot lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16459881A JPS5864057A (en) 1981-10-14 1981-10-14 Manufacture of al spot lead frame

Publications (2)

Publication Number Publication Date
JPS5864057A true JPS5864057A (en) 1983-04-16
JPS6248386B2 JPS6248386B2 (en) 1987-10-13

Family

ID=15796215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16459881A Granted JPS5864057A (en) 1981-10-14 1981-10-14 Manufacture of al spot lead frame

Country Status (1)

Country Link
JP (1) JPS5864057A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63167747U (en) * 1987-04-21 1988-11-01
JPS63265453A (en) * 1987-04-22 1988-11-01 Mitsubishi Electric Corp Manufacture of lead frame for semiconductor use

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63167747U (en) * 1987-04-21 1988-11-01
JPS63265453A (en) * 1987-04-22 1988-11-01 Mitsubishi Electric Corp Manufacture of lead frame for semiconductor use

Also Published As

Publication number Publication date
JPS6248386B2 (en) 1987-10-13

Similar Documents

Publication Publication Date Title
CN112530896A (en) Lead frame for semiconductor packaging and preparation method thereof
US5780931A (en) Surface mounting semiconductor device and semiconductor mounting component
JPS5864057A (en) Manufacture of al spot lead frame
JP6264900B2 (en) RESIST PATTERN MANUFACTURING METHOD, WIRING PATTERN MANUFACTURING METHOD, AND WIRING BOARD
JP2000294911A (en) Solder precoating method and solder precoating substrate
JPH0621625A (en) Printed wiring board and manufacture thereof
JP2504141B2 (en) Manufacturing method of lead frame
JPH1070128A (en) Method of formation of palladium contact bump on semiconductor circuit carrier
JPS62154658A (en) Manufacture of lead frame for semiconductor device
JPH0582524A (en) Manufacture of electrode and its connecting method
JP6901201B2 (en) Substrate for mounting semiconductor elements and its manufacturing method
JP2000244076A (en) Board for flexible printed circuit with protective film
JPS6257106B2 (en)
JP3784528B2 (en) Surface-treated metal material and manufacturing method thereof
JPH05335315A (en) Manufacture of electrode
CN113764370A (en) Lead frame, single-side surface browning process of lead frame and semiconductor package
JPH11135546A (en) Resin sealed semiconductor device and its manufacture
JPH01256159A (en) Exterior soldering of leadframe
JPH0722213A (en) Method for forming solder bump on surface mounting component
JPH03155637A (en) Electrode structure and manufacture thereof
JPH06291232A (en) Lead frame and manufacture thereof
JPS6321862A (en) Manufacture of lead frame for ic ceramic package
JPH10289973A (en) Surface treatment method of lead frame
JPH03185892A (en) Soldering pretreatment of ceramic substrate
JPH0483369A (en) Lead frame