JPS5863081A - Inverter device - Google Patents

Abstract

PURPOSE:To make the titled device conduct stable switching by adding parallel sets of current restricting elements and overvoltage absorbing circuits to the drains or the sources of field-effect transistors as current restricting elements. CONSTITUTION:The first and second field-effect transistors (MOSFET) 12 and 14 are driven by gate driving circuits 16 and 18, and thereby an output is obtained from an output terminal 100. Reactors 44 and 46 are provided serially at the drains 12a and 14a of the MOSFETs 12 and 14, respectively, and overvoltage absorbing circuits 48 and 50 are connected thereto in parallel to the reactors 44 and 46 respectively. These overvoltage absorbing circuits 48 and 50 consist of the series sets of a diode 52 and a resistor 54, and a diode 56 and a resistor 58, respectively.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an inverter device, particularly an inverter device using field effect transistors.

Conventionally, there has been an inverter device of this type as shown in FIG. In FIG. 1, the drain 712a of the field effect transistor @1 (hereinafter referred to as MO8PRi'l') 12 is connected to the positive terminal of the power supply 1o, and the drain 712a of the field effect transistor (hereinafter referred to as MO8PRi'l') 12 is connected to the positive terminal of the power source 1o, and the second MO8P]1fiT34F) is connected to the source 12b of this MO8F]1'r. Do V
Ia 14*, this (7) MO8FF! T07-s1+b
are sequentially connected to the negative terminal of the power supply lO to form a closed circuit, and the power of the first and second MO8FffiT is 126%.
Gate drive circuits 16 and 18 are connected to 140.

When MOBIIBτ is used as a switching element as described above, its equivalent circuit becomes a circuit as shown in FIG. In FIG. 2, the drain 12a and the gate 12
There is a capacitance of 20. Goo) 12 C toso, <
12 bf＄JjKa靝をcapacity 22. )”Rain 1
There is a capacitance 24 between 2FL and the source 12b. M.O.
BFNT 12 power ON +, 99 o'clock ON resistance 26ij
7- in series with a switch 28 controlled by the voltage between the gate 12b and the gate 12Q.

Further, a reverse diode 30 is provided between the drain 12& and the source 12b.

The operation of the circuit shown in FIG. 1 will be explained below. Now, the first
When the MOBFNT 12 receives the output of the gate drive circuit 16 and turns on, the output terminal 1o.

The potential of MO87I becomes the potential V+ of the power supply 10, but next
When the CT 12 is turned off and the second MOBFMT 14 is turned on in response to the output of the gate drive circuit 18, the potential of the output terminal 100 drops from qv+ to V-.

That is, the voltage between the drain 714a and the north 141) of MO13FICT 14 goes from V+ to 0 volts, and M
O137IT 1217) Dray 712a and source 12
The voltage between b changes rapidly to glaze.

FIG. 3 is a time chart diagram showing the operation of the circuit shown in FIG.
Potential of Fi output terminal 100, dFiMO8FET 12
drain current, ei; drain current of 1M08FIcT 14; f is voltage between source 12b of MO8FICT 12 and gate 12C;

As is clear from FIG. 3 8 above, MO8FffiT14
When turned ON, the capacitance 20 to 24 shown in FIG.
The current flowing through MOBFNT 14 causes an overcurrent, current 34
occurs. Similarly, when 11CMOBFET 1-2 is turned ON, an overcurrent 32 flows as is clear from d in the same figure.

This overcurrent 32.34 causes a voltage drop 36.38 shown in the figure'sg in the capacitance 22, and this voltage drop becomes the threshold voltage 40 of the MOBFNT 12.14.
．． 42, the switch 28 shown in FIG.
And MO8Fl! If there is a period in which the iTl2°14 are turned on at the same time, the power supply 10 will be short-circuited.

Since the conventional inverter device using the MO81PK is configured as described above, an overcurrent flows during switching, and the MO8FJlli'l which uses the MO8FJlli'l
: turns ON due to the influence of overcurrent of MO8FffiT, which turned ON, and short-circuits the power supply. For this reason, %MO8? This would destroy the IC and the power supply, making it difficult to construct an inverter using MOI3FETs with high voltage and high speed switching.

The misfire was developed in view of the above-mentioned conventional problem, and its purpose is to provide an inverter device that can stably switch by limiting the overcurrent of the MO13 FIeT by inserting it into the drain or source of the MOBFMT, or by using an acdle. It is in.

In order to achieve the above object, the present invention provides an inverter device using a field effect transistor as a current control element, in which a parallel circuit of a current limiting element and an overvoltage absorption circuit is added to the drain or source circuit of the field effect transistor. It is characterized by Another feature is that a ferrite core is used as the current limiting element, and the drain or source circuit of the field effect transistor is passed through the ferrite core. Furthermore, the present invention is characterized in that two or more field effect transistors are connected in parallel and a current balance resistor is provided in the drain or source circuit of the field effect transistor.

Hereinafter, preferred embodiments of the present invention will be described based on the drawings. FIG. 4 is a circuit diagram showing the first embodiment of the present invention, in which the same parts as in FIG.
1PIeT 12.14 Drey y12a.

14a is provided with reactors 44 and 46 in series, and overvoltage absorption circuits 48 and 50 are connected in parallel with each of the reactors. The overvoltage absorbing circuits 48 and 50 each include a diode 52 and a resistor 54 connected in series, and a resistor 56 and a resistor 58 connected in series.

FIG. 5 is a time chart showing the operation of the circuit shown in FIG. 4, and shows the same as a-, , e in FIG. shows.

the above! Figure 4 Circuit configuration te d MO13FRiT 12.
The drain current of 14 is limited to 44.46, and the overcurrent 6G, 62 becomes a small value as shown in d%e in FIG. In this case, current can be limited even if the load connected to the output terminal 100 is capacitive. Therefore, MO81? ET 12% ] 4 is turned off, the overvoltage absorption circuit 48.5o attenuates the voltage generated in the reactor 44.46 as shown in FIG. prevent this from occurring. Note that the diode 52.56 of the overvoltage absorption circuit 48.5o is for high-speed switching, and the resistor 54.58
Non-inductive resistance is good.

Fig. 6 shows a second embodiment of the present invention, in which a ferrite: 7764.6 is used instead of the glue axle 44.46 in Fig. 4.
This is a configuration using 6. This ferrite core has a magnetic permeability of about 1000 to 30oO, and operates as a 1000 to 2000 μH reactor just by passing an electric wire through it.

In addition, the ferrite core has the effect of attenuating high frequencies and can prevent parasitic roots caused by high frequencies in %MO8FgT, resulting in stable switching operation.

FIG. 7 shows a third embodiment of the present invention, in which a MO8FET 513.7 having the same circuit configuration is connected in parallel to the series body of MO8FIC'l' 12.14 of the first embodiment shown in FIG.
This is a single-phase inverter with 0 connected in series.

Dray y 68 a of the above MO8FET 68.70,
7Qa Nikkeri Actor A 2.74, Gate 68 (!, 7
Gate drive circuits 76 and 78 are connected to 0C. Further, an overvoltage absorption circuit 88.9o consisting of a diode 80 and a resistor 82 in series, and a resistor 84 and resistor 86 in series is connected to the reactor in parallel.

In this embodiment, the inverter output voltage of the load 92 can be doubled as compared to the first embodiment. Also, if the load 92 is an inductive load, a reverse voltage may be applied to the MO8FET, but the reverse diode 30 of the MO87JCT itself
(Fig. 2) The handle handle 44 (46, 72, 74) and the overvoltage absorption circuit 48 (s o, s 8, 90) are 6
Therefore, the MO8FET 12 (14, 68, 70) will not be destroyed. In an inverter made up of transistors or the like, a diode is connected in parallel with the transistor in the opposite direction to prevent the above-mentioned reverse voltage, but when a MOBFET is used, the above-mentioned diode can be omitted.

FIG. 8 shows a fourth embodiment of the present invention, in which MO81'KT 12.14.68.7o of the third embodiment is connected to a transistor 110, a diode 112, 114, 16,
It is composed of parallel bodies of 118, 120%, 122, and 124.

FIG. 9 shows a fifth embodiment of the present invention, in which each MOI9PK'l' circuit of the third embodiment has an MO8I of the same configuration.
This is a configuration in which FET circuits (the part with a dash added to the symbol) are connected in parallel. nosFg'r has variations in the ON resistance 26 shown in the circuit shown in Figure 2, and the current does not flow evenly when connected in parallel, so the current balance resistor 126 to 1
32. Connect 126' to 132' in series with the drain circuit and the axle. This current balance resistor is MOBFE
It is recommended to select a value similar to the ON resistance of T, generally from 0.1 to 1Ω.

FIG. 1θ is a circuit diagram showing a sixth embodiment of the present invention in which ferrite cores 134 to 140 and 134' to 140' are used in place of the glue axle shown in FIG. 9.

Although a single-phase inverter is shown above, a multi-phase inverter can also be easily constructed by arranging the circuits of the first embodiment in three rows and using a plurality of three-phase inverters.

FIG. 11 shows an example of the configuration of a power supply 1° in each embodiment of the present invention, in which three-phase alternating current R, 8, and T are connected to a thyristor 142.
152 to obtain a more constant DC voltage.

FIG. 12 is an example in which the inverter device 158 of the present invention based on FiMO8FKT is used as a power source for silent discharge of a silent discharge excitation laser oscillator 160. The output of the inverter device 158 is converted into a high voltage by a step-up transformer 162 and is supplied to electrodes 164 and 166 whose surfaces are covered with a dielectric material. When the silent discharge excitation laser oscillator 160 is filled with a laser medium gas 168 and a silent discharge 170 is generated, laser oscillation occurs between a total reflection mirror 172 and a partial transmission mirror 174 placed opposite each other, and a laser beam 176 is generated. Output as . The output frequency of the inverter device 158 used as the silent discharge power source is 5 Q KHz to 200
Because KH2 is used, this was not possible with other transistors or thyristors, but it became possible by using MO8FFiT.

As described above, since the parallel reactor and overvoltage absorption circuit are added to the drain or source circuit of the FiMO8FffiT of the present invention, it is possible to prevent overcurrent from flowing through the MO8FffiT. As a result, M to be 0FIP
There is no possibility that the O8FIT is turned on and the power supply is short-circuited, and damage to the power supply and MO8FICT etc. can be avoided, and an inverter device that can perform stable switching without parasitic oscillations at high frequencies can be obtained. be.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of a conventional inverter device, Figure 2 is a MO
8IF] CT equivalent circuit diagram, FIG. 3 is a circuit diagram showing the first embodiment of the present invention shown in FIG. 1, FIG. 5 is a time chart diagram explaining the circuit operation of FIG. 4, and FIG. FIG. 7 is a circuit diagram showing a ta2 embodiment of the invention, FIG. 7 is a circuit diagram showing a third embodiment of the invention, FIG. 8 is a circuit diagram showing a fourth embodiment of the invention, and FIG. 9 is a circuit diagram showing a fourth embodiment of the invention. 10 is a circuit diagram showing a sixth embodiment of the present invention, FIG. 11 is a circuit configuration diagram of a power supply applied to each of the above embodiments of the present invention, and FIG. 12 is a circuit diagram showing a sixth embodiment of the present invention. It is a circuit connection diagram used as a power supply of a silent discharge excitation laser oscillator to which an inverter device is applied. Identical members in each figure are given the same reference numerals, 1o is a power supply, 12
%14.68.70#1M08PKT, 16.18.7
6.78Fi gate drive circuit, 44.46% 72
．． 74 is a reactor, 48.50.8 g, 90 is an overvoltage absorption circuit, and 64, 66, 134 to 140 are 7 elite cores. □ Agent Patent attorney Shin Kuzuno - Fig. 1 Fig. 2 Fig. 3 b OFF ON OFF ON Fig. 5 9 Fig. 11 Fig. 12 Procedural amendment (voluntary) Commissioner of the Japan Patent Office 1 Case 0) Display fe Uaki 56-1598
No. 10 No. 2 Name of the invention Inverter device 3, Person making the amendment Relationship to the case License granted 1 person Representative piece 111 Part 4, Agent 5 Subject of amendment (1) Detailed explanation of the invention of FIJm Betsu No.-6, Contents of amendment (1) II Hommetsu, page 7, line 14, K “1ooo
~2oo. Correct "μH's" to "rx-uH's". that's all

Claims (1)

[Scope of Claims] (1) An inverter device using a field effect transistor as a current control element, characterized in that a parallel body of a current limiting element and an overvoltage absorbing circuit is added to the drain or source circuit of the field effect transistor. inverter device. (2. In the device described in claim (1), a ferrite core is used as the limiting element, and the drain or source circuit of the field effect transistor is passed through the ferrite core.) (4) An inverter device according to any one of claims (1), (2), and (3) or having a current balance resistor in the source circuit.