JPS5858833B2 - High quality pattern - Google Patents

High quality pattern

Info

Publication number
JPS5858833B2
JPS5858833B2 JP15301275A JP15301275A JPS5858833B2 JP S5858833 B2 JPS5858833 B2 JP S5858833B2 JP 15301275 A JP15301275 A JP 15301275A JP 15301275 A JP15301275 A JP 15301275A JP S5858833 B2 JPS5858833 B2 JP S5858833B2
Authority
JP
Japan
Prior art keywords
metal layer
film
electroless plating
plating
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15301275A
Other languages
Japanese (ja)
Other versions
JPS5276682A (en
Inventor
高雄 佐藤
保男 中島
節生 野口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP15301275A priority Critical patent/JPS5858833B2/en
Publication of JPS5276682A publication Critical patent/JPS5276682A/en
Publication of JPS5858833B2 publication Critical patent/JPS5858833B2/en
Expired legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】 本発明は配線パターンの形成方法に関し特にプリント配
線板の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of forming a wiring pattern, and particularly to a method of manufacturing a printed wiring board.

従来配線パターンの形成方法、例えばプリント配線板の
製造方法としては、絶縁基板に所望の孔明けをし、無電
解メッキするための活性化処理をした後、無電解メッキ
によって絶縁基板全面に金属導電薄層(一般にはニッケ
ル、銅等が使用される)を形成した後、溶剤によって現
像される感光性高分子有機樹脂(液体またはフィルム状
)が被覆され、露光後クロロセンのような有機溶剤によ
って現像し、メツキレシストパターンを形成するか、あ
るいはスクリーン印刷法によって有機インクメツキレシ
ストパターンを形成する。
Conventional methods for forming wiring patterns, such as manufacturing printed wiring boards, involve drilling desired holes in an insulating substrate, performing activation treatment for electroless plating, and then applying conductive metal to the entire surface of the insulating substrate by electroless plating. After forming a thin layer (often nickel, copper, etc.), it is coated with a photosensitive polymeric organic resin (liquid or film) that is developed by a solvent, and after exposure it is developed by an organic solvent such as chlorocene. Then, a plating resist pattern is formed, or an organic ink plating resist pattern is formed by a screen printing method.

次いで電気メッキによって、回路部分に金属層を厚付け
してメツキレシストを除去した後、化学腐食液によって
回路以外の金属薄層を蝕刻除去し、プリント配線を製造
していた。
Next, a thick metal layer was applied to the circuit portion by electroplating, the metal layer was removed, and then the thin metal layer other than the circuit was etched away using a chemical etching solution to produce printed wiring.

しかしこれらの方法では、電気メツキレシストを形成す
る場合、無電解メッキによって形成された金属導電薄層
のピンホールに溶剤(感光性高分子有機樹脂の現像液あ
るいは有機インク中の希釈剤)が浸入し絶縁基板表面が
おかされある場合には、ピンホール周辺の金属薄層が剥
離する等の欠点があった。
However, with these methods, when forming an electroplating resist, the solvent (developer of photosensitive polymeric organic resin or diluent in organic ink) may penetrate into the pinholes of the thin metal conductive layer formed by electroless plating. If the surface of the insulating substrate is damaged, there are drawbacks such as peeling of the thin metal layer around the pinholes.

また電気メッキにおいてはピンホールわら電気メツキ液
が浸入し電気メツキ後のメッキ膜のフクロが発生してい
た。
In addition, during electroplating, the electroplating solution penetrated through the pinholes, causing flakes in the plated film after electroplating.

本発明はこれらの欠点を除去した高信頼度を有し、歩留
りの高い配線パターンの形成方法を提供することを目的
とする。
It is an object of the present invention to provide a method for forming a wiring pattern that eliminates these drawbacks, has high reliability, and has a high yield.

本発明は配線パターンの形成方法において、基板上に第
1の導電性無電解メッキ金属層を形成する工程と、無電
解メッキ触媒金属層を形成する工程と、第2の導電性メ
ッキ金属層を形成する工程とを含むことを特徴とする。
The present invention provides a method for forming a wiring pattern, which includes a step of forming a first conductive electroless plated metal layer on a substrate, a step of forming an electroless plated catalyst metal layer, and a second conductive plated metal layer. It is characterized by including the step of forming.

あるいは、基板上に第1の導電性金属層を無電解メッキ
形成したのち、無電解メッキ金属触媒液に該基板を浸漬
し、続いて第2の導電性金属層を無電解メッキで第1の
導電性金属層上に選択的に形成する工程とを含むことを
特徴とするものである。
Alternatively, after forming a first conductive metal layer on the substrate by electroless plating, the substrate is immersed in an electroless plating metal catalyst solution, and then a second conductive metal layer is formed by electroless plating on the first conductive metal layer. The method is characterized in that it includes a step of selectively forming the conductive metal layer on the conductive metal layer.

あるいは本発明は無電解金属メッキによって第1の金属
層を基板上に形成した後、無電解金属メッキ触媒液に浸
漬し第1の金属層上に無電解メッキ触媒金属薄膜を形成
する。
Alternatively, in the present invention, after a first metal layer is formed on a substrate by electroless metal plating, it is immersed in an electroless metal plating catalyst solution to form an electroless plating catalyst metal thin film on the first metal layer.

この工程によって第1の金属層中のピンホールに無電解
メッキ触媒金属が浸入し吸着される。
Through this step, the electroless plating catalyst metal penetrates into the pinholes in the first metal layer and is adsorbed.

次いで機械的に剥離現像のできる、すなわち、露光によ
り、機械的な密着力が変化しうる感光性樹脂層を該第1
の薄膜金属層上に形成した後露光して機械的に剥離現像
し、メツキレシストを形成して再び導電性金属メッキに
よって第2の導電性金属層を形成する工程とを含むこと
を特徴とするものである。
Next, a photosensitive resin layer which can be mechanically peeled and developed, that is, whose mechanical adhesion can be changed by exposure, is applied to the first layer.
The second conductive metal layer is formed on the thin film metal layer, exposed to light, mechanically peeled and developed, and formed into a metal resist, and then again formed by conductive metal plating to form a second conductive metal layer. It is.

上述した第2の導電性金属層は無電解メッキ又は電気メ
ッキのいずれの方法によって形成しても良いが好ましく
は無電解メッキしたのち電気メッキにより厚付けを行う
方法が良い。
The above-mentioned second conductive metal layer may be formed by either electroless plating or electroplating, but it is preferable to perform electroless plating and then thicken it by electroplating.

ここで上記した無電解メッキ触媒金属としては塩化パラ
ジウムあるいは塩化スズ、あるいはそれらの混合物を水
溶液として用いることができ、これらの無電解メッキ触
媒金属は、第1の無電解金属層のピンホールにパラジウ
ム、スズを析出吸着させることによりピンホールをふさ
ぐ効果を有し、さらにこのようにしてピンホールが大幅
に減少した第1の金属層上にメッキにより第2の金属層
を、好ましくは無電解メッキを行ないさらにその上に電
解メッキを行なうことにより、第1の金属層と基板との
接触は機械的かつ化学的に安定せしめらる。
Here, as the electroless plating catalyst metal mentioned above, palladium chloride, tin chloride, or a mixture thereof can be used in the form of an aqueous solution, and these electroless plating catalyst metals can be used to form palladium in the pinholes of the first electroless metal layer. , has the effect of blocking pinholes by depositing and adsorbing tin, and furthermore, a second metal layer is formed by plating, preferably electroless plating, on the first metal layer in which the pinholes are significantly reduced. By performing electrolytic plating thereon, the contact between the first metal layer and the substrate is mechanically and chemically stabilized.

また露光により機械的な密着力の変化する感光性樹脂と
しては、ポリケイ皮酸エステル、ジアド化合物、ポリメ
タクリル酸アミン系樹脂を使用することができ、現像液
を用いない、機械的密着力を露光により選択的に変化さ
せて機械的に露光パターンを現像するため(へ現像液に
よる基板、金属層への影響を除去することができる。
In addition, as photosensitive resins whose mechanical adhesion changes with exposure to light, polycinnamate esters, diad compounds, and polymethacrylic acid amine resins can be used. Since the exposed pattern is mechanically developed by selectively changing the exposure pattern (by changing the exposure pattern), it is possible to eliminate the influence of the developing solution on the substrate and metal layer.

すなわち本発明ではメツキレシスト形成において金属層
は有機溶剤には接触する機会はなくなり、ピンホールか
らの有機溶剤による絶縁基板の腐食は完全に除去される
That is, in the present invention, there is no opportunity for the metal layer to come into contact with the organic solvent during the formation of the mesh resist, and the corrosion of the insulating substrate caused by the organic solvent through the pinholes is completely removed.

また回路部分の第1の金属層中のピンホールは無電解メ
ッキ触媒金属および第2の金属層によって被覆されるた
め、電気金属メッキ後の回路部分のメッキ膜のフクレは
除去される。
Furthermore, since the pinholes in the first metal layer of the circuit portion are covered with the electroless plating catalyst metal and the second metal layer, blisters in the plating film of the circuit portion after electroplating are removed.

さらに第2の金属層は回路部分、のみを形成するため、
メツキレシスト除去後の化学腐食液による蝕刻において
も、蝕刻される金属の量は小さく経済的である等の特徴
を有している。
Furthermore, since the second metal layer forms only the circuit part,
Even in etching with a chemical etching solution after removal of the metal resist, the amount of etched metal is small and economical.

次に本発明の1実施例をプリント配線板の場合について
第1図を用いて詳細に説明する。
Next, one embodiment of the present invention will be described in detail in the case of a printed wiring board with reference to FIG.

絶縁基板1(第1図g)にドリルまたはパンチによって
孔明げする(第1図b)次いで温度40℃のクロム酸−
硫酸の混合水溶液に約10分間浸漬し、絶縁基板1の表
面を親水性にする。
A hole is made in the insulating substrate 1 (FIG. 1g) by a drill or punch (FIG. 1b), and then chromic acid is added at a temperature of 40°C.
The surface of the insulating substrate 1 is made hydrophilic by immersing it in a mixed aqueous solution of sulfuric acid for about 10 minutes.

次いで水洗後無電解メッキ触媒液として塩化パラジウム
水溶液に室温で約5分間浸漬し、水洗した後無電解銅メ
ッキ液中に浸漬し、厚さ1〜5ミクロンの第1の薄膜銅
3を絶縁基板10表面および孔壁2に形成する(第1図
C)。
Next, after washing with water, it is immersed in an aqueous palladium chloride solution as an electroless plating catalyst solution at room temperature for about 5 minutes, and after washing with water, it is immersed in an electroless copper plating solution to form the first thin copper film 3 with a thickness of 1 to 5 microns on an insulating substrate. 10 surface and the pore wall 2 (FIG. 1C).

次いで水洗後無電解メッキ触媒液として塩化パラジウム
水溶液に約5分間浸漬し、第1の薄膜銅3上に無電解メ
ッキ触媒金属即ちパラジウムの被膜4を形成し、水洗後
乾燥する(第1図d)。
Next, after washing with water, it is immersed in an aqueous palladium chloride solution as an electroless plating catalyst solution for about 5 minutes to form a coating 4 of electroless plating catalyst metal, that is, palladium, on the first thin copper film 3, and after washing with water, it is dried (Fig. 1d). ).

次いで絶縁基板10両面に露光後、機械的に剥離現像で
きる感光性フィルム5を熱圧着する。
Next, after exposure to light, a photosensitive film 5 that can be mechanically peeled off and developed is bonded to both sides of the insulating substrate 10 by thermocompression.

感光性フィルム5はマイラーフィルム5aおよび感光性
樹脂5bの二重構造になっており感光性樹脂5bの露光
部分のみが露光によって密着力が増加し、無電解メッキ
触媒金属(パラジウム)被膜4上に残り感光性樹脂5b
の非露光部分は機械的剥離によってマイラーフィルム5
aに密着したまま剥離し現像ができる(第1図e)。
The photosensitive film 5 has a double structure of a Mylar film 5a and a photosensitive resin 5b, and only the exposed portion of the photosensitive resin 5b increases in adhesion upon exposure to the electroless plated catalyst metal (palladium) coating 4. Remaining photosensitive resin 5b
The non-exposed areas of
It can be peeled off and developed while remaining in close contact with a (Fig. 1e).

次いでパターン露光用マスクフィルム6を感光性フィル
ム5の両面に密着させ紫外線を照射して露光する(第1
図f)。
Next, the mask film 6 for pattern exposure is brought into close contact with both sides of the photosensitive film 5, and exposed to ultraviolet rays (the first
Figure f).

次いで感光性フィルム5のマイラーフィルム5aを一端
からはがすことにより感光性樹脂5bの非露光部分を機
械的に剥離すると第1図gに示すように感光性樹脂5b
の露光部分が無電解メッキ触媒金属被膜4上に残りメツ
キレシストパターンが形成される。
Next, by peeling off the Mylar film 5a of the photosensitive film 5 from one end, the unexposed portion of the photosensitive resin 5b is mechanically peeled off, and the photosensitive resin 5b is removed as shown in FIG. 1g.
The exposed portion remains on the electroless plating catalyst metal film 4, forming a plating resist pattern.

次いで無電解鋼メッキによって1〜5ミクロンの第2の
薄膜銅7をメツキレシスト非被覆部分の無電解メッキ触
媒金属被膜4上に形成する。
A second thin copper film 7 of 1 to 5 microns is then formed by electroless steel plating on the electroless plating catalyst metal coating 4 in the areas not covered with the metal resist.

次いで電気銅メッキによって第2の薄膜銅7上に電気銅
8を形成する(第1図h)。
Next, electrolytic copper 8 is formed on the second thin film copper 7 by electrolytic copper plating (FIG. 1h).

電気銅メッキ液としては硫酸鋼メッキ液、ピロリン酸銅
メッキ液等が使用できる。
As the electrolytic copper plating solution, a sulfuric acid steel plating solution, a copper pyrophosphate plating solution, etc. can be used.

次いで感光性樹脂5b(メツキレシスト)をトリクレン
溶液に約3分間浸漬すると膨潤剥離する。
Next, the photosensitive resin 5b (Metsuki Resyst) is immersed in a trichloride solution for about 3 minutes, causing swelling and peeling.

次いで化学腐食液(塩化第二鉄水溶液または塩化第二銅
水溶液)に浸漬し、電気銅非被覆部分の第1薄膜銅およ
び無電解メッキ触媒金属被膜を蝕刻除去し、プリント配
線板を製造した。
Next, it was immersed in a chemical etching solution (ferric chloride aqueous solution or cupric chloride aqueous solution) to etch away the first thin copper film and the electroless plating catalyst metal coating on the areas not coated with electrolytic copper, thereby producing a printed wiring board.

以上本発明においてはプリント配線回路部分の薄膜銅は
有機溶剤と接触する機会は皆無であり、また回路部分の
薄膜銅のピンホールも従来に比べて著しく減少したため
電気銅メッキ後のメッキ膜のフクレは皆無である高精度
プリント配線板を製造することができた。
As described above, in the present invention, the thin film copper in the printed wiring circuit part has no chance of coming into contact with organic solvents, and the number of pinholes in the thin film copper in the circuit part is significantly reduced compared to the conventional method, so that the plated film does not blister after electrolytic copper plating. We were able to manufacture a high-precision printed wiring board with no problems.

本発明は従来製造方法に比べて有機溶剤の使用量が少な
く、公害対策上の利点があり、かつ経済的である。
The present invention uses less organic solvent than conventional manufacturing methods, has advantages in terms of pollution control, and is economical.

また両面プリント配線板の製造に適用できるばかりでな
く、片面プリント配線板および多層プリント配線板にも
応用できまた金属層として銅板外のニッケルやアル□ニ
ウム等、他の導電性金属でも良くその実用的価値は著し
く太きいものである。
In addition, it can be applied not only to the production of double-sided printed wiring boards, but also to single-sided printed wiring boards and multilayer printed wiring boards, and other conductive metals such as nickel and aluminum other than copper plates can be used as the metal layer. Its value is extremely high.

また本発明は上述した実施例に限定されるものではなく
、広く基板上に配線層を形成する場合に適用でき、混成
集積回路の配線や、集積回路の配線にもその効果を損う
ことなく適弔しうるものである。
Furthermore, the present invention is not limited to the above-mentioned embodiments, and can be applied to a wide variety of cases where wiring layers are formed on a substrate, and can also be applied to wiring of hybrid integrated circuits and integrated circuits without impairing its effects. It is something that can be mourned appropriately.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のプリント配線板の製造方法におけるプ
リント基板要部の断面図である。 図中の符号 1・・・絶縁基板、2:孔明げ部、3:第
1薄膜銅、4:無電解メッキ触媒金属、5:感光性フィ
ルム、5a:マイラーフィルム、5b二二感光性樹脂、
6:露光用パターンフィルム、7:第2薄膜銅、8:電
気銅。
FIG. 1 is a cross-sectional view of the main parts of a printed wiring board in the method of manufacturing a printed wiring board of the present invention. Codes in the figure 1... Insulating substrate, 2: Perforated part, 3: First thin film copper, 4: Electroless plating catalyst metal, 5: Photosensitive film, 5a: Mylar film, 5b 22 Photosensitive resin,
6: pattern film for exposure, 7: second thin film copper, 8: electrolytic copper.

Claims (1)

【特許請求の範囲】[Claims] 1 基板上に第1の導電性無電解メッキ金属層を形成す
る工程と、無電解メッキ触媒金属層を形成する工程と、
第2の導電性メッキ金属層を形成する工程とを含むこと
を特徴とする配線パターンの形成方法。
1. A step of forming a first conductive electroless plating metal layer on a substrate, a step of forming an electroless plating catalyst metal layer,
A method for forming a wiring pattern, the method comprising: forming a second conductive plated metal layer.
JP15301275A 1975-12-22 1975-12-22 High quality pattern Expired JPS5858833B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15301275A JPS5858833B2 (en) 1975-12-22 1975-12-22 High quality pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15301275A JPS5858833B2 (en) 1975-12-22 1975-12-22 High quality pattern

Publications (2)

Publication Number Publication Date
JPS5276682A JPS5276682A (en) 1977-06-28
JPS5858833B2 true JPS5858833B2 (en) 1983-12-27

Family

ID=15553017

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15301275A Expired JPS5858833B2 (en) 1975-12-22 1975-12-22 High quality pattern

Country Status (1)

Country Link
JP (1) JPS5858833B2 (en)

Also Published As

Publication number Publication date
JPS5276682A (en) 1977-06-28

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