JPS5855710A - Displaying method for defect position - Google Patents
Displaying method for defect positionInfo
- Publication number
- JPS5855710A JPS5855710A JP56155340A JP15534081A JPS5855710A JP S5855710 A JPS5855710 A JP S5855710A JP 56155340 A JP56155340 A JP 56155340A JP 15534081 A JP15534081 A JP 15534081A JP S5855710 A JPS5855710 A JP S5855710A
- Authority
- JP
- Japan
- Prior art keywords
- defect
- defects
- printed circuit
- pattern
- lens
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
- G01N21/956—Inspecting patterns on the surface of objects
Landscapes
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Biochemistry (AREA)
- General Health & Medical Sciences (AREA)
- General Physics & Mathematics (AREA)
- Immunology (AREA)
- Pathology (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Supply And Installment Of Electrical Components (AREA)
- Length Measuring Devices By Optical Means (AREA)
- Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はプリント基板表面に形成されたパターンの欠陥
位置表示方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for indicating defect positions of patterns formed on the surface of a printed circuit board.
電子計算機には多数のプリント基板が用いられているが
、プリント基板の信頼度を維持するため、僅かな欠陥も
残さぬようその製造工程において形成されたパターンを
検査し、発見された欠陥はすべて補修を施こす。そのた
め発見されたパターンの欠陥位置を正確に表示すること
が必要で、従来は欠陥表示V−)に発見された欠陥に対
応する位[Kマークを付したものを作成し、この欠陥表
示シートをプリンF板上に当てがって修正すべき欠陥を
職別していた。Many printed circuit boards are used in electronic computers, but in order to maintain the reliability of the printed circuit boards, the patterns formed during the manufacturing process are inspected to ensure that even the slightest defect remains, and all defects found are removed. Make repairs. Therefore, it is necessary to accurately display the position of the detected defect in the pattern. Conventionally, a defect display sheet with a [K mark] corresponding to the detected defect was created on the defect display V-), and this defect display sheet was The defects that should be corrected were identified on the pudding F board by job.
しかしこの方法では欠陥表示V−)は紙を用いるため不
透明でToシ、欠陥を識別するには表示されたマークの
所を指でおさえて欠陥表示V−)をめ〈シ、指でおさえ
た近傍を探して欠陥を見つけ危ければならず、また見出
した欠陥を補修するときは欠陥表示゛V−)を取りはず
さねばならないという不便さがあつ九。However, in this method, the defect display V-) is made of paper and is opaque.To identify the defect, hold your finger on the displayed mark and aim at the defect display V-). There is the inconvenience of having to search nearby areas to find defects, and also having to remove the defect indicator (V-) when repairing the defects found.
本発明の目的は上記問題点を解消し、プリント基板に欠
陥表示F−)をかぶせたまま欠陥を識別し、補修し得る
欠陥位置表示方法を提供することにToシ、この目的は
本発明において、欠陥表示シートの検出された欠陥に対
応する位置に1窓を開口するととにより達成される。The purpose of the present invention is to solve the above-mentioned problems and to provide a defect position display method that can identify and repair defects while covering the defect display F-) on a printed circuit board. This is achieved by opening one window at a position corresponding to the detected defect on the defect display sheet.
以下本発明の一実施例を図面により説明する、第1図は
本発明の欠陥位置表示方法の一実施例を説明するための
図で、使用した欠陥位置表示装置のシステム構成を併せ
て示す。An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram for explaining an embodiment of the defect position display method of the present invention, and also shows the system configuration of the defect position display device used.
図において、1は検査しようとするプリント基板である
。このプリント基板1のパターン2を、レーザ8から出
射されたレーザビームをビームエキスパンダ4により一
旦拡大し、これを回転ミラー5により反射し、レンズ6
で微小スポットに絞って照射する。パターン2で反射し
た光はレンズ6を通り回転ミラー5及びハーフミラ−7
で反射し、レンズ8により光検知器9の受光面に結像さ
れる。光検知器9はこれを入射光強度に応じた電気信号
に変換し、増幅器11に送出する。増幅器11で増幅さ
れた前記信号はコンパレータ12で2値化されて、前記
パターンの有無に応じて1ドか0”の映書信号に変換さ
れる。In the figure, 1 is a printed circuit board to be inspected. A laser beam emitted from a laser 8 is once expanded by a beam expander 4, and then reflected by a rotating mirror 5 to form a pattern 2 on the printed circuit board 1.
Focus the irradiation on a minute spot. The light reflected by pattern 2 passes through lens 6 to rotating mirror 5 and half mirror 7.
The light is reflected by the lens 8 and formed into an image on the light receiving surface of the photodetector 9 . The photodetector 9 converts this into an electrical signal according to the intensity of the incident light, and sends it to the amplifier 11. The signal amplified by the amplifier 11 is binarized by the comparator 12 and converted into a 1 do or 0'' movie signal depending on the presence or absence of the pattern.
このような操作を回転ミラ−5を回転させることにより
レーザビームの照射位置を移動させ、またプリント基板
を載愛したxYテープ/L/(図示せず)を移動させる
ことによりプリント基板1全面に対して行う。このよう
にプリント基板l全面をレーザビームで走査し、プリン
ト基板1のパターンに対応し九映像信号がアドレスと共
に欠陥検出回路1Bに送シ込まれる。欠陥検出回路IB
は入力された映像信号に基いて、所定の論理演算を行っ
てパターンの欠陥とそのアドレスを検出し、アドレスメ
叱り18に格納する。なおここで、Aは欠陥検出手段を
示す。This operation is performed by rotating the rotating mirror 5 to move the laser beam irradiation position, and by moving the xY tape /L/ (not shown) on which the printed circuit board is mounted, to cover the entire surface of the printed circuit board 1. Do it against. In this manner, the entire surface of the printed circuit board 1 is scanned with a laser beam, and nine video signals corresponding to the pattern of the printed circuit board 1 are sent to the defect detection circuit 1B together with the address. Defect detection circuit IB
performs a predetermined logical operation based on the input video signal to detect pattern defects and their addresses, and stores them in the address register 18. Note that here, A indicates a defect detection means.
プリント基板l全面の検査が終了すると、コントローラ
14は、前記アドレスメ屹す18に格納された欠陥のア
ドレスを読み出し、欠陥位置表示V−)パンチャ90を
作動せしめて欠陥表示シー10に窓を開口する。When the inspection of the entire surface of the printed circuit board l is completed, the controller 14 reads out the address of the defect stored in the address box 18 and operates the puncher 90 to open a window in the defect display sheet 10. do.
欠陥表示S/−)パンチャ20は、欠陥表示シー)81
を駆動するローフ22.!2B、欠陥表示シー)BIK
I!を開口するためのバンチ84、バンチg4を支持す
る支持部25、支持部26をガイドバーg6上を紙面に
直交する方向に移動させる送シネsps’r、及びパン
チ駆動部28.ローラ駆動部29、送りネジ駆動部80
を具備して構成されている。The defect display S/-) puncher 20 has a defect display S/-) 81
loaf 22. ! 2B, defect indication sheet) BIK
I! A bunch 84 for opening the bunch g4, a support section 25 for supporting the bunch g4, a feed cine sps'r for moving the support section 26 on the guide bar g6 in a direction perpendicular to the plane of the paper, and a punch drive section 28. Roller drive unit 29, feed screw drive unit 80
It is configured with the following.
コントローラ14は読み出された欠陥のアドレスに従っ
て、ローラ駆動部29及び送りネジ駆動部30を作動さ
せて、欠陥表示シート21上の前記欠陥のアドレスに対
応する場所に、バンチ24を正確に位置せしめる。そし
てパンチ駆動部28を作動させて、欠陥表示シート21
に窒を開口する。このようにして検出された欠陥のすべ
てに対応する窓の開口を行う。The controller 14 operates the roller drive unit 29 and the feed screw drive unit 30 in accordance with the address of the defect that has been read out to accurately position the bunch 24 at the location corresponding to the address of the defect on the defect display sheet 21. . Then, the punch drive unit 28 is operated to display the defect display sheet 21.
Open the nitrogen. Windows are opened corresponding to all of the defects thus detected.
第2図の斜視図はこのようKして作成された欠陥表示F
−)21と対応するプリン1基板を示す図で、81は開
口された窓である。欠陥表示シート21及びプリント基
板1にはそれぞれ位置合わせ用のガイドホーfi/82
及び88が設けられている。そこでこのガイドホーμ8
2.88にガイドビン(図示せず)を挿通する等の方法
で、プリント基板l上に位置を正しく合わせて、欠陥表
示シート21を重ねる。The perspective view in Figure 2 shows the defect display F created in this way.
-) This is a diagram showing the printer 1 board corresponding to 21, and 81 is an opened window. The defect display sheet 21 and the printed circuit board 1 each have a guide hole fi/82 for positioning.
and 88 are provided. So this guide hose μ8
2. Place the defect display sheet 21 on top of the printed circuit board 1 by inserting a guide bin (not shown) into the 88, or the like, so that the defect display sheet 21 is properly aligned.
すると第8図に示すように窓31部にプリント基板lの
パターン2の欠陥84が表出する。図では!!81及び
欠陥84をそれぞれ1個のみ示したが、欠陥が2個以上
存在する場合でも欠陥のそれぞれに窓が対応して開口さ
れるので、欠陥表示シート21をかぶせたま−すべての
欠陥を職別でき3す
る。しかも欠陥は上述のように愈p部に表出しているの
で、欠陥表示シート21をかぶせたt〜補修を施こすこ
とができる。Then, as shown in FIG. 8, the defect 84 of the pattern 2 of the printed circuit board 1 is exposed at the window 31. In the diagram! ! Although only one defect 81 and one defect 84 are shown, even if there are two or more defects, a window will be opened corresponding to each defect. I can do 3. Moreover, since the defect is exposed at the edge p as described above, repair can be performed by covering the defect display sheet 21.
以上説明したごとく本発明によりプリント基板の表面に
形成されたパターンの欠陥を欠陥表示シートをかぶせた
ま覧識別し補修することが可能となり、パターンの補習
作業が容易且つ確実となり、プリント基板の信頼度が向
上する。As explained above, the present invention makes it possible to visually identify and repair defects in patterns formed on the surface of printed circuit boards by covering them with defect display sheets, making pattern repair work easy and reliable, and increasing the reliability of printed circuit boards. will improve.
第1図は本発明の一実施例を示すシステム構成図、第2
図、第8図は上記一実施例によシ作成された欠陥表示V
−)を示す斜視図、及び上面図である。
図において、1はプリント基板、2はパターン、18は
アドレスメ壁す、14はコントローラ、20は欠陥表示
シートパンチャ、21は欠陥表示シート、81は窒、3
4は欠陥、Aは欠陥検出手段を示す。
町
法
笛2図Fig. 1 is a system configuration diagram showing one embodiment of the present invention;
8 shows a defect display V created according to the above embodiment.
-) and a top view. In the figure, 1 is a printed circuit board, 2 is a pattern, 18 is an address plate, 14 is a controller, 20 is a defect display sheet puncher, 21 is a defect display sheet, 81 is a nitrogen layer, 3
4 indicates a defect, and A indicates a defect detection means. Town law flute 2
Claims (1)
知する欠陥検出手段と、該検出された欠陥位置アドレス
を格納するアドレスメモリとを具備し、該アドレスメモ
リに格納された欠陥位置アドレスを読み出して、前記検
査対象パターン上における欠陥位置を示す信号を送出す
る欠陥検出装置を用いてプリント基板を検査し、前記欠
陥位置を示す出力信号に従って欠陥位置表示シートに前
記プリント基板のパターンの欠陥に対応する窓を開口す
ることを特徴とする欠陥位置表示方法。Comprising a defect detection means for recognizing a defect in a pattern to be inspected and detecting its position address, and an address memory for storing the detected defect position address, reading out the defect position address stored in the address memory, A printed circuit board is inspected using a defect detection device that sends a signal indicating a defect position on the pattern to be inspected, and a window corresponding to a defect in the pattern of the printed circuit board is displayed on a defect position display sheet according to an output signal indicating the defect position. A defect position display method characterized by opening an opening.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56155340A JPS5855710A (en) | 1981-09-28 | 1981-09-28 | Displaying method for defect position |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56155340A JPS5855710A (en) | 1981-09-28 | 1981-09-28 | Displaying method for defect position |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5855710A true JPS5855710A (en) | 1983-04-02 |
JPH0129255B2 JPH0129255B2 (en) | 1989-06-08 |
Family
ID=15603746
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56155340A Granted JPS5855710A (en) | 1981-09-28 | 1981-09-28 | Displaying method for defect position |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5855710A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6273577U (en) * | 1985-10-24 | 1987-05-11 | ||
CN108549147A (en) * | 2018-04-18 | 2018-09-18 | 卢响锋 | A kind of comprehensive portable circuit board amplifier |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5371563A (en) * | 1976-12-08 | 1978-06-26 | Hitachi Ltd | Automatic inspection correcting method for mask |
JPS541879A (en) * | 1977-06-08 | 1979-01-09 | Fujitsu Ltd | Method of correcting defective pattern |
-
1981
- 1981-09-28 JP JP56155340A patent/JPS5855710A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5371563A (en) * | 1976-12-08 | 1978-06-26 | Hitachi Ltd | Automatic inspection correcting method for mask |
JPS541879A (en) * | 1977-06-08 | 1979-01-09 | Fujitsu Ltd | Method of correcting defective pattern |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6273577U (en) * | 1985-10-24 | 1987-05-11 | ||
CN108549147A (en) * | 2018-04-18 | 2018-09-18 | 卢响锋 | A kind of comprehensive portable circuit board amplifier |
CN108549147B (en) * | 2018-04-18 | 2020-11-24 | 义乌市倩飞科技有限公司 | All-round portable amplifier for circuit board |
Also Published As
Publication number | Publication date |
---|---|
JPH0129255B2 (en) | 1989-06-08 |
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