JPS5854783A - Television receiver - Google Patents

Abstract

PURPOSE:To surely perform clamp operation, by providing a trap circuit at the rear stage of a storage element and attenuating a clock noise of a readout signal. CONSTITUTION:In TV signals of the standard system obtained at a demodulation circuit, a signal which is written in one of analog memories 28, 29 alternately at one horizontal period via one of switching circuits 26, 27 through a low pass filter 24 and an amplifier 25 and another signal which is read out and written in one horizontal period of the standard system, the read out at 1/2 period of one horizontal period and outputted and applied to the memories via the switching circuits 26, 27 again and read out once more at the rest 1/2 period. In the read-out signals, clock noise is attenuated at trap circuits 32 and 33 having the trap frequency equal to the clock frequency, the signal pickup by clamp circuits 34, 35 and gate circuits 36, 37 at the rear stage is surely performed and the signals are summed at an addition circuit 38 and become continuous analog signals.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a television receiver that uses a storage element to convert a standard television signal into a signal having a horizontal scanning frequency n times higher for display.

The current standard television system is NTSCPAL.
, 51iC:AM, etc., but it cannot be said that the resolution of any of them is necessarily sufficient. Especially now that there is a demand for larger screens11, higher resolution broadcasting is required.

Therefore, in the near future, the number of scanning lines will be reduced to twice that of the current standard system.
High-definition broadcasting with a bandwidth of about 6 to 10 times will be implemented. Currently, NHK has 11 scanning lines.
25 lines, brightness bandwidth 20 MHz.

E I A (Electronio Industry
ies AS5ociation (Electronic Industries Association) has a number of runs of 1023 and a brightness bandwidth of 21.1 MH.
Various systems have been proposed, ranging from 1,501 to 1,501 Vi scanning lines and a luminance bandwidth of 50 MHz. During the transitional period of commercialization of these new television systems, so-called compatible television receivers were developed so that the receivers that received signals of these systems could also receive standard television signals. If it becomes a reality, it is thought that it will spread more quickly.

In the recent information age, character displays that display alphanumeric characters and characters as computer terminals,
Demand for graphic displays that display charts, patterns, etc. is increasing. In order to improve the amount of information, these devices have come to be used in which the resolution and number of scanning lines have been increased, and the scanning frequency has been set to about twice that of the standard television system. If these displays are configured to receive standard television signals, they will also be able to receive signals from VTRs and cameras, which will expand the range of applications of the displays, and is expected to be realized.

When trying to create a television receiver that is compatible with compatibility, both the standard system and the new system must share circuits, not only in the signal circuit but also in the deflection circuit, due to the large difference in horizontal scanning frequency. It was difficult to operate the circuit, and it was necessary to switch the circuit using a changeover switch, relay, etc. This not only made the circuit more complex, but also caused problems in terms of reliability since parts with high potential were switched.

Conventionally, conversion devices between systems with different scanning frequencies and
The method used in the conversion method was to match exactly the scanning frequency to be used. Operations were required and the configuration was very complex.

For this reason, a new method was proposed in which the standard television signal was converted into a signal having a horizontal scanning frequency close to that of the new television system and displayed.
It is proposed in No. 41201.

However, in this proposal, when converting a standard format television signal into a signal having a horizontal scanning frequency close to the horizontal scanning frequency of the new television format, the difference between the signal amplitude and DC potential for each horizontal period, that is, the horizontal period This had the disadvantage that horizontal stripes appeared on the screen due to the difference in brightness.

An object of the present invention is to provide a television receiver that can eliminate the conventional drawbacks as described above, and to convert a standard television signal into a signal having a horizontal scanning frequency n times higher using a storage element. In a television receiver that converts and displays a signal, especially regarding the circuit part that converts the signal into a signal having a horizontal scanning frequency that is n times higher, readout of the storage element is performed after the storage element in order to eliminate the signal amplitude and DC potential for each horizontal period. By providing a trap circuit having a trap frequency equal to the clock frequency for attenuating the clock noise superimposed on the read signal output, clamping due to the read clock noise superimposed on the signal output from the memory element is eliminated. This feature is characterized in that it has no effect on operation, ensures clamping operation, eliminates direct current potential for each horizontal period, and eliminates the phenomenon of horizontal stripes on the screen.

EMBODIMENT OF THE INVENTION Hereinafter, the present invention will be described in detail with reference to the drawings showing one embodiment thereof.

FIG. 1 is a block diagram showing its basic configuration, and FIG. 6]-FIG. 2 is a waveform diagram for explaining the principle of signal conversion. In the following embodiment, a case where n=2 will be described.

An NTSC standard video signal is supplied to the input terminal 1. The demodulation circuit 2 is widely used in ordinary television receivers, and converts the video signal into signals corresponding to the three primary colors, such as R, (, B signals or Y, I, Q).
It is demodulated into a signal and supplied to the signal conversion circuit 3. The signal conversion circuit 3 converts the standard television signal as shown in FIG. The signal is converted into a television signal having the following characteristics, and is supplied to the video amplification circuit 4. Then, the picture tube is driven by the amplification l~ in the video amplification circuit 4.

Next, the synchronization separation circuit 5 separates a horizontal synchronization signal, a vertical synchronization signal, etc. from the synchronization signal obtained by the demodulation circuit 2. The vertical synchronization signal is supplied to the vertical deflection circuit 6 to drive the vertical deflection coil. The horizontal synchronization signal is supplied to a PLL (phase locked loop) circuit section. The PLL circuit gft7 generates a clock signal for the signal conversion circuit 3, and also converts the horizontal synchronization signal into a horizontal synchronization signal with twice the frequency. The horizontal synchronization signal converted to twice the frequency is supplied to the horizontal deflection circuit 8 to drive the horizontal deflection coil.

As described above, the standard video signal is converted into signal and scanning frequency and displayed.

In this case, the signal conversion circuit 3 requires signal conversion means for converting the standard format television signal into a television signal having a horizontal scanning frequency twice that of the standard format. For this purpose, charge-coupled devices (CAN) or packet brigade devices are used as storage elements.
It is convenient to use a device (BBD). COD
Especially recently, high-speed models have been announced one after another. Therefore, it is thought that COD that satisfies such performance will soon be supplied in large quantities at low cost.

Generally, the delay time τd of a memory element, for example, CAN, is becomes.

Here, B is the maximum frequency bandwidth that can be sampled,
From the sampling theorem, we have .

Based on the above, examples of the number of bits (N) of a storage element such as a COD and the clock frequency Cfa in signal conversion are shown below.

For example, the COD is 910 bits, and the sampling signal (write signal) is one of the clock signals.
is 4 fsc (fsc is color subcarrier frequency) = 14.
By setting the frequency to 32 MHz (91 of H) (fH is the horizontal scanning frequency), and setting the transfer signal (read signal), which is another one of the clock signals, to afs, = 28.64 MH2 (152 of H), as shown in Figure 2 a, It is possible to convert a standard system television signal into a television signal having a horizontal scanning frequency twice that of the standard system as shown in FIG.

Next, the principle by which horizontal stripes occur due to differences in luminance between horizontal periods will be explained with reference to FIG. 3, which shows the appearance of scanning lines on the screen and signal conversion output waveforms.

Figure 3a shows the raster for each scanning line of the standard signal before signal conversion, b shows the image after signal conversion, and C shows the image after signal conversion to normalize the incrace relationship. Therefore, an image is created in which the (2m)th scanning line is superimposed on the (2m-1)th scanning line (m is an integer of 1 or more) to form a signal arrangement according to interlaced scanning.

The numbers written in the figure indicate the numbers of the scanning lines, and the scanning lines of even and odd fields are indicated by solid lines and broken lines, respectively. Also, there is a in the diagram.

The symbols shown with ``Open'', ``C'', etc. are the signals for each scanning line of the standard system signal before signal conversion shown in a), and the even and odd fields are indicated by the symbol ``A''. ," are added to distinguish them.

FIG. 4 is a block diagram showing an example of the configuration of a COD in means for converting a standard system signal into a signal having twice the horizontal scanning frequency using CAN as a storage element.

The one in FIG. 4a has a standard method in which television signals are simultaneously stored for one horizontal period and sequentially read out at twice the storage speed during a half period between one horizontal period jυ]. second C0
D9.10 and the signals of the next horizontal period are simultaneously stored and read out sequentially during a half period of one water period at twice the speed of storage. 3rd and 4th cenll, 12'ff :
The read output signals from these C0D9 to C0D12 are inputted.
1 calculations w513 to perform signal conversion.

In the case of 1.b, television signals of one horizontal period of the standard system are stored alternately, and read out at twice the storage speed during the 1/2 period between -horizontal 1vj. Second CGD14.
15, and a delay line 16.17 having a delay time of one half of the water period, each connected in series with the CGDI4.15, CCT:) 14.15, delay line 1
The outputs of 6.17 are added in an adder circuit 18 to perform signal conversion. In addition, if the delay line 16,1 is completed, COD
It is preferable to delay the time by 1H/2 using .

In the case of C, TV/con signals of one horizontal period of the standard method are stored alternately, and the 2nd half of the period of one horizontal period is stored.
The first step is to read at twice the speed. a second C0D19.20;
There is a means for switching each output signal read from these C0D19.20s and a standard type input signal every horizontal period using switching circuits 21 and 22, feeding them back to the C0D19.20, and reading them out again. , CCD19.20
The output signals of are added by the adder circuit 23]- to perform signal conversion.

The above three types are possible, but in the case of the COD configuration shown in Figure 4, the signal from the COD is passed through the delay means COD again (since it is delayed by
The amount of read clock noise superimposed on the signal is different between the output signal of 0D14.15 and the output signal of delay lines 16 and 1γ, and the clamping operation in the subsequent stage cannot be performed reliably due to the clock noise, and the clamping voltage is lowered during the horizontal period. will be different.

Similarly, in the case of a COD configuration as shown in FIG.
Read through (7) because C0D19.201
The amount of superimposed read clock noise is different between the 1st read signal and the 2nd 1 read signal,
Since the clamping force at the subsequent stage cannot be reliably performed, the clamping potential differs for each horizontal period as shown in FIG. 4(d).

"This": In a ++IIi image like the one shown in Figure 3C, in which the ink-lace relationship is correctly applied to the signal after signal conversion,
If there is a difference in DC potential and gain in the signals read out from the COD, for example, as shown in Figure 5a, the CCD
There is a DC potential difference of vl [v] between the signal S1 of the first scanning line from No. 19 and the signal S2 of the second scanning line, and CCj
The signal S3. of the 3rd and fourth scanning lines from D20. S4 and the signal S of the first scanning line.

When the DC potentials are equal to ij:, the brightness corresponding to the first and second scanning lines from the CCD 19 is lower than the brightness corresponding to the third and fourth scanning lines from the CCD 20.

When it comes to the next field, 525.52 from CCD19
The brightness corresponding to the 6th scanning line is dark, and the brightness corresponding to the 527th and 528th scanning lines from CCJ) 20 is bright, and the brightness is reversed for each field, so horizontal stripes are created for each field. A phenomenon occurs in which the scanning lines flow upward one by one on the screen. Also, as shown in Figure 4,
There is a difference in signal amplitude of 2 [v] between the signal S of the first scanning line from the CCD 19 and the signal S2 of the second scanning line, and the signal S3 of the 3rd and fourth scanning lines from the CCD 20 differs in signal amplitude.
The same phenomenon as described above occurs even when the signal amplitudes of S4 and the signal S1 of the first scanning line are equal.

FIG. 6 is a block diagram showing an example of the signal conversion circuit 3 used in embodiments of the present invention that eliminates such disadvantages.

The low-pass filter 24°40 in the input/output stage has a signal frequency band of f. /2, smoothing clock spikes, etc., and converting it into a continuous analog signal.The smoothed signal is supplied to the amplifier 25, amplified by the amplifier 26, and then sent to the switching circuit 26. .27. This switching circuit 26.27 reads from the analog memo 1728.29 sent to the COD etc., and reads f:l t, f and the signal.
The standard television signal from the amplifier 25 is switched and supplied to the analog memo 1J28, 29. PLL circuit 7 and flock driver 30.31 are analog memo 1
Create clock pulses for writing and reading data to J28 and J29, and write to analog memory J28 and J29.
to drive. The trap circuits 32 and 33 attenuate the components of the read clock (transfer lock) 28.64 MH2 superimposed on the read output of the analog memory 28 and 29, and connect the clamp circuits 34 and 35 and the gate to l-circuits at the subsequent stage. 3
6°37": This ensures the operation of extracting only the output between the readout lines. The color signals of the game circuits 36 and 37 are supplied to an adder circuit 38 for addition. Then, after being amplified by an amplifier 39, a continuous analog signal is taken out by a low-pass filter 40 and a signal conversion output is obtained.

Next, the detailed operation will be explained using the waveform diagram of FIG. 7. d is a standard television signal obtained by the demodulation circuit 2, and the signal frequency band is f. The signal is supplied to an amplifier 25 through a low-pass filter 24 which limits it to 0.2, and is then supplied to analog memories 28 and 29 through switching circuits 26 and 27. Analog memo IJ
As shown in 28, 29[b, d], when one is in a write operation, the other is in a read operation, and the operation is reversed every horizontal period of the standard television signal. A signal written in one half period of the standard method is read out at twice the speed when written in one half period of the next horizontal period. Therefore, the signal f is read out from the analog memory 28 which indicates the operation in b, and the signal h is read out from the analog memory 29 which indicates the operation in d.

Analog memory 28.29 such as CCD is read once.
The output read from the analog memory 28.29 is sent to the analog memory IJ2s, 2 through the switching circuit 26.27.
g, and the remaining half of the horizontal period of the standard method.
"I will read it again during the period." This switching circuit 2
The terminals 6 and 2 operate to supply a standard type input cable signal from the amplifier 25 to the analog memories 28 and 29 during a write operation of the analog memo IJ 28 and 29, and operate to supply the analog memory 28 and 29 with a standard type input signal from the amplifier 25 during a write operation of the analog memo IJ 28 and 29. It operates to resupply the outputs from IJ 28 , 29 . That is, the analog memory 28
, 29, and is switched every one horizontal period of the standard method.

Therefore, the operation of the analog memory 28 and 29 during the second readout after feeding back to the input is as shown in c and 6, and the readout is performed in the same period as the readout at twice the speed during 1/11tl1 of one half period. Writing is performed at the same speed as the current speed, and reading is performed at the same speed during the 1/2 period between the next one horizontal jυ].

At this time, the output signal from the analog memory 28.29 is a signal on which the readout clock (transfer lock) noise of 28.64 MHz of the analog memory 28.29 is superimposed, so the clamp operation at the subsequent stage is This cannot be done reliably due to the clock noise, and the clamp potential differs for each horizontal period, causing horizontal stripes on the screen as described above.

Therefore, the read clock noise of the analog memory 28, 29 is attenuated by trap circuits 32 and 33 having a trap frequency equal to the frequency of the COD read clock, and the clamp circuit 34, 35 and gate circuit 36, 37 at the subsequent stage are used. The operation of extracting only the signal conversion output during the read period is ensured, and the difference in DC potential between horizontal periods is eliminated. Therefore, gate circuit 36
The signal q is read out from the gate circuit 37, and the signal i is read out from the gate circuit 37.

This signal is supplied to an adder circuit 38, which adds the signal q and 1 to produce a signal representing iK.

Then, after being amplified by an amplifier 39, the signal is extracted as a continuous analog signal by a low-pass filter 40, and a signal conversion output is obtained. This signal conversion output is amplified by a video amplification circuit 4, drives a picture tube, and is displayed on a screen.

In the embodiment of FIG. 5, the analog memory 28°29 is 9
It has 10 bits, and the write clocks φ1 and φ5 (sampling clocks) are 4 f6o = 14.32 M
Hz, read clock φ2. φ4 (transfer lock) is performed at 8fBo-28, 64MH2, and when the output of the analog memo 1J2B, 29 is returned to the input and read out again, the input clock φ5. φ7, read clock φ6, φ8 is 8f8cm28.64M) (
Performed with Z, trap frequency 8f8o = 28.64
The readout clock noise is attenuated by the MHz trap circuit 32, 33, and the subsequent stage clamp circuits 34, 35 and gate circuits 36, 37 ensure that only the output of the readout period is extracted, and the DC current for each horizontal period is It smooths out the difference in rank.

Next, the input signal is converted to 172
A case will be described in which the number of bits of COD and the clock frequency are reduced by using a multiplex mode which performs sampling every cycle and doubles the Zanfling rate. The operation of the analog memory is the same as in the above embodiment, but the analog memory has 455 bits.
The write clock (sampling clock) is 2f8o-7, 16MHz, and the readout clock (transfer lock) is 4f8C = 14.32 MHz.
z, the read clock noise is attenuated by a trap circuit of 4 f6o = 14.32 MHz, and the clamp circuit and gate circuit in the latter stage ensure that only the signal conversion output during the read period is extracted, and the DC current for each horizontal period is Eliminate rank differences.

In the case of signal conversion in the 4'HC multiplex mode, the signal output of the analog memory is output as it is in the clock-modulated signal waveform, so the effect is large.

In the above embodiment, the case of n-2 was explained, but the same applies to other cases.

As described above, the present invention provides a television receiver that uses a storage element to convert a standard television signal into a signal having a horizontal scanning frequency of approximately n times (n is an integer of 2 or more) and displays the signal. A signal for one horizontal period of the standard method is stored, read out n times at n times the speed of storage, and each signal output from the storage element of this storage means is set at a trap frequency equal to the reading clock frequency of the storage element. In addition to the trap circuit that has a trap circuit, it attenuates the read clock noise superimposed on the signal output, clamps the output with a clamp circuit, extracts the signal only during the read period, and adds the output. Since the signal is converted into a television signal with a horizontal scanning frequency n times that of the television signal, it eliminates read clock noise superimposed on the signal output from the storage element and eliminates clamping at the subsequent stage. You can definitely do it.

In addition, the CO function stores signals for one and a half periods of the standard method, and reads them out at twice the speed of storage during one-half period of the horizontal period.
If D, etc. are configured in series, it eliminates the difference in the amount of read clock noise for each horizontal period that occurs when passing through the 211'-' or can twice, and makes clamping at the subsequent stage more reliable. It was possible to do so.

Furthermore, as a storage element mode, the input signal is sampled every 1/2 cycle using a clock with an opposite phase, thereby doubling the sampling rate.
Even when the signal is converted by mode, the signal output from the storage element is output as a clock-modulated signal waveform, but by eliminating this clock component, clamping at the subsequent stage can be made more reliable. Therefore, it is possible to eliminate the difference in DC potential between horizontal periods of the signal conversion output and eliminate the phenomenon of horizontal stripes on the screen, which has great industrial value.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the basic configuration of a television receiver according to an embodiment of the present invention, Fig. 2 is a waveform diagram for explaining its operating principle, and Fig. 3 shows scanning lines on the screen. A front view, FIG. 4 is a block diagram showing the COD configuration of the signal conversion means in the 22"-" image mode, FIG. 5 is a waveform diagram of the signal conversion output, and FIG. 6 is the signal conversion circuit of the same receiver. The block diagram of FIG. 7 is a waveform diagram for explaining its operation. 2... Demodulation circuit, 3... Signal conversion circuit, 7... PLL circuit, 28.29...
Analog memory, 32.33... Trap circuit, 34. ．． 35... Clamp circuit, 36.37.
...Gate N path (extraction circuit), 38...
addition circuit.

Claims (1)

[Claims] storage means for storing signals for one horizontal period of standard format television signals and reading them out n times at n times the storage speed; and each readout signal 11 from the storage element of the storage means.
a trap circuit having a trap frequency equal to the frequency of the read clock of the storage element; a means for attenuating the read clock noise superimposed on the signal output; and a clamp for clamping the output from the trap circuit. means, extraction means for extracting a read period signal from the output from the clamp circuit, and addition means for calculating the output signal from the extraction means,
A television receiver characterized in that the television receiver converts a signal into a television signal having a horizontal scanning frequency n times higher than that of the standard television signal.