JPH0359632B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a double scan receiver capable of eliminating degradation in vertical resolution with a simple circuit configuration.

2. Description of the Related Art Conventionally, double-scanning receivers have been proposed in which the number of scanning lines in one field screen is twice the normal number of scanning lines to obtain high-quality images. In double-scanning receivers using the NTSC system, in order to increase the number of scanning lines in one field screen from the usual 262.5 to 525, conventionally, for example, by alternately writing and reading two field memories, one A method has been proposed in which the signal of 525 scanning lines is obtained in the field. However, this method has the disadvantage that the circuit configuration becomes complex and large-scale. Also, as a simple method,
A method has also been proposed in which the same content is scanned twice using a line memory. However, this method has the disadvantage that the vertical resolution is degraded because two scanning lines with the same content are drawn every two.

SUMMARY OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a double-scanning receiver of this kind, which can perform double-scanning with a relatively simple circuit without deteriorating vertical resolution.

The present invention will be explained below with reference to the drawings.

FIG. 1 shows a typical one-field television screen 1 based on the NTSC system. On screen 1, scanning lines 1, 2, 3, etc. of odd-numbered fields are shown by solid lines.
263 and the even field scan line 263, indicated by a dotted line.
264, 265, . . . 525 are scanned at intervals of d from each other. Fig. 2 shows a double scanning screen 2 according to the present invention, in which 525 scanning lines 1, 1', 2, 2'...263 are scanned in the odd numbered fields, and 525 scanning lines 1, 1', 2, 2'...263 are scanned in the even numbered fields on the one field screen 2. 525 scan lines 263′, 264,
264'...525' are scanned in coincidence with the scan lines of the odd field. In this case, the interval between each scanning line is set to the above-mentioned distance d. Scan lines 1, 2, . . . 525 are substantially equal to the normal scan lines of FIG.
1', 2', . . . 525' are interpolated according to the present invention and are inserted between normal scanning lines. The scanning line signals inserted by the above interpolation are calculated by an interpolation calculation circuit which will be described later. In this case, in the present invention, interpolation is performed only for the Y signal (luminance signal), and for the C signal, the C signal of the previous scanning line is used again. In general, human visual characteristics are such that the band of the C signal is narrower than that of the Y signal, so there is no practical problem in simply interpolating the Y signal. For this purpose, the interpolation calculation circuit performs YC separation from the input composite signal using a comb filter, and calculates data for the Y signal of the scanning line to be interpolated. In addition, in the double scanning method, the horizontal scanning period is half of the normal horizontal scanning period H, that is, H/2.
The scanning speed is doubled. Therefore, the horizontal scanning frequency is twice the normal horizontal scanning frequency _H , that is, _2H .

FIG. 3 shows an embodiment of a circuit for performing double scanning as shown in FIG. 2 above.

In Fig. 3, the signal received by antenna 3 is
After the NTSC television signal is tuned by Tuner4,
The signal is detected by the video detection circuit 5 and a composite video signal _S1 is obtained. This signal _S1 is sent to the A/D converter 7
After being converted into a digital composite video signal _S2 , it is applied to an interpolation signal calculation circuit 8. This arithmetic circuit 8 includes 1H delay circuits 9, 10, -1/4 attenuators 11, 12, 1/2 attenuators 13,
14, 15, -1 attenuator 16 and adder 1
7, 18, 19, etc. constitute two comb filter circuits for YC separation as shown in the figure. That is, delay circuits 9 and 10, attenuator 1
1, 12, 13, 16 and adders 17, 19 constitute a first comb filter circuit, and the Y ₂ signal and the C signal are separated by this first comb filter circuit. Further, the delay circuit 9, attenuators 14, 15, and adder 18 constitute a second comb filter circuit, and the _Y1 signal is separated from this second comb filter circuit. The frequency characteristics of the Y ₁ , Y ₂ , and C signals obtained by the above configuration are expressed by the following equations.

C=-1/4+1/2e ^-j 〓 ^H -1/4e ^-j 〓 ^2H =e ^-j 〓 ^H sin ² (ωH/2) ...... Y ₁ =1/2+1/2e ^-j 〓 ^H =e ^{- j} 〓 ^H/2 cos(ωH/2)
... Y ₂ = e ^-j 〓 ^H - C = e ^-j 〓 ^H cos ² (ωH/2) ... It can be seen that each of the above equations shows the characteristics of a comb filter. Also, as is clear from the phase term in the equation, the equation has a fixed delay amount of 1/2H,
The equation has a fixed amount of delay of H. Since H is the horizontal scanning period of the input composite signal _S2 , the formula represents the brightness signal _Y1 between the current input and the input 1H before, that is, 1/2H before the current time, and the formula It represents the luminance signal _Y2 1H ago. This can be seen in Figure 2, where the _Y1 signal represents the luminance signal of interpolated scan lines 1', 2'...525',
The _Y2 signal will represent the luminance signal of normal scan lines 1, 2, . . . 525. Note that the formula represents the chroma signal C 1H ago. As described above, the interpolation calculation circuit 8 simultaneously calculates and outputs the C signal, the brightness signal _Y2 of the normal scanning line, and the brightness signal _Y1 of the interpolated scanning line.

The C signal is alternately written into the 1H memories 23 and 24 every 1H via the switch circuit 20.
The Y ₂ signal is alternately written to the 1H memories 25 and 26 every 1H through the switch circuit 21, and the Y ₁ signal is alternately written to the 1H memories 27 and 28 through the switch circuit 22 every 1H. In this case, each memory 23 to 28 is written at 1H, and read at 1/2H, which is twice the writing speed. FIG. 4 shows the writing of each memory 23 to 28 in response to the input signal _S2 (represented by W),
The timing of reading (represented by R) is shown. C
The signal memories 23 and 24 are designed so that while one memory is writing, the other memory is read twice. For the memories 25 and 26 of the _Y2 signal, one memory is read once in the first half of 1H when one memory is written. The Y ₁ signal memories 27 and 28 are read once in the latter half of 1H when one memory writes. The signal read out in this way has a horizontal scanning frequency converted to _2H .
In other words, the signal is double-speed converted to 1/2H.
These read signals are sent to the switch circuit 2.
The signal C taken out from the switch circuit 29, which is taken out in the reading order shown in FIG.
Converted to C _A. The Y ₁ and Y ₂ signals sequentially taken out from the switch circuits 30 and 31 are converted by the D/A converter 33 into analog signals Y _A1 and Y _A2 .

These signals C _A , Y _A1 , Y _A2 are sent to the color demodulation circuit 34
and demodulated. As a result, signals having contents of (Y _A2 +C _A ) are demodulated for each of the scanning lines 1, 2...525 in FIG. 2, and the interpolated scanning lines 1',
A signal having a content of (Y _A1 +C _A ) is demodulated for each of 2'...525'.

The above signal C _A is a signal read out twice from the same memory, so if we look at the phase of its subcarrier in correspondence to each scanning line of the double scan screen 2 in Figure 2, we can see the phase in Figure 5. As shown by the solid line, the phase is reversed every two scanning lines. normal
In an NTSC signal, the subcarrier phase is inverted for each scanning line due to frequency interleaving.
Therefore, the phase relationship shown in FIG. 5 does not satisfy the frequency interleave relationship when double scanning is performed, and normal color demodulation cannot be performed as it is.
To solve this problem, for example, in the case of FIG. 5, if the subcarrier phases of scanning lines 1' and 2 are inverted as shown by the dotted lines, the subcarrier phases will be inverted for each scanning line.

For this reason, in the color demodulation circuit 34 according to this embodiment, the signal C _A and this signal C _A are connected to the inverter 3.
A switch circuit 36 is switched to alternately select the signal _A and the signal A inverted at step 5. In order to obtain the switching timing of this switch circuit 36, a horizontal synchronization signal HD ₁ as shown in FIG. 6 is separated from the input signal S ₂ by a synchronization separation circuit 37;
The _2H horizontal synchronization signal HD ₂ shown in FIG. 6 is separated from the signals Y _A1 and Y _A2 by the synchronization separation circuit 38.
Add to EX OR gate (exclusive OR circuit) 39. As a result, the output shown in FIG. 6 is obtained from the EX-OR gate 39, and the flip-flop 40 is triggered by this output. As a result, as shown in FIG.
An output signal that is at a high level is obtained during the period of 1 and during the periods of scanning lines 3' and 4. Therefore, by applying this output signal to the switch circuit 36 to obtain the inverted signal _A during the high level period, a chroma signal consisting of subcarriers having a predetermined phase relationship can be obtained.
C _A , you can get _A.

The signals C _A and _A are applied to a demodulator 41 and also to a burst gate 42 to provide a signal
A burst signal is extracted based on HD ₂ . By driving the subcarrier generation circuit 43 in synchronization with this burst signal, a subcarrier signal of a predetermined phase is obtained. The demodulator 41 performs color demodulation based on the subcarrier signal and the signals C _A and _A , and demodulates the RY and BY color difference signals. This color difference signal is applied to a matrix circuit 44 and matrixed together with the signals Y _A1 and Y _A2 to obtain R, G, and B signals. By applying these signals R, G, and B to the cathode ray tube 45, the double scanning screen shown in FIG. 2 can be obtained.
Incidentally, although the cathode ray tube 45 is not shown, double-speed scanning is performed by a horizontal deflection circuit driven by the signal _HD2 . In FIG. 3, signal HD ₁ is also applied to control circuit 46 to drive it. This control circuit 46 outputs write and read clocks for each memory, switching signals for each switch, and other required control signals at predetermined timings.

In this example, the analog composite signal
Although S ₁ is converted into a digital signal S ₂ and digitally processed in a subsequent circuit, it is of course possible to process the analog signal as it is. In that case, each memory 23 to 28 etc. has CCD, BBD.
Analog memories such as the following are used. Also, the fifth
In the figure and explanation of FIG. 6, scanning lines 1', 2, 3', 4
Although the subcarriers of ... are inverted, scanning line 1,
2', 3, 4', . . . or 2', 3, 4', 5, . . . may be inverted. In short, the subcarriers may be inverted for each scanning line. It is also possible to perform double scanning using interlacing.

According to the embodiments described above, the interpolated scanning line has content that is substantially intermediate between the content of the normal scanning lines before and after it, so that the vertical resolution does not deteriorate. Furthermore, by using a comb-shaped filter, it can be realized with a simpler circuit than the conventional one that uses field memory.

As described above, according to the present invention, it is possible to realize high image quality by double scanning with a relatively simple circuit configuration without causing any deterioration in vertical resolution.

[Brief explanation of drawings]

Figure 1 is a diagram showing the scanning lines of a normal television screen.
FIG. 2 is a diagram showing the scanning lines of a television screen that is double-scanned according to the present invention, FIG. 3 is a circuit diagram showing an embodiment of the present invention, FIG. 4 is a timing chart for writing and reading memory, and FIG. The figure is a waveform diagram showing the phase relationship of the double-scan converted subcarrier to each scanning line, and FIG. 6 is an output waveform diagram of the main part of FIG. 3. In addition, in the symbols used in the drawings, 5...
...Video detection circuit, 8...Interpolation calculation circuit, 23-2
8...1H memory, 45...cathode ray tube.

Claims (1)

[Claims] 1. A composite video signal is input to an interpolation calculation circuit having a comb filter configured with two horizontal delay circuits, and this interpolation calculation circuit is configured to input one of the two horizontal delay circuits. has a circuit for synthesizing input and output signals of horizontal delay circuits, and separates a first luminance signal _Y1 having comb filter characteristics corresponding to a signal position shifted by 1/2 horizontal period from the normal scanning line. It also has a circuit that synthesizes the signals at both ends of the two horizontal delay circuits and the intermediate signal, and generates a second luminance signal _Y2 having comb filter characteristics corresponding to the signal position of the normal scanning line. The separated first luminance signal Y ₁ and the second luminance signal Y 1 are separated.
The first luminance signal Y ₁ and the second luminance signal _{Y 2 which} are separately output from the interpolation circuit are double-speed converted. The first luminance signal is inputted into a circuit and converted into a double scanning frequency, and the first luminance signal is converted into a double scanning frequency.
1. A double-scanning receiver, characterized in that it is configured to alternately select Y ₁ and the second luminance signal Y ₂ and input them to a display device.