JPS5923149B2 - High definition broadcast converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a converter for high definition broadcasting.

Current television broadcasting systems include NTSC) PAL,
There are methods such as SECAM, but none of them can be said to have sufficient resolution.

In particular, there is a demand for higher resolution for Imamachi Broadcasting, which requires larger screens. Therefore, in the near future, high-definition broadcasting will be implemented with the number of scanning lines about 2 to 3 times that of current broadcasting and the bandwidth about 4 to 9 times. During this transitional period, if high-definition receivers were made to be able to receive current standard television broadcasts such as the NTSC system, it would be possible for television to become more widespread. Therefore, the present invention provides a receiver for receiving high-definition broadcasting that has a greater number of scanning lines and a larger bandwidth than the current standard television broadcasting.
The purpose is to make it possible to receive standard television broadcasts.

As an example, the number of scanning lines is 525 of the current NTSC.
Luminance signal bandwidth 20MH with 1050 scanning lines, twice that of a book
Let's consider high-definition broadcasting of Z. An example of detailed specifications is shown in the table below. FIG. 1 shows the relationship between the bands shown in this table.

In order to receive current NTSC broadcasts on a high-definition receiver, time axis compression is required due to scanning time. For this purpose, a charge memory device is used as an analog memory element.
Coupled devices (CCD) and bucketed brigade devices (BBD) are useful. Recently, high-speed CCDs have been announced one after another, and in the laboratory, some that directly store video signals, such as the one shown in FIG. 1, have already appeared. Therefore, it is thought that CCDs satisfying such performance will soon be available in large quantities at low cost. FIG. 2 is a block diagram showing one embodiment of the present invention. In the figure, 1 is a general broadcast receiving antenna, 2 is a tuner, 3 is a video intermediate frequency amplifier,
4 is a detector, 5 and 6 are analog memory elements such as CCD, 7 is a frequency multiplier, and 8? 9 is a low-pass filter for brightness signal extraction; 10 is an addition circuit; 11 is a band amplifier for color signal extraction; 12 is a frequency conversion circuit; 13 is for delaying the synchronization signal to match the burst timing. 14 is a burst gate circuit, 15 is a phase detector, 16 is a variable oscillation circuit that oscillates around 17 MHz, 17 is a 5 frequency divider circuit, and circuits 15, 16, and 17 are phase lock loops. form. 18
High-definition broadcasting receiver having a video signal input terminal, S1
~S4 is a switch that controls the write/read mode.

Next, the operation of the block diagram in FIG. 2 will be explained using FIG. 3.

General broadcasting such as NTSC is received by an antenna 1, tuned by a tuner 2, converted to an intermediate frequency, passed through an intermediate frequency amplification circuit 3, and detected by a detector 4. The signal obtained from the output of the detector 4 is as shown in FIG. 3A.
Up to this point, the circuit is exactly the same as that of a conventional NTSC receiver. Now, consider the case where the switches S1 to S4 are on the a side (the position shown in the figure). The signal detected by the detector 4 is guided to the analog memory 5 via the a terminal of the switch S1. In this case, clock pulses are required to successively transmit incoming analog information to adjacent memory elements. The circuit that generates this clock pulse will be explained. The signal detected by the wave detector 4 is synchronously separated by a synchronous separation circuit 8, and a burst gate pulse is generated from this synchronous signal by a pulse generating circuit 13 using, for example, a monostable multivibrator. The burst gate circuit 14 uses this burst gate pulse to extract a burst signal from the detected signal. The phase detector 15 forms a phase lock loop together with the variable oscillation circuit 16 and the frequency dividing circuit 17. The frequency required for the clock pulse must be at least three times the frequency of the color subcarrier, 3.58 MHz, in order to correctly convey the phase information of the color signal. In this configuration example, as will be described later, the clock pulse generation source is shared with the circuit that creates the frequency for converting the color signal for high-definition broadcasting, that is, the frequency is five times 3.58MHz. The frequency is 3.58×5-17.90MHz.

Therefore, the variable oscillator 16 is one that oscillates around 17.90 MHz, and the frequency divider 17 is used. A clock pulse for driving the analog memory 5 can be obtained by the circuit as described above. One horizontal scanning time of general NTSC is 63.5μs, so 63.5(μs)×17.90(M
Hz)+1137 bit analog memory is required.

Information is transferred to analog memory 5 one after another by clock pulses.
, and when one horizontal period is written, the switches S1 to S4 are switched to the b side (such a technique is well known to those skilled in the art) (see FIG. 3). At this time, the signal detected by the detector 4 is stored in the analog memory 6 via the b terminal of the switch S1. Since the clock pulse of 17.90 MHz is supplied to analog memory 6, analog memory 5
Information for the next horizontal period is stored in the analog memory 6 in the same way as that stored in . On the other hand, since the information stored in the analog memory 5 is given a clock pulse via the doubler circuit 7, the information is 17.05×2 - 34.10
It is read out by the MHZ clock. Therefore, a waveform as shown in FIG. 3 is obtained at the output terminal of the memory 5. At this time, the luminance signal bandwidth is 4.2×2=8.4 MHz, and the color subcarrier is 3.58×2=7.16 MHz.
This signal is supplied to the low pass filter 9 and the band amplifier 11 via the b terminal of the switch S4. The low-pass filter 9 that extracts only the luminance signal has a cutoff frequency of, for example, 6MHz.
Just keep it to a certain level. Next, the signal supplied to the band amplifier 11 is made into a color signal of about 7.16±1 MHz at its output. This color signal is supplied to the frequency conversion circuit 12, and the carrier wave output of the phase lock loop described above is also applied to the frequency conversion circuit 12. The output frequency of the variable oscillation circuit 16 is 17.90MHz, so if the frequency conversion circuit 12 removes both beads, the output frequency is 17.90+(7.16±1.0
)-25.06±1.0 MHz', which corresponds to the color subcarrier of high-definition broadcasting.

However, unless a frequency selection circuit is provided in the frequency conversion circuit 12, it will not be possible to distinguish the difference frequency component between the two.
When the high-definition color signal obtained in this way and the luminance signal obtained from the output of the low-pass filter 9 are added in the adder circuit 10, a composite signal that can be received by the high-definition broadcasting receiver 18 is added. appears at the output of circuit 10. When this signal is introduced to the high-definition broadcast video signal input terminal of the high-definition broadcast receiver 18, general NTSC broadcasting can be received. Although such a configuration may be used, a more excellent embodiment will be described below.

Analog memories 5 and 6 generally have the disadvantage that the original information disappears when read once, but digital memory does not have such a problem. Therefore, the analog signal to be written into the memory is digitized and stored by an A/D converter, and the read signal is again D/A converted and read out. That is, in FIG. 2, an A/D converter is provided before switch S1, a D/A converter is provided after switch S4, and analog memories 5 and 6 are replaced with digital memories. By doing so, the stored signal can be read out twice in succession. If the stored information is read twice, as shown in Figure 3, there will be no blank period each time, and the same signal will exist for two horizontal periods.
When a signal is displayed on the receiver 18, it is possible to overcome the drawback that the brightness is lower than when receiving a high-definition broadcast. In addition, in the luminance signal and chrominance signal separation circuits of the low-pass filter 9 and the band amplifier 11, if a so-called comb filter is configured using a one-horizontal period delay circuit for separation, ideal separation is possible.

In addition, in the configuration example shown in Figure 2, the phase lock loop is set to color 1! l
Although I explained using the frequency of 5 times the carrier wave, analog memory 5
, 6, it is better to separately provide a phase lock loop for generating clock pulses which makes the clock pulse frequency three times that of the color subcarrier as described above.

In this way, the number of bits in analog memories 5 and 6 is 3.
．． 58 x 3 (MHz) x 63.5 (μs) key 682bi
t, which is a significant saving compared to the 1137 bits described above. As described above, the high-definition broadcast converter of the first invention compresses the time axis of the signal by using analog or digital memory, so that it can be easily used by a high-definition broadcast receiver. General N
It is also possible to receive TSC, etc.

Furthermore, since the color subcarrier signal is obtained by frequency conversion using the clock used in the memory for converting the scanning speed, the circuit configuration for generating the color subcarrier is greatly simplified. In particular, if you change the deflection circuit, you will have to change the receiver itself.
If the processing can be performed by processing only the video signal, then all that is required is to connect it to the video input terminal of the receiver using a so-called adapter, which will greatly facilitate handling. In addition, the second invention uses a memory circuit that does not erase the stored information when it is read out, and the information is read out from the memory circuit multiple times. Therefore, the brightness of the screen can be increased, and This has the advantage that writing only needs to be done once, and the configuration for writing is simple.

[Brief explanation of the drawing]

FIG. 1 is a frequency spectrum of high-definition broadcasting, FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. 3 is an explanatory diagram of its operation. 5, 6... Analog memory, 9... Low pass filter, 11... Bandwidth amplifier, 15, 16,
17... Phase lock loop, 18...
High-definition broadcast receiver.

Claims (1)

[Scope of Claims] 1. Two memory circuits that store signals for one horizontal period of a standard television broadcasting signal, and a memory circuit that stores signals for one horizontal period of a standard television broadcasting signal, such that while one of the memory circuits is writing, the other is reading; A time axis for compressing the time axis by driving the memory circuit so that writing is performed using a first clock pulse that corresponds to a standard television broadcasting signal, and reading is performed using a second clock pulse that corresponds to a high-definition broadcasting signal. a compression means; a clock pulse generation means for generating the first and second clock pulses based on a burst signal of a standard television broadcast signal;
A converter for high-definition broadcasting, characterized in that the converter for high-definition broadcasting is configured to frequency-convert the color signal obtained by the time-base compression means using a clock pulse of 1 to convert the color signal into a color signal for high-definition broadcasting. 2. Two memory circuits that store signals for one horizontal period of standard television broadcasting signals, and the stored information does not disappear even if read once, and while one of these memory circuits is writing, the other is reading. The memory circuit is driven so that when writing, the first clock pulse corresponding to the standard television broadcasting signal is used to write, and when reading, the memory circuit is read multiple times using the second clock pulse corresponding to the high-definition broadcasting signal. a time axis compression means for compressing the axis;
a clock pulse generating means for generating the first and second clock pulses based on a burst signal of a standard television broadcasting signal, the color obtained by the time axis compression means using the first or second clock pulse A converter for high-definition broadcasting, characterized in that it is configured to frequency-convert a signal and convert it into a color signal for high-definition broadcasting.