JPS58500424A - 集積回路装置 - Google Patents

集積回路装置

Info

Publication number
JPS58500424A
JPS58500424A JP57501391A JP50139182A JPS58500424A JP S58500424 A JPS58500424 A JP S58500424A JP 57501391 A JP57501391 A JP 57501391A JP 50139182 A JP50139182 A JP 50139182A JP S58500424 A JPS58500424 A JP S58500424A
Authority
JP
Japan
Prior art keywords
register
multiplexer
data
storage
registers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57501391A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0230538B2 (enExample
Inventor
ニユウ・バ−ナ−ド・ジエイムズ
Original Assignee
アドバンスト・マイクロ・ディバイシズ・インコ−ポレ−テッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by アドバンスト・マイクロ・ディバイシズ・インコ−ポレ−テッド filed Critical アドバンスト・マイクロ・ディバイシズ・インコ−ポレ−テッド
Publication of JPS58500424A publication Critical patent/JPS58500424A/ja
Publication of JPH0230538B2 publication Critical patent/JPH0230538B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • G06F7/575—Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7896—Modular architectures, e.g. assembled from a number of identical packages
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3828—Multigauge devices, i.e. capable of handling packed numbers without unpacking them
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/386—Special constructional features
    • G06F2207/3896—Bit slicing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
JP57501391A 1981-03-26 1982-03-18 集積回路装置 Granted JPS58500424A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/247,675 US4393468A (en) 1981-03-26 1981-03-26 Bit slice microprogrammable processor for signal processing applications
US247675 1981-03-26

Publications (2)

Publication Number Publication Date
JPS58500424A true JPS58500424A (ja) 1983-03-17
JPH0230538B2 JPH0230538B2 (enExample) 1990-07-06

Family

ID=22935867

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57501391A Granted JPS58500424A (ja) 1981-03-26 1982-03-18 集積回路装置

Country Status (5)

Country Link
US (1) US4393468A (enExample)
EP (1) EP0075593B1 (enExample)
JP (1) JPS58500424A (enExample)
DE (1) DE3279776D1 (enExample)
WO (1) WO1982003481A1 (enExample)

Families Citing this family (136)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4577282A (en) 1982-02-22 1986-03-18 Texas Instruments Incorporated Microcomputer system for digital signal processing
JPS5922165A (ja) * 1982-07-28 1984-02-04 Nippon Telegr & Teleph Corp <Ntt> アドレス制御回路
US4627026A (en) * 1982-10-21 1986-12-02 I.R.C.A.M. (Institut De Recherche Et De Coordination Accoustique/Misique Digital real-time signal processor
US4528641A (en) * 1982-11-16 1985-07-09 The United States Of America As Represented By The Secretary Of The Air Force Variable radix processor
JPS6054070A (ja) * 1983-09-02 1985-03-28 Nec Corp 演算装置
US4644489A (en) * 1984-02-10 1987-02-17 Prime Computer, Inc. Multi-format binary coded decimal processor with selective output formatting
US4761755A (en) * 1984-07-11 1988-08-02 Prime Computer, Inc. Data processing system and method having an improved arithmetic unit
EP0478006B1 (en) * 1984-08-22 1999-05-12 Hitachi, Ltd. Method and apparatus for searching data
US4742520A (en) * 1984-09-26 1988-05-03 Texas Instruments Incorporated ALU operation: modulo two sum
EP0185215B1 (en) * 1984-11-21 1993-09-22 Harris Corporation Forth-like language microprocessor
US4972314A (en) * 1985-05-20 1990-11-20 Hughes Aircraft Company Data flow signal processor method and apparatus
US4748579A (en) * 1985-08-14 1988-05-31 Gte Laboratories Incorporated Method and circuit for performing discrete transforms
US4779218A (en) * 1985-09-04 1988-10-18 Jauch Jeremy P Complex arithmetic unit
US5165039A (en) * 1986-03-28 1992-11-17 Texas Instruments Incorporated Register file for bit slice processor with simultaneous accessing of plural memory array cells
US4789957A (en) * 1986-03-28 1988-12-06 Texas Instruments Incorporated Status output for a bit slice ALU
US4797848A (en) * 1986-04-18 1989-01-10 Hughes Aircraft Company Pipelined bit-serial Galois Field multiplier
US4766566A (en) * 1986-08-18 1988-08-23 International Business Machines Corp. Performance enhancement scheme for a RISC type VLSI processor using dual execution units for parallel instruction processing
US4760517A (en) * 1986-10-17 1988-07-26 Integrated Device Technology, Inc. Thirty-two bit, bit slice processor
US4811266A (en) * 1986-11-05 1989-03-07 Honeywell Bull Inc. Multifunction arithmetic indicator
US4891754A (en) * 1987-07-02 1990-01-02 General Datacomm Inc. Microinstruction sequencer for instructing arithmetic, logical and data move operations in a conditional manner
US4926355A (en) * 1987-07-02 1990-05-15 General Datacomm, Inc. Digital signal processor architecture with an ALU and a serial processing section operating in parallel
US5047975A (en) * 1987-11-16 1991-09-10 Intel Corporation Dual mode adder circuitry with overflow detection and substitution enabled for a particular mode
US4916651A (en) * 1988-01-29 1990-04-10 Texas Instruments Incorporated Floating point processor architecture
US5303172A (en) * 1988-02-16 1994-04-12 Array Microsystems Pipelined combination and vector signal processor
US5187799A (en) * 1988-05-17 1993-02-16 Calif. Institute Of Technology Arithmetic-stack processor which precalculates external stack address before needed by CPU for building high level language executing computers
US5029079A (en) * 1988-08-04 1991-07-02 Array Microsystems, Inc. Apparatus and method for flexible control of digital signal processing devices
US5155858A (en) * 1988-10-27 1992-10-13 At&T Bell Laboratories Twin-threshold load-sharing system with each processor in a multiprocessor ring adjusting its own assigned task list based on workload threshold
JP2739487B2 (ja) * 1988-12-20 1998-04-15 株式会社日立製作所 描画処理装置及びその描画処理装置を用いた画像表示装置
US5187795A (en) * 1989-01-27 1993-02-16 Hughes Aircraft Company Pipelined signal processor having a plurality of bidirectional configurable parallel ports that are configurable as individual ports or as coupled pair of ports
US4931974A (en) * 1989-01-30 1990-06-05 Integrated Device Technology, Inc. Sixteen-bit programmable pipelined arithmetic logic unit
US6230255B1 (en) 1990-07-06 2001-05-08 Advanced Micro Devices, Inc. Communications processor for voice band telecommunications
US5768613A (en) * 1990-07-06 1998-06-16 Advanced Micro Devices, Inc. Computing apparatus configured for partitioned processing
JPH0594546A (ja) * 1991-02-05 1993-04-16 American Teleph & Telegr Co <Att> デジタルプロセツサ
JP3329921B2 (ja) * 1993-12-27 2002-09-30 株式会社東芝 演算装置
US5541865A (en) * 1993-12-30 1996-07-30 Intel Corporation Method and apparatus for performing a population count operation
EP0661624A1 (en) * 1994-01-04 1995-07-05 Sun Microsystems, Inc. Pseudo-superscalar technique for video processing
US5642306A (en) * 1994-07-27 1997-06-24 Intel Corporation Method and apparatus for a single instruction multiple data early-out zero-skip multiplier
ZA9510127B (en) * 1994-12-01 1996-06-06 Intel Corp Novel processor having shift operations
WO1996017293A1 (en) * 1994-12-01 1996-06-06 Intel Corporation A microprocessor having a multiply operation
US6738793B2 (en) * 1994-12-01 2004-05-18 Intel Corporation Processor capable of executing packed shift operations
US6275834B1 (en) 1994-12-01 2001-08-14 Intel Corporation Apparatus for performing packed shift operations
US5819101A (en) * 1994-12-02 1998-10-06 Intel Corporation Method for packing a plurality of packed data elements in response to a pack instruction
WO1996017291A1 (en) * 1994-12-02 1996-06-06 Intel Corporation Microprocessor with packing operation of composite operands
US5752001A (en) * 1995-06-01 1998-05-12 Intel Corporation Method and apparatus employing Viterbi scoring using SIMD instructions for data recognition
US7301541B2 (en) * 1995-08-16 2007-11-27 Microunity Systems Engineering, Inc. Programmable processor and method with wide operations
US6385634B1 (en) 1995-08-31 2002-05-07 Intel Corporation Method for performing multiply-add operations on packed data
US7395298B2 (en) * 1995-08-31 2008-07-01 Intel Corporation Method and apparatus for performing multiply-add operations on packed data
US5721892A (en) * 1995-08-31 1998-02-24 Intel Corporation Method and apparatus for performing multiply-subtract operations on packed data
US6058408A (en) * 1995-09-05 2000-05-02 Intel Corporation Method and apparatus for multiplying and accumulating complex numbers in a digital filter
US5936872A (en) * 1995-09-05 1999-08-10 Intel Corporation Method and apparatus for storing complex numbers to allow for efficient complex multiplication operations and performing such complex multiplication operations
US6237016B1 (en) 1995-09-05 2001-05-22 Intel Corporation Method and apparatus for multiplying and accumulating data samples and complex coefficients
US5983253A (en) * 1995-09-05 1999-11-09 Intel Corporation Computer system for performing complex digital filters
US6470370B2 (en) 1995-09-05 2002-10-22 Intel Corporation Method and apparatus for multiplying and accumulating complex numbers in a digital filter
US5822459A (en) * 1995-09-28 1998-10-13 Intel Corporation Method for processing wavelet bands
US5984515A (en) * 1995-12-15 1999-11-16 Intel Corporation Computer implemented method for providing a two dimensional rotation of packed data
US5935240A (en) * 1995-12-15 1999-08-10 Intel Corporation Computer implemented method for transferring packed data between register files and memory
US5757432A (en) * 1995-12-18 1998-05-26 Intel Corporation Manipulating video and audio signals using a processor which supports SIMD instructions
US5815421A (en) * 1995-12-18 1998-09-29 Intel Corporation Method for transposing a two-dimensional array
US5835748A (en) * 1995-12-19 1998-11-10 Intel Corporation Method for executing different sets of instructions that cause a processor to perform different data type operations on different physical registers files that logically appear to software as a single aliased register file
US5857096A (en) * 1995-12-19 1999-01-05 Intel Corporation Microarchitecture for implementing an instruction to clear the tags of a stack reference register file
US5940859A (en) 1995-12-19 1999-08-17 Intel Corporation Emptying packed data state during execution of packed data instructions
US6792523B1 (en) * 1995-12-19 2004-09-14 Intel Corporation Processor with instructions that operate on different data types stored in the same single logical register file
US5701508A (en) 1995-12-19 1997-12-23 Intel Corporation Executing different instructions that cause different data type operations to be performed on single logical register file
WO1997024681A1 (en) * 1995-12-19 1997-07-10 Intel Corporation A computer system performing a two-dimensional rotation of packed data representing multimedia information
US5852726A (en) * 1995-12-19 1998-12-22 Intel Corporation Method and apparatus for executing two types of instructions that specify registers of a shared logical register file in a stack and a non-stack referenced manner
US5907842A (en) * 1995-12-20 1999-05-25 Intel Corporation Method of sorting numbers to obtain maxima/minima values with ordering
US6036350A (en) * 1995-12-20 2000-03-14 Intel Corporation Method of sorting signed numbers and solving absolute differences using packed instructions
US5787026A (en) * 1995-12-20 1998-07-28 Intel Corporation Method and apparatus for providing memory access in a processor pipeline
US5742529A (en) * 1995-12-21 1998-04-21 Intel Corporation Method and an apparatus for providing the absolute difference of unsigned values
US5880979A (en) * 1995-12-21 1999-03-09 Intel Corporation System for providing the absolute difference of unsigned values
US5793661A (en) * 1995-12-26 1998-08-11 Intel Corporation Method and apparatus for performing multiply and accumulate operations on packed data
US5983257A (en) * 1995-12-26 1999-11-09 Intel Corporation System for signal processing using multiply-add operations
US5740392A (en) * 1995-12-27 1998-04-14 Intel Corporation Method and apparatus for fast decoding of 00H and OFH mapped instructions
US6092184A (en) * 1995-12-28 2000-07-18 Intel Corporation Parallel processing of pipelined instructions having register dependencies
US5835392A (en) * 1995-12-28 1998-11-10 Intel Corporation Method for performing complex fast fourier transforms (FFT's)
US5764943A (en) * 1995-12-28 1998-06-09 Intel Corporation Data path circuitry for processor having multiple instruction pipelines
US5862067A (en) * 1995-12-29 1999-01-19 Intel Corporation Method and apparatus for providing high numerical accuracy with packed multiply-add or multiply-subtract operations
US5621674A (en) * 1996-02-15 1997-04-15 Intel Corporation Computer implemented method for compressing 24 bit pixels to 16 bit pixels
US6009191A (en) * 1996-02-15 1999-12-28 Intel Corporation Computer implemented method for compressing 48-bit pixels to 16-bit pixels
US5959636A (en) * 1996-02-23 1999-09-28 Intel Corporation Method and apparatus for performing saturation instructions using saturation limit values
US5822232A (en) * 1996-03-01 1998-10-13 Intel Corporation Method for performing box filter
US5831885A (en) * 1996-03-04 1998-11-03 Intel Corporation Computer implemented method for performing division emulation
US6070237A (en) * 1996-03-04 2000-05-30 Intel Corporation Method for performing population counts on packed data types
US5835782A (en) * 1996-03-04 1998-11-10 Intel Corporation Packed/add and packed subtract operations
US6049864A (en) * 1996-08-20 2000-04-11 Intel Corporation Method for scheduling a flag generating instruction and a subsequent instruction by executing the flag generating instruction in a microprocessor
US6009451A (en) * 1996-11-22 1999-12-28 Lucent Technologies Inc. Method for generating barrel shifter result flags directly from input data
US5881279A (en) * 1996-11-25 1999-03-09 Intel Corporation Method and apparatus for handling invalid opcode faults via execution of an event-signaling micro-operation
US6014684A (en) 1997-03-24 2000-01-11 Intel Corporation Method and apparatus for performing N bit by 2*N-1 bit signed multiplication
JP3612186B2 (ja) * 1997-09-19 2005-01-19 株式会社ルネサステクノロジ データ処理装置
US6081824A (en) * 1998-03-05 2000-06-27 Intel Corporation Method and apparatus for fast unsigned integral division
US7392275B2 (en) * 1998-03-31 2008-06-24 Intel Corporation Method and apparatus for performing efficient transformations with horizontal addition and subtraction
US7395302B2 (en) 1998-03-31 2008-07-01 Intel Corporation Method and apparatus for performing horizontal addition and subtraction
US6041404A (en) 1998-03-31 2000-03-21 Intel Corporation Dual function system and method for shuffling packed data elements
US6418529B1 (en) * 1998-03-31 2002-07-09 Intel Corporation Apparatus and method for performing intra-add operation
US6032248A (en) * 1998-04-29 2000-02-29 Atmel Corporation Microcontroller including a single memory module having a data memory sector and a code memory sector and supporting simultaneous read/write access to both sectors
DE69942339D1 (de) * 1998-08-24 2010-06-17 Microunity Systems Eng System mit breiter operandenarchitektur und verfahren
US7932911B2 (en) * 1998-08-24 2011-04-26 Microunity Systems Engineering, Inc. Processor for executing switch and translate instructions requiring wide operands
US7155601B2 (en) * 2001-02-14 2006-12-26 Intel Corporation Multi-element operand sub-portion shuffle instruction execution
US7489779B2 (en) 2001-03-22 2009-02-10 Qstholdings, Llc Hardware implementation of the secure hash standard
US7962716B2 (en) 2001-03-22 2011-06-14 Qst Holdings, Inc. Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements
US7653710B2 (en) 2002-06-25 2010-01-26 Qst Holdings, Llc. Hardware task manager
US6836839B2 (en) 2001-03-22 2004-12-28 Quicksilver Technology, Inc. Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements
US20040133745A1 (en) 2002-10-28 2004-07-08 Quicksilver Technology, Inc. Adaptable datapath for a digital processing system
US7752419B1 (en) 2001-03-22 2010-07-06 Qst Holdings, Llc Method and system for managing hardware resources to implement system functions using an adaptive computing architecture
US7400668B2 (en) 2001-03-22 2008-07-15 Qst Holdings, Llc Method and system for implementing a system acquisition function for use with a communication device
US6577678B2 (en) 2001-05-08 2003-06-10 Quicksilver Technology Method and system for reconfigurable channel coding
US6874079B2 (en) * 2001-07-25 2005-03-29 Quicksilver Technology Adaptive computing engine with dataflow graph based sequencing in reconfigurable mini-matrices of composite functional blocks
US7631025B2 (en) * 2001-10-29 2009-12-08 Intel Corporation Method and apparatus for rearranging data between multiple registers
US7818356B2 (en) 2001-10-29 2010-10-19 Intel Corporation Bitstream buffer manipulation with a SIMD merge instruction
US7739319B2 (en) * 2001-10-29 2010-06-15 Intel Corporation Method and apparatus for parallel table lookup using SIMD instructions
US7430578B2 (en) * 2001-10-29 2008-09-30 Intel Corporation Method and apparatus for performing multiply-add operations on packed byte data
US20040054877A1 (en) 2001-10-29 2004-03-18 Macy William W. Method and apparatus for shuffling data
US7624138B2 (en) 2001-10-29 2009-11-24 Intel Corporation Method and apparatus for efficient integer transform
US7685212B2 (en) * 2001-10-29 2010-03-23 Intel Corporation Fast full search motion estimation with SIMD merge instruction
US7725521B2 (en) * 2001-10-29 2010-05-25 Intel Corporation Method and apparatus for computing matrix transformations
US7046635B2 (en) 2001-11-28 2006-05-16 Quicksilver Technology, Inc. System for authorizing functionality in adaptable hardware devices
US8412915B2 (en) 2001-11-30 2013-04-02 Altera Corporation Apparatus, system and method for configuration of adaptive integrated circuitry having heterogeneous computational elements
US6986021B2 (en) 2001-11-30 2006-01-10 Quick Silver Technology, Inc. Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements
US7602740B2 (en) 2001-12-10 2009-10-13 Qst Holdings, Inc. System for adapting device standards after manufacture
US7215701B2 (en) 2001-12-12 2007-05-08 Sharad Sambhwani Low I/O bandwidth method and system for implementing detection and identification of scrambling codes
US7403981B2 (en) 2002-01-04 2008-07-22 Quicksilver Technology, Inc. Apparatus and method for adaptive multimedia reception and transmission in communication environments
US7493375B2 (en) 2002-04-29 2009-02-17 Qst Holding, Llc Storage and delivery of device features
US7660984B1 (en) 2003-05-13 2010-02-09 Quicksilver Technology Method and system for achieving individualized protected space in an operating system
US7328414B1 (en) 2003-05-13 2008-02-05 Qst Holdings, Llc Method and system for creating and programming an adaptive computing engine
US7047383B2 (en) * 2002-07-11 2006-05-16 Intel Corporation Byte swap operation for a 64 bit operand
US8108656B2 (en) 2002-08-29 2012-01-31 Qst Holdings, Llc Task definition for specifying resource requirements
US7937591B1 (en) 2002-10-25 2011-05-03 Qst Holdings, Llc Method and system for providing a device which can be adapted on an ongoing basis
US7478031B2 (en) 2002-11-07 2009-01-13 Qst Holdings, Llc Method, system and program for developing and scheduling adaptive integrated circuity and corresponding control or configuration information
US8276135B2 (en) 2002-11-07 2012-09-25 Qst Holdings Llc Profiling of software and circuit designs utilizing data operation analyses
US7609297B2 (en) 2003-06-25 2009-10-27 Qst Holdings, Inc. Configurable hardware based digital imaging apparatus
US20050097306A1 (en) * 2003-09-29 2005-05-05 Gajski Daniel D. No-instruction-set-computer processor
DE102004013484B3 (de) * 2004-03-18 2005-08-11 Infineon Technologies Ag Rechenwerk
US8078836B2 (en) 2007-12-30 2011-12-13 Intel Corporation Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a common set of per-lane control bits
WO2011091323A1 (en) 2010-01-21 2011-07-28 Qst Holdings, Llc A method and apparatus for a general-purpose, multiple-core system for implementing stream-based computations
US9785565B2 (en) 2014-06-30 2017-10-10 Microunity Systems Engineering, Inc. System and methods for expandably wide processor instructions
US12112163B2 (en) * 2021-12-03 2024-10-08 Taiwan Semiconductor Manufacturing Company, Ltd. Memory interface

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS516435A (enExample) * 1974-07-04 1976-01-20 Takeda Riken Ind Co Ltd
JPS5162635A (ja) * 1974-10-11 1976-05-31 Takeda Riken Ind Co Ltd Deetaareienzanshorisochi
US4025771A (en) * 1974-03-25 1977-05-24 Hughes Aircraft Company Pipe line high speed signal processor
US4179734A (en) * 1976-07-02 1979-12-18 Floating Point Systems, Inc. Floating point data processor having fast access memory means

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3812470A (en) * 1972-07-31 1974-05-21 Westinghouse Electric Corp Programmable digital signal processor
US3988717A (en) * 1975-08-06 1976-10-26 Litton Systems, Inc. General purpose computer or logic chip and system
US4224676A (en) * 1978-06-30 1980-09-23 Texas Instruments Incorporated Arithmetic logic unit bit-slice with internal distributed iterative control
US4275452A (en) * 1979-11-08 1981-06-23 Rockwell International Corporation Simplified fast fourier transform butterfly arithmetic unit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4025771A (en) * 1974-03-25 1977-05-24 Hughes Aircraft Company Pipe line high speed signal processor
JPS516435A (enExample) * 1974-07-04 1976-01-20 Takeda Riken Ind Co Ltd
JPS5162635A (ja) * 1974-10-11 1976-05-31 Takeda Riken Ind Co Ltd Deetaareienzanshorisochi
US4179734A (en) * 1976-07-02 1979-12-18 Floating Point Systems, Inc. Floating point data processor having fast access memory means

Also Published As

Publication number Publication date
EP0075593A1 (en) 1983-04-06
EP0075593B1 (en) 1989-06-21
WO1982003481A1 (en) 1982-10-14
EP0075593A4 (en) 1986-02-13
DE3279776D1 (en) 1989-07-27
US4393468A (en) 1983-07-12
JPH0230538B2 (enExample) 1990-07-06

Similar Documents

Publication Publication Date Title
JPS58500424A (ja) 集積回路装置
US5226171A (en) Parallel vector processing system for individual and broadcast distribution of operands and control information
US4228498A (en) Multibus processor for increasing execution speed using a pipeline effect
US5081573A (en) Parallel processing system
US3787673A (en) Pipelined high speed arithmetic unit
US5175863A (en) Signal data processing system having independently, simultaneously operable alu and macu
US6202197B1 (en) Programmable digital signal processor integrated circuit device and method for designing custom circuits from same
Iseli et al. Spyder: A reconfigurable VLIW processor using FPGAs
EP0127508A2 (en) Full floating point vector processor
JPS58169663A (ja) アレイプロセツサ装置
EP0031889A1 (en) Processor on a single semiconductor substrate
JP2950703B2 (ja) 高速フーリエ変換用ディジット反転のためのアドレス発生器及び反転フィールドシーケンス発生器並びにディジット反転シーケンス信号発生方法
CN111353126A (zh) 分块矩阵乘法运算系统
US3515344A (en) Apparatus for accumulating the sum of a plurality of operands
JPH01309173A (ja) デジタルデータのアレイを処理する集積回路およびデジタル信号群のブロツクに対して高速フーリエ変換を行う方法
US4155118A (en) Organization for an integrated circuit calculator/controller
JPH02504682A (ja) 変換処理回路
US5029079A (en) Apparatus and method for flexible control of digital signal processing devices
EP0395240A2 (en) High speed numerical processor
JP2006099719A (ja) 処理装置
JPS63147255A (ja) 複数の直列接続段を有する計算用プロセッサおよびこのプロセッサを応用したコンピュータならびに計算方法
EP3232321A1 (en) Signal processing apparatus with register file having dual two-dimensional register banks
WO1990000287A1 (en) Intelligent floating-point memory
CA1106978A (en) Simple flexible indexing method for ros storage microcomputers
JPH1063647A (ja) 行列演算装置