JPS5850037A - Communication controller - Google Patents

Abstract

PURPOSE:To reduce the load of a processor, by discriminating the data transmitting or receiving operation state of a device directly in the processor to make it possible that the processor receives data independently of a storage register in a communication controller. CONSTITUTION:A communication controller 1 is provided with a transmitting state indicating terminal 11, a transmission instructing terminal 13, a receiving state indicating terminal 17, a reception instructing terminal 19, and a stop instructing terminal 21, and a controlling part 14 is connected to these terminals through holding circuits 12, 15, 18, 20, and 22. Information indicating whether the transmission is performed or not and information indicating whether the data reception is performed or not are outputted from the controlling part 14 to an upper processor 2 through terminals 11 and 17. Transmission and reception instructions from the processor 2 are received through terminals 13 and 19 by the controller 1, and the indication of the data transmission or reception signal is ignored to transmit data to the processor or receive data from the processor unless the transmission or reception is performed, and thus, the load of the processor 2 is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a communication control device that shares communication control with a host processor in a data communication system.

A conventional communication control device of this kind employs, for example, a bottle connection configuration as shown in FIG. Instructs the communication control device 1, which had a read instruction terminal 4, a bidirectional data bus 5 for transmitting and receiving transmission/reception data and transmission/reception instruction contents to and from the host processor 2, and a register designation terminal 7, to transmit data. In this case, the host processor 2 sets the control information necessary for startup in the main memory 6, and selects and specifies the corresponding register (for transmission) of the write register 8 to be stored in the communication control device 1 from the register specification terminal 7. . Then, when the activation instruction terminal 3 is turned on, activation control information is input to the corresponding register of the write register 8 via the data bus 5, and the communication control device 1 analyzes this input data and performs the corresponding operation. Execute.

In order to instruct data reception, start control information is set in the main memory 6, and the corresponding register (for reception) of the write register 8 is selected and designated using the register designation terminal. Thereafter, when the activation instruction terminal 5 is turned on, activation control information is input to the corresponding register of the write register 8 via the data bus 5, and the communication control device 1 analyzes this input data and performs the corresponding operation. Execute.

In addition, in order for the host processor 2 to know the transmission or reception operation status of the communication control device 1 prior to a transmission instruction or reception instruction, it selects and specifies the corresponding register from the readout register 9 in the communication control device 1 and instructs the readout instruction. In order to turn on the terminal 4, it is necessary to input information indicating the state into the main memo 9.6 via the data bus 5.

In this way, in conventional devices, when instructing to start transmission or reception, it is necessary to specify the host processor 2, and when identifying the transmission or reception operation status, it is necessary to specify the It was necessary to specify the register with the register in mind.

Therefore, there is a drawback that the processing load on the host processor 2 increases.

The present invention provides a tortoise shell which improves these conventional drawbacks.
The purpose of this is to enable the processor to directly identify the operating state of the device while it is transmitting or receiving data, and to enable the upper-level processor to send and receive data to and from the communication control device without being aware of the storage registers. , and to be able to stop the transmission operation as necessary.

Examples will be described in detail below.

FIG. 2 is a block diagram of the main parts of the device according to the embodiment of the present invention. The same reference numerals as in FIG. ,2
0.22 is a holding circuit, 15 is a transmission instruction terminal, 14 is an expansion control unit, 16 is a buffer memory, 17 is a reception activation display terminal, 19 is a reception instruction terminal, and 21 is a stop instruction terminal.

The communication control device 1 of this embodiment has a trigger transmission activation display terminal 11.
．． Transmission instruction terminal 15. Reception activation empty display terminal 17° Reception instruction terminal 19. The holding circuits 12, 15, 18. Information indicating whether the transmission activation empty display terminal 11. It is output to the host processor via the reception activation display terminal 17. Further, data transmission instructions and data reception instructions from the upper processor are sent to the transmission instruction terminal 15. receiving and transmitting data via the reception instruction terminal 19;
During reception, the command is ignored and data is sent.When data transmission is not started, the data transmission stop command is received from the upper professional Ryutsusa via the stop command terminal, and data transmission is started. Upon receiving the transmission instruction, an operation is performed to stop the transparent molding operation. The details of the operation will be described below.

When the upper processor 2 activates transmission on the communication control device 1, the upper processor 2 sets activation control information in the information storage area 1o of the main peak ψ6. 11 is the holding circuit 1
When the processor 2 is connected to the transmitter 2 and turned on by input from the transmission instruction terminal 15, the processor 2 is set to the 7 state by an instruction from the control unit 14 in the communication control device 1. As a result of reading the state of the activation idle display terminal 11, if it indicates an OFF state, it means that the communication control device 1 has started transmitting and is not executing the chair transmitting operation.
) It is possible to activate the second processor transmission.

When the host processor 2 activates the transmission instruction terminal 15, the holding circuit 15 connected to the transmission instruction terminal 13 and the holding circuit 12 connected to the transmission activation empty display terminal 11 are turned on. When the holding circuit 150 is turned on, the holding circuit 15 is turned off, and activation control information is transferred from the information storage area 10 of the main memory 6) to the buffer register 16 in the communication control device 1 via the data bus 5. Then, the control unit 14 analyzes the captured information and performs a transmission operation based on the instruction content. When the transmission operation is completed, the control section 14 turns off the holding circuit 12 and waits for the next transmission activation to take place.

Note that when the transmission activation empty display terminal 11 indicates the on state, the host processor 2 waits for transmission activity until the display terminal 11 indicates the off state, but in this state, the transmission instruction terminal 13 is activated. In this case, the control unit 14 controls the holding circuit 1
5, the transmission activation is detected, but since the transmission activation is already in progress, this transmission activation is discarded.

) When the processor 2 activates the communication control device 1 for reception, the operation up to writing the activation control information into the main memory 60 information storage area 10 is the same as in the case of the transmission activation. When the reception operation is not performed, the reception activation empty display terminal 17 is connected to the holding circuit 18.
Therefore, if the host processor 2 detects this off state, it can activate the communication control device 1 for reception.

When the upper processor 2 activates the reception instruction terminal 19, the holding circuit 20 connected to the reception instruction terminal 19 and the holding circuit 18 connected to the reception activation empty display terminal 17 remain on. When the control unit 14 accepts the on-state of the holding circuit 20, it turns off the holding circuit 20 and also transfers information from the information storage area 10 on the main memory 6 to the data bus 5.
The control section 14 takes in the startup information into the buffer register 16 via the buffer register 16, analyzes the taken-in information, and executes a receiving operation based on the instruction contents. When the reception operation is completed, the control unit 14 turns off the holding circuit 1B and waits for the reception of the next reception activation.

The above operation has been described for the case where the host processor 2 starts up the communication control device 1 after checking the start-up operation state, but after starting up the communication control device 1 without first checking the start-up state, Terminal 11 for displaying whether the reception is enabled or not, or whether or not an operation can be executed. Receive activation display terminal 17
However, it is also possible to respond to the case where the condition code is returned to the processor t2. When starting the transmission, it is best to keep the holding circuit 12 in the off state until the on state of the control unit 14 expansion holding circuit 15 is identified.
Activation receivers can be displayed as available.

Furthermore, when the processor 2 turns on the stop instruction terminal 21 of the communication control device 1, the holding circuit 22 connected to it
turns on. When the control unit 14 is in the on state, it stops the transmission operation. This is useful for data that is currently being sent.If data that needs to be sent urgently occurs, or if the data that has been received so far is no longer needed on the data receiving side, unnecessary processing operations on the sending side will be stopped. can be done.

As can be seen from the explanation below, according to the present invention, the operating status of the multi-communication control device is displayed on the transmission activation empty display terminal and the reception activation empty display terminal, and the transmission activation terminal is used as an instruction terminal. Since two types, one for reception and one for reception, are prepared, there is no need to give instructions for reception and transmission while being aware of the write register as in the past, and the operating state can be easily detected. That is, since the processor communication control device can be activated without consciously specifying a write register, there is an advantage that the processing load on the upper processor can be reduced.

In addition, when instructing the communication control device to send and receive data, it is possible to handle either a method in which the operation status of the communication control device is checked and then executed, or a method in which a condition code is returned to the upper processor after the startup instruction. It is also applicable to systems that adopt Furthermore, the activation instruction terminals are provided separately for transmission and reception, and can be activated independently, so that full-duplex transmission and reception communication is possible. Furthermore, since the transmission operation can be stopped at any time, there is an advantage that urgent data can be transmitted with priority without waiting time.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of a conventional communication control device, and FIG. 1 is a communication control device, 2 is a high-level processor, 10 is a company information storage area, 11 is a transmission activation empty display terminal, 12.15.1
8, 20.22 is a holding circuit, 15 is a transmission instruction terminal, 1
4 is a control unit, 16 is a buffer memory, 17 is a reception activation empty display terminal, 19 is a reception instruction terminal, and 21 is a stop instruction terminal. Patent applicant Nippon Telegraph and Telephone Public Corporation Patent attorney Gobe Tamamushi and 5 others

Claims (1)

[Claims] In a communication control device that shares communication control in a data communication system with a higher-level processor based on activation control information given from a higher-level processor, a transmission activation empty display terminal is used to display information indicating whether or not data transmission is activated. means for outputting information indicating whether or not data reception is activated to the upper processor via the reception activation display terminal; and means for transmitting data transmission instructions from the upper processor. A means for receiving the data transmission instruction via the instruction terminal and ignoring the transmission instruction during data transmission activation, and accepting the transmission instruction from the line other than the data transmission activation, and receiving the data reception instruction from the host processor via the reception instruction terminal. When data reception is started, the reception instruction is ignored, and while data reception is started, the reception instruction is ignored, and the data transmission stop instruction from the upper processor is received via the stop instruction terminal and data transmission is performed. 1. A communication control device comprising means for accepting the transmission instruction and stopping the transmission operation when the communication control device is activated.