JPS5850025B2 - Hand tie sochi Oyobisono Seizouhouhou - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the formation of electrode wiring for semiconductor devices.

In semiconductor devices, especially integrated circuits, photoetching is mainly used in the process of forming electrode wiring.

That is, after the semiconductor element region is formed, a window for forming an electrode is formed in the oxide film, and a metal film for electrode wiring, such as aluminum, is deposited.

Next, a predetermined pattern is formed through normal photoprocessing, that is, photoresist coating, prebaking, exposure, development, etc., and the exposed aluminum is etched in an appropriate etching solution using the photoresist film as a protector. When the photoresist film is finally removed, the electrode wiring formation process is completed.

In such conventional methods, if the step in the oxide film is large or the step is sharp (large taper), there are many accidents where the aluminum is cut at the step and the wire breaks, which reduces the yield. This is the cause of a significant decline.

In addition, in the case of multilayer wiring, when the first layer of electrode wiring is formed by photoetching, for example, in the case of aluminum wiring, the cross section of the step part is almost at right angles, so it is then covered with 5i02 by vapor phase epitaxy. If the aluminum wiring layer is deposited to form the first and second insulating layers, and then the second layer of aluminum wiring is photoetched again, disconnections will occur at the stepped portions of the first wiring layer, resulting in a significant decrease in yield.

Further, defects such as pinholes due to dust peculiar to vapor phase growth frequently occur in the insulating layer 5102 between the wiring layers, which short-circuits the first layer and the second layer and becomes one of the factors that significantly deteriorates the yield.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device having electrode wiring and multilayer wiring, which is performed through a simpler process than the conventional method and which does not cause disconnection or short circuit between layers.

In one embodiment of the present invention, a semiconductor element is formed on a flat surface of a semiconductor substrate, and after an insulating film is selectively formed on the semiconductor element in areas other than the parts leading out from the electrodes, the parts leading out from the electrodes are selectively formed. The method is characterized in that an organic film is selectively formed on the entire surface except for the organic film, and then ion implantation treatment is performed on the entire surface including the organic film to such an extent that the organic film is hardened, and then electrode wiring is formed.

In another embodiment of the present invention, a semiconductor element is formed on a flat surface of a semiconductor device, an insulating film is selectively formed on the part other than the portion leading out from the electrode of the semiconductor element, and a first layer is formed on the insulating film. After the metal electrode wiring is formed, an organic film is selectively formed on the entire surface except for the part for connecting the first layer of metal electrode wiring and the second layer of metal electrode wiring that will be formed next. The method is characterized in that a second layer of metal electrode wiring is formed after using an organic film, which has been subjected to ion implantation treatment to such an extent that the organic film is hardened, as an insulating layer between multilayer wirings on the entire surface including the organic film.

Further, the semiconductor device of the present invention is characterized by having a single-layer wiring structure and a double-layer wiring structure formed by the above-mentioned manufacturing method, as well as a multi-layer wiring structure formed by repeating the same process.

In this way, the present invention is an organic film cured by ion implantation.

A film hardened by ion implantation is converted into a different substance from a film hardened by heating.

In other words, since the organic film cured by ion implantation is a film with excellent heat resistance, mechanical strength, adhesion, chemical resistance, etc., the present invention aims to provide a particularly preferable semiconductor device and its manufacturing method. Become.

The present invention will be explained in detail below using the drawings.

FIGS. 1a, b, c, d, e, ftg are cross-sectional views showing the manufacturing process of a conventional semiconductor device.

That is, a shows a state in which semiconductor element regions 2 and 3 are formed on a semiconductor substrate 1 by a known selective diffusion method, and then windows for forming electrodes are opened in an oxide film 4 by a photoetching method. .

Next, as shown in b, a metal 5 such as aluminum is deposited by vacuum evaporation or the like, and then, as shown in c, a photoresist film 6 is selectively formed through a normal photo process.

Next, the exposed aluminum layer is etched using the photoresist film 6 as a protector, and then the photoresist film 6 is etched.
Once removed, the process of forming the metal electrode wiring is completed, as shown in d.

After that, alloying of metal and silicon is performed at an appropriate temperature, and then 5i02 is selectively formed as a protective film by vapor phase growth or the like in areas other than the bonding pad portion, and the entire process is usually completed.

If multilayer wiring is to be performed after this, as shown in e, after forming 5iO24' on the entire surface by vapor phase growth, etc., a layer is formed to connect the first metal wiring layer and the second metal wiring layer. A photoresist film 6 is selectively formed on other parts of the photoresist film 6 through a normal photo process, the exposed SiO2 is etched using the photoresist film as a protector, and then the photoresist film is removed, resulting in the result shown in f.

Thereafter, the second metal wiring layer 5' is formed through the same steps b-d, and the multilayer wiring formation process is completed as shown in g.

After this, heat treatment is usually performed under appropriate conditions to complete the entire process.

In such a conventional method, if the oxide film 40 has a large step difference, or if the taper of the step portion is approximately perpendicular, disconnections often occur in the metal wiring layer 5 made of aluminum or the like above.

Further, when multilayer wiring is used, accidents often occur in which the second wiring layer 5' is disconnected on the first wiring layer 5.

This tendency is particularly noticeable when aluminum is used as the wiring layer.

Further, since the S i 024', which serves as an insulating layer between wiring layers, is deposited by a vapor phase epitaxy method, dust peculiar to the vapor phase epitaxy method is attached.

That is, 5i02 or 5ix attached to the wall of the reaction tube
Oy falls and adheres to the substrate, causing many pinholes in 5iO24' during the photoetching process, significantly reducing the yield.

In the present invention, the above-mentioned drawbacks are eliminated.

That is, FIGS. 2A, B, and C2D are cross-sectional views showing the first embodiment of the present invention.

That is, FIG. 2A shows a semiconductor element region 2 on a semiconductor substrate 1.
, 3 are formed by a well-known selective diffusion method, and a window for forming an electrode is formed in the oxide film 4 by a photoetching method, and then the photocyst film 6 is selected on a portion other than the part to become an electrode through normal photoflossing again. It shows the state when it was formed.

Here, the coating 6 is not limited to photoresist, but any other organic coating may be used, but it is best to use photoresist in terms of easily forming the coating selectively on areas other than the electrode portions.

That is, photoresists used in the manufacture of semiconductor devices are mainly composed of polymers.

In the case of negative types, for example, KMER (manufactured by Kodak, USA), 0MR83 (manufactured by Tokyo Ohka Kogyo Co., Ltd.), etc. have 1,4-cis polyisoprene as the main component; ) etc. have polyvinyl cinnamate as the main component.

In the case of positive types, for example, AZ-111 (manufactured by Shipley, Inc., USA), 0FPR (manufactured by Tokyo Ohka Kogyo Co., Ltd.), etc. have novolak resin as the main component.

Next, as shown in B, various ions 8 are implanted into the entire surface including the photoresist film 6 at a high concentration to harden the photoresist film.

At this time, if the amount of various ions implanted into the photoresist film 6 is increased, for example, when approximately 1016/cd of 31p+ is implanted, the photoresist film becomes in a hardened state, which is completely different from the properties of conventional photoresist films. It is converted into a different material, and its properties such as mechanical strength, heat resistance, and adhesion to the underlying substrate are dramatically improved.

It also has good insulation properties. Similar phenomena were observed not only in photoresists but also in other organic films.

Next, as shown in C, a metal 5 such as aluminum is deposited by a vacuum evaporation method or the like, and a photoresist film is selectively formed again. After etching, the step of forming the aluminum electrode wiring 5 is completed as shown in D.

Thereafter, an alloying process of aluminum and silicon is performed at an appropriate temperature, and then a protective film such as 5i02 is formed by vapor phase growth on the portions excluding the bonding pad portions, and the entire process is completed.

In this way, in the present invention, as shown in the second diagram, the stepped portion is smoothly covered with the organic film 6' subjected to ion implantation treatment, so that the metal wiring 5 made of aluminum or the like is covered with the oxide film 40 as in the conventional case. There will be no disconnection at the stepped part.

In addition, in the structure shown in A, when forming the window by photoetching in the process of opening the window for electrode formation, the photoresist film is left as it is after etching, and the photoresist film is removed by appropriate heat treatment. By doing so, a similar structure can be obtained and the process can be shortened.

Next, a second embodiment of the present invention is shown in FIGS. 3E, F, and G.

In other words, E shows a state in which, after forming the first electrode wiring layer 5 by the usual method, a photoresist film 6 is selectively formed in areas other than those for connecting the first and second wiring layers. .

Next, as shown in F, various ions 8 are implanted at a high concentration into the entire surface including the photoresist film 6.

The photoresist film 6' that has been hardened by this high concentration ion implantation process is used as an insulating layer between the first and second layers.

Next, as shown in G, the second wiring layer 5 of aluminum etc.
' is formed by a normal photoetching method, and the process of forming the multilayer wiring is completed.

After this, the entire process is completed by heat treatment under appropriate conditions.

It goes without saying that multilayer wiring of two or more layers can be achieved by repeating the steps described above.

In this embodiment, as shown in FIG. 3G, the insulation between the first and second metal wiring layers 5 and q is performed by an organic film 6' that has been hardened by ion implantation. This is completely different from the conventional method, as it does not use SiO2 produced by vapor phase growth and does not require etching, as in the conventional method, so defects such as pinholes can be minimized, and therefore wiring Interlayer short circuits are significantly reduced.

In addition, in the step formed on the semiconductor substrate in the process of forming the element, and in the step of the first metal wiring layer,
Since it is smoothly covered with the photoresist film 6' which has been subjected to ion implantation treatment, the second metal wiring layer 5' will not be disconnected at the above-mentioned portion.

Note that in the second embodiment, as shown in the first embodiment, an ion-implanted organic film 6' may also be provided between the first wiring layer 5 and the oxide film 4. It is.

Ions such as 40Ar+ and 31p+ can be used in the present invention.

For example, an organic film (O8R negative photoresist) with 4
Q A r+ is 1015 to 1 at an accelerating voltage of 170 KeV
016 (Ion/cyyD) After ion implantation, no decrease in film thickness was observed even after heat treatment at 100° C. or higher for 15 minutes in a N2 gas atmosphere.

On the other hand, in the case of O8R negative photoresist without ion implantation, the film thickness decreases from around 200°C.

This shows that the heat resistance of the organic film is dramatically improved by the ion implantation.

Furthermore, when the ion dose is changed, the mechanical strength and adhesion of the organic film increase to 3X1015 (ions/cr).
A) In the above, the scratch strength is significantly improved, and for example, the scratch strength is comparable to that of chromium oxide (Crx, Oy).

Furthermore, the above ions are added at 1×1015 (ions/cry)
The photoresist used in this case was immersed in a 49% hydrofluoric acid aqueous solution, but the photoresist pattern did not peel off from the substrate or deform.

On the other hand, photoresist that has not been subjected to ion implantation treatment is attacked by the aqueous solution.

As described above, the organic film according to the present invention has significantly improved chemical resistance and adhesion.

In the present invention, as explained in the first and second embodiments, an organic film hardened by high concentration ion implantation is used to prevent disconnection of the metal electrode wiring layer, and It is completely different from conventional methods and has novelty in that it is used for insulation between wiring layers in a multilayer wiring structure.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing a conventional manufacturing process of a semiconductor device, FIG. 2 is a cross-sectional view showing one embodiment of the present invention, and FIG. 3 is a cross-sectional view showing another embodiment of the present invention. 1: Semiconductor substrate, 2, 3: Semiconductor element region, 4: Dioxide film, 5: Metal, 6: Niphotoresist film.

Claims (1)

[Scope of Claims] 1. A semiconductor substrate, an insulating film selectively formed on a flat surface of the semiconductor substrate, an organic coating formed on the entire surface except for the electrode lead-out portion and hardened by ion implantation, A semiconductor device comprising a metal wiring layer formed on a film. 2. A semiconductor substrate, an insulating film selectively formed on a flat surface of the semiconductor substrate, a first metal wiring layer selectively formed on the insulating film, and a first metal wiring layer selectively formed on the insulating film and the first A semiconductor device comprising: an organic film formed on a metal wiring layer and hardened by ion implantation; and a second metal wiring layer selectively formed on the organic film. 3. A semiconductor element is formed on a flat surface of a semiconductor substrate, an insulating film is selectively formed on the part of the semiconductor element other than the part leading out from the electrode, and an organic film is formed on the insulating film except for the part leading out from the electrode. 1. A method for manufacturing a semiconductor device, which comprises selectively forming an organic film, then performing ion implantation treatment on the entire surface including the after-drilled organic film to such an extent that the organic film is hardened, and then performing predetermined electrode wiring. 4. Forming a semiconductor element on a flat surface of the semiconductor device, forming an insulating film selectively in areas other than the portions leading out from the electrodes of the semiconductor element, forming a first metal electrode wiring thereon, and An organic film is selectively formed on the entire surface except for the part connecting the first metal electrode wiring and the second metal electrode wiring that will be formed next, and then the organic film is cured on the entire surface including the organic film. A method for manufacturing a semiconductor device, characterized in that the second metal electrode wiring is formed after performing an ion implantation treatment to such an extent that the organic film subjected to the ion implantation treatment is used as an insulating layer between multilayer wirings. .