JPS5848097U - memory package - Google Patents

memory package

Info

Publication number
JPS5848097U
JPS5848097U JP14043481U JP14043481U JPS5848097U JP S5848097 U JPS5848097 U JP S5848097U JP 14043481 U JP14043481 U JP 14043481U JP 14043481 U JP14043481 U JP 14043481U JP S5848097 U JPS5848097 U JP S5848097U
Authority
JP
Japan
Prior art keywords
memory
memory package
lsi
configuring
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14043481U
Other languages
Japanese (ja)
Inventor
桜井　仁一
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP14043481U priority Critical patent/JPS5848097U/en
Publication of JPS5848097U publication Critical patent/JPS5848097U/en
Pending legal-status Critical Current

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  • Static Random-Access Memory (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

１　　　第１図、第２図は従来のメモリプリント板の説
明図、第３図、第４図は本考案によるメモリパツパ　ケ
ージの説明図、第５図はメモリモジュールの説明図、第
６図は保護機をつけたメモリモジュールの説明図である
。 １・・・メモリプリント板、４・・・メモリモジュール
。1. Figures 1 and 2 are explanatory diagrams of a conventional memory printed board, Figures 3 and 4 are explanatory diagrams of a memory package according to the present invention, Figure 5 is an explanatory diagram of a memory module, and Figure 6 is an explanatory diagram of a protected memory module. FIG. 2 is an explanatory diagram of a memory module equipped with a memory module. 1...Memory printed board, 4...Memory module.

Claims (1)

【実用新案登録請求の範囲】 ｌ　　ＬＳＩメモリを使用するメモリパッケージを構成
する場合、ＬＳＩメモリ部と、その他の周辺回路に分け
て構成し、前者を後者にコネクタにより結合、一体化し
たことを特徴とするメモリパッケージ。 ２　実用新案登録請求の範囲第１項において、ＬＳＩメ
モリ部を保護材でおおったことを特徴とするメモリパッ
ケージ。[Claims for Utility Model Registration] l When configuring a memory package using LSI memory, it is characterized by configuring the LSI memory part and other peripheral circuits separately, and integrating the former by connecting them to the latter by a connector. memory package. 2. A memory package according to claim 1 of the utility model registration, characterized in that an LSI memory section is covered with a protective material.
JP14043481U 1981-09-24 1981-09-24 memory package Pending JPS5848097U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14043481U JPS5848097U (en) 1981-09-24 1981-09-24 memory package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14043481U JPS5848097U (en) 1981-09-24 1981-09-24 memory package

Publications (1)

Publication Number Publication Date
JPS5848097U true JPS5848097U (en) 1983-03-31

Family

ID=29933595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14043481U Pending JPS5848097U (en) 1981-09-24 1981-09-24 memory package

Country Status (1)

Country Link
JP (1) JPS5848097U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61179705A (en) * 1985-02-05 1986-08-12 ミサワホ−ム株式会社 Manufacture of light-weight aerated concrete panel using forming jig
JPS6260375U (en) * 1985-10-04 1987-04-14
JPS62167609U (en) * 1986-04-14 1987-10-24

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61179705A (en) * 1985-02-05 1986-08-12 ミサワホ−ム株式会社 Manufacture of light-weight aerated concrete panel using forming jig
JPH0342561B2 (en) * 1985-02-05 1991-06-27
JPS6260375U (en) * 1985-10-04 1987-04-14
JPS62167609U (en) * 1986-04-14 1987-10-24
JPH0438966Y2 (en) * 1986-04-14 1992-09-11

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