JPS5847157A - Ignition circuit for internal combustion engine - Google Patents

Ignition circuit for internal combustion engine

Info

Publication number
JPS5847157A
JPS5847157A JP14675481A JP14675481A JPS5847157A JP S5847157 A JPS5847157 A JP S5847157A JP 14675481 A JP14675481 A JP 14675481A JP 14675481 A JP14675481 A JP 14675481A JP S5847157 A JPS5847157 A JP S5847157A
Authority
JP
Japan
Prior art keywords
layer
transistor
electrode
main transistor
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14675481A
Other languages
Japanese (ja)
Inventor
Shunji Miura
俊二 三浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP14675481A priority Critical patent/JPS5847157A/en
Publication of JPS5847157A publication Critical patent/JPS5847157A/en
Pending legal-status Critical Current

Links

Classifications

    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F02COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
    • F02PIGNITION, OTHER THAN COMPRESSION IGNITION, FOR INTERNAL-COMBUSTION ENGINES; TESTING OF IGNITION TIMING IN COMPRESSION-IGNITION ENGINES
    • F02P1/00Installations having electric ignition energy generated by magneto- or dynamo- electric generators without subsequent storage
    • F02P1/08Layout of circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Combustion & Propulsion (AREA)
  • Mechanical Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Ignition Installations For Internal Combustion Engines (AREA)

Abstract

PURPOSE:To provide an ignition circuit reduced of power loss without increasing the number of parts, by connecting a switching element made of a combined field-effect transistor, to both the terminals of the primary winding of an ignition coil. CONSTITUTION:A combined element 31 manufactured by producing a P-region 33 in the collector layer 32 of an NPN transistor is provided. The electrode 34 of the P-layer 33 is connected to the emitter electrode of a main transistor Tr2 coupled between both the primary termainals A, C of an ignition coil 1. The electrode 35 of an N-layer 32 is connected to the base of the transistor Tr2. When the potential on the terminal A rises, a current flows from the collector electrode 36 of the combined element 31 to the base of the transistor Tr2through the N-layer 32 and the electrode 35 to turn on the transistor. When electric conduction is caused between the collector and base electrodes 36, 39 of the element 31 by applying a forward bias to the P-N juction between the base and emitter regions 37, 38 of the element through its base and emitter electrodes 39, 40, the transistor Tr2 is turned off to produce sparks on a spark plug 4.

Description

【発明の詳細な説明】 本発明は、イグニションコイルの一次側巻線の短絡電流
を通電するトランジスタをし中断して二次側巻線に高電
圧を誘起させ1点火プラグに19点火する内燃機関点火
回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides an internal combustion engine in which a short-circuit current is passed through a transistor in the primary winding of an ignition coil, and a high voltage is induced in the secondary winding to cause 19 sparks to ignite in one spark plug. Regarding the ignition circuit.

この種の回路として、二般に、幕1図および第2図に示
すものが知られている。篤1図においては、イグニショ
ンコイル1の一次側IHIIll内に、  −図示しな
い内燃機関のクランク軸の79イホイールに取付けられ
て回転する永久磁石に:よシ交流電圧が誘起される。端
子Aが端子CK対して正の状態にあるとき、抵抗Rtk
通じてさ−スミ流が供給されるので主トランジスタ2が
先ず導通する。
Two commonly known circuits of this type are those shown in Figures 1 and 2. In Fig. 1, an alternating current voltage is induced in the primary side IHIll of the ignition coil 1, - in a permanent magnet that is attached to and rotates on a wheel 79 of the crankshaft of an internal combustion engine (not shown). When terminal A is in a positive state with respect to terminal CK, resistance Rtk
The main transistor 2 becomes conductive first because a Sumi current is supplied through the main transistor 2.

端子A、C間の電圧は抵抗孔、、R,により分圧されて
副トランジスタ3のベースに%加えられておシ、端子ム
の電位が所定の値まで上昇す7ると副トランジスタ3が
導通すゐ。すると%B点の電位が低下して主トランジス
タ2がし中断され、イグニションコイルlの二5次側巻
線12に大きな電1圧が誘起されて点火プラグ4に火花
が飛び、内燃機関の点火が行われる。
The voltage between terminals A and C is divided by the resistor holes, R, and applied to the base of the sub-transistor 3. When the potential of the terminal A and C rises to a predetermined value, the sub-transistor 3 Continuity. Then, the potential at point %B decreases and the main transistor 2 is interrupted, a large voltage is induced in the secondary winding 12 of the ignition coil l, a spark flies to the spark plug 4, and the internal combustion engine ignites. will be held.

纂2図においては、1111図の副トランジスタ2に代
るスイッチング素子としてサイリスタ5が接続されてお
シ、抵抗凡畠によって分圧され九端子A、C間の電圧が
サイリスタ5のゲート、カンード関の順バイアスとして
印加されるので、端子人の電位が所定の値まで一上昇す
るとサイリスタ4は導通するようL4n、)ツーンジス
タ2がし中断され、第1図の場合と同様に点火プラグ4
に火花が飛ぶ。
In Fig. 2, a thyristor 5 is connected as a switching element in place of the sub-transistor 2 in Fig. 1111, and the voltage between the nine terminals A and C is divided by the resistor and is connected to the gate of the thyristor 5 and the voltage between the terminals A and C. Since it is applied as a forward bias, when the potential at the terminal rises to a predetermined value, the thyristor 4 becomes conductive (L4n), and the thyristor 2 is interrupted and the spark plug 4
Sparks fly.

これらの場合、抵抗鴇、1が小さ%/%はと主トランジ
スタ20ベース電流が大きくとれ、トランジスタ2の増
幅率が小さくても大きなコレクタ電流が得られるので、
抵抗Rxt−小さくすることが望ましい、しかし副トラ
ンジスタ2またはサイリスタ5が導通して主トランジス
タ2がし中断され、A点が高電位になったとき、抵抗R
at通じて大暑な電流が副トランジスタ3またはサイリ
スタ5に流れるので、トランジスタ3を九はサイリスタ
5の電流容量を大きくする必要があって価格が高くなり
、を九電力損失も大きくなる。そのため抵抗R1tTo
ま9小さくすることができない。従うて内燃機関の低速
回転時は誘起電・圧が低くて主トランジスタ2に流れる
電流が小さくな9に次側巻線12の誘起電−圧が低く、
火花エネルギーが小さくなる。他方増幅率の大きな主ト
ランジスタを使用することも考えられるが、この種のト
ランジスタは通常エミッタ、コレクタ間の耐電圧が低い
九′め、−次側巻線11の起電圧【小さく抑える必要が
生じるので主トランジスタ2として増幅率がある程度以
上に大きいものを用いるのはむしろ得策ではない。
In these cases, if the resistance value 1 is small, the base current of the main transistor 20 can be large, and even if the amplification factor of the transistor 2 is small, a large collector current can be obtained.
Resistance Rxt - It is desirable to make it small, but when the secondary transistor 2 or thyristor 5 conducts and the main transistor 2 is interrupted and the point A becomes high potential, the resistance R
Since a large amount of current flows through the sub-transistor 3 or the thyristor 5, it is necessary to increase the current capacity of the thyristor 5 for the transistor 3, which increases the price and increases the power loss. Therefore, the resistance R1tTo
It cannot be made smaller. Therefore, when the internal combustion engine rotates at low speed, the induced voltage and voltage are low and the current flowing through the main transistor 2 is small.
Spark energy decreases. On the other hand, it is also possible to use a main transistor with a large amplification factor, but this type of transistor usually has a low withstand voltage between the emitter and collector, and the electromotive force of the ninth and negative windings 11 [needs to be kept small]. Therefore, it is not a good idea to use a main transistor 2 with an amplification factor larger than a certain level.

本発明はこのような欠点を解消し、イグニションコイル
の一次側巻線の短絡電流を通電する主トランジスタに並
列接続されるスイッチング素子の導通時の通電電流を制
限することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate such drawbacks and to limit the current flowing when the switching element connected in parallel to the main transistor that conducts the short-circuit current of the primary winding of the ignition coil is conductive.

仁の目的#i変互に異なる導電形を有する隣接した3層
以上の層からな9その第1層内には纂2層と同じ導電形
の別の領域を有するスイッチング票。
Purpose #i: A switching board consisting of three or more adjacent layers of alternately different conductivity types, with the first layer having another region of the same conductivity type as the second layer.

子が主トランジスタと並列にイグニションコイルの一次
側巻線の両端に接続され、スイッチング馬子の第一層が
主トランジスタのペースに接続されてイグニションコイ
ルの一次側IIkIliの電圧が所定の値以下の時に杜
流入するベース電流によ〕主トランジスタが導通せしめ
られ、所定の値を超えるときに紘スイッチング素子が導
通して主トランジスタがしゃ断せしめられ、さらに主ト
ランジスタのしゃ断時に発生する一次側巻線の電圧の大
きさに応じた逆バイアスがスイッチング素子の第一層と
第一層内の別の領域との間に印加されることにより第一
層内に広がる7空i層が形成せしめられることによって
達成される。パ 以下図を用いて′本発@0実施例について説明する。第
3図において、第1図の副トランジスタ3に代って接続
されている複合素子31は、NPNトランジスタのコレ
クタ層32tCP領域33t−形成し7t%のに相当す
る。この2層33に設けられ几電極34は主トランジス
タ2のエミッタ電極と接続されている。一方N層32に
設けられた電極35は主トランジスタ20ベース電極に
接続されている。端子Aが端子CK対して正の状態にあ
るときは、複合素子31のコレクタ電極36から8層3
2.電極35’に経て主トランジスタ2のべ−スに電流
が流れ、主トランジスタ2は導通する。
The first layer of the switching coil is connected to both ends of the primary winding of the ignition coil in parallel with the main transistor, and the first layer of the switching coil is connected to the pace of the main transistor so that when the voltage of the primary side IIkIli of the ignition coil is below a predetermined value, The main transistor is made conductive by the inflowing base current, and when it exceeds a predetermined value, the Hiro switching element is made conductive and the main transistor is cut off, and the voltage in the primary winding that occurs when the main transistor is cut off. This is achieved by applying a reverse bias depending on the magnitude of the switching element between the first layer of the switching element and another region within the first layer, thereby forming a 7-air layer extending within the first layer. be done. The present invention@0 embodiment will be explained using the following figures. In FIG. 3, a composite element 31 connected in place of the sub-transistor 3 of FIG. 1 forms a collector layer 32t and a CP region 33t of an NPN transistor, and corresponds to 7t%. A hollow electrode 34 provided on the two layers 33 is connected to the emitter electrode of the main transistor 2. On the other hand, an electrode 35 provided on the N layer 32 is connected to the base electrode of the main transistor 20. When the terminal A is in a positive state with respect to the terminal CK, the collector electrode 36 of the composite element 31 to the 8th layer 3
2. Current flows to the base of the main transistor 2 via the electrode 35', and the main transistor 2 becomes conductive.

端子人の電位がさらに上昇すると分圧抵提R諺の両端電
圧が上昇し、複合素子31のペース領域37とエミッタ
領域38との間のPNN接合代ペニス電極39エミッタ
電極40を介して順I(イアスしてコレクタ電極36と
エミッタ電極39閣が導通する。このため主トランジス
タ20ベース電流が消滅するので主トランジスタ2はし
中断される。
As the potential of the terminal further increases, the voltage across the voltage divider resistor R increases, and the PNN junction between the pace region 37 and the emitter region 38 of the composite element 31 passes through the penis electrode 39 and the emitter electrode 40 to the forward I (The collector electrode 36 and the emitter electrode 39 are electrically connected. Therefore, the base current of the main transistor 20 disappears, and the main transistor 2 is interrupted.

このときイグニションコイル1の一次側11に大きな電
圧が発生して二次$112でさらに昇圧さへ、点火プラ
グ4に火花が飛ぶ。端子Aの電位がさらに上昇すると2
層33と8層32の間のPN接合に加わる逆バイアスも
さらに増大し2層33から広がった空乏層に一工っで8
層32のキャリヤ通路はせとめられる。従って、複合素
子31に流れる電流が制限され、電力損失は制限されな
い場合の゛数十分の1以下に抑えられる・ 複合素子31は、具体的には例えは第4図の講うに構成
される。N層321−形成するN形シリコン板の下面に
は、N+層が設けられ、こζに電極35がオーム接触し
ている。板の上面には皿状OP領領域7とN領域38な
らびにリング状のP領域33がそれぞれ選択拡散処理を
施すことで形成されている。これら各領域ならびに8層
には電極34.36.38>!び40がオーム的に取着
されている0図示してないがシリコン板の表面性電極部
を除諭て酸化膜によ〕被覆されて保護されている。
At this time, a large voltage is generated on the primary side 11 of the ignition coil 1, and the secondary voltage is further increased to $112, causing a spark to fly to the spark plug 4. When the potential of terminal A further increases, 2
The reverse bias applied to the PN junction between the layer 33 and the 8th layer 32 also increases further, and the depletion layer that spreads from the 2nd layer 33 is affected by the 8
The carrier passageway in layer 32 is curtailed. Therefore, the current flowing through the composite element 31 is limited, and the power loss is suppressed to less than a few tenths of that in the case where there is no restriction. Specifically, the composite element 31 is configured as shown in FIG. 4. . An N+ layer is provided on the lower surface of the N-type silicon plate forming the N layer 321, and the electrode 35 is in ohmic contact with this layer. On the upper surface of the plate, a dish-shaped OP area 7, an N area 38, and a ring-shaped P area 33 are formed by selective diffusion treatment. Electrodes 34, 36, 38>! in each of these areas and in the 8 layers. Although not shown, the electrodes 40 and 40 are ohmically attached, and are protected by being covered with an oxide film, excluding the surface electrode portions of the silicon plate.

電極36から流入する電流は、環状P領域38に逆バイ
アス電圧が加わった際、その周囲に形成される空乏層に
よりその大きさが制限される。
The magnitude of the current flowing from the electrode 36 is limited by the depletion layer formed around the annular P region 38 when a reverse bias voltage is applied thereto.

纂5図においては第3図のサイリスタ50代9に、これ
と電界効果トランジスタとを複合した素子51が接続さ
れている。すなわち、この複合素子51においては、サ
イリスタのPエミッタ層52KN領域53が形成され、
素子51の直列抵抗R1の他端と接続されている。tた
P層52に設けられた電極55は主トランジスタ20ベ
ースtaに接続されている。この場合抵抗R1は零でも
よへ端子ムが端子CK対して正の状態、にあるときは。
In FIG. 5, an element 51 which is a combination of the thyristor 50's 9 of FIG. 3 and a field effect transistor is connected. That is, in this composite element 51, a P emitter layer 52KN region 53 of the thyristor is formed,
It is connected to the other end of the series resistor R1 of the element 51. An electrode 55 provided on the P layer 52 is connected to the base ta of the main transistor 20. In this case, even if the resistance R1 is zero, if the terminal is in a positive state with respect to the terminal CK.

抵抗R1そして素子51のアノード電極56.P層52
および電極55t−経て主トランジスタ2のベース圧電
流が流れ、主トランジスタ2Fi導AするOさらに端子
A側の電圧が上昇し1分圧抵抗島の両端電圧が上昇する
とPエミツタ層52.Nベース層57.P<−ス層58
.Nエミッタ層59からなるサイリスタのPベース層5
8とNエミツタ層590間のPN接合がゲート電極60
.カソード電極61を介して順バイアスされ、複合素子
51(Dサイリスタが導通して主トランジスタをし。
resistor R1 and anode electrode 56 of element 51. P layer 52
When the base voltage current of the main transistor 2 flows through the electrode 55t and the main transistor 2Fi conductor A, the voltage on the terminal A side rises, and the voltage across the voltage resistor island rises, the P emitter layer 52. N base layer 57. P<-s layer 58
.. P base layer 5 of thyristor consisting of N emitter layer 59
8 and the N emitter layer 590 is the gate electrode 60.
.. It is forward biased through the cathode electrode 61, and the composite element 51 (D thyristor conducts) to act as the main transistor.

+断り、 その結果点火が行われる。この際端子A側に
発生する高い電位に1って抵抗R,を通して複合素子5
1のサイリスタのアノード電極56からカソード電極6
1に向けて大きな電流が流れようとするが、P層52と
その中に形成され九N領域54とからなるPN接合が逆
バイアス状態にあるためKPP層2中に空乏層が広がシ
、P層5.2中を通過するキャリヤの通路がせばめられ
る。従って複合素子51に流れる電Rは制限され、電力
損失は低減する。
+ Refusal, resulting in ignition. At this time, a resistor R is connected to the high potential generated on the terminal A side to connect the composite element 5.
From the anode electrode 56 to the cathode electrode 6 of the thyristor No. 1
1, but since the PN junction consisting of the P layer 52 and the 9N region 54 formed therein is in a reverse bias state, a depletion layer spreads in the KPP layer 2. The carrier path through the P layer 5.2 is narrowed. Therefore, the electric current R flowing through the composite element 51 is limited, and power loss is reduced.

複合素子51は、実際には例えばjII6図のように構
成される。即ちN領域57?形成するN形シリコン板の
上に例えばエピタキシャル法によJjP層を積層し、そ
のP層をN−域によ〕2つのP領域53.58に分離す
る。領域58内には皿状のr領域59を、領域53内に
は環状の耐領域53をそれぞれ例えば拡散法によ多形成
し、各領域に電極54〜56および60,61t−設け
る0図示していないが各電極部を除く表面咳は酸化、a
t設けて。
The composite element 51 is actually configured as shown in FIG. jII6, for example. That is, N area 57? A JjP layer is laminated by, for example, an epitaxial method on the N-type silicon plate to be formed, and the P layer is separated into two P regions 53 and 58 by an N- region. A dish-shaped r region 59 is formed in the region 58, and an annular resistance region 53 is formed in the region 53 by, for example, a diffusion method, and electrodes 54 to 56 and electrodes 60, 61t are provided in each region (0). However, the surface area excluding each electrode part is oxidized, a
Set up t.

外部雰囲気から保護する。電極56かも流入する電流は
逆バイアスの際Kll状耐領域53によって広げられる
空乏層によ〕その大きさが制限される。
Protect from external atmosphere. The current flowing into the electrode 56 is limited in magnitude by the depletion layer widened by the Kll-like breakdown region 53 during reverse bias.

第7図はさらに別の実施例を示す。この場合、複合素子
71はNゲートサイリスタに電界効果トランジスタを組
合せたもので6町、分圧抵抗8會および几、は省略さ懸
゛ている。複合素子71は第6図の素子51と同様サイ
リスタのPエミツタ層72にN領域7“3が形成されて
おり、?−のN領域73に設けられた電極74は素子5
1の直列抵抗R1の他端に接続されている。(この場合
R1は零でもよい。)Pエミツタ層72および隣接Nベ
ース層75に:はそれぞれ電極76.77が設けられて
おり1両電極間には抵抗孔、およびコンデンサCIが並
列接続されている。R4およびC1は何れか一方でもよ
い。電極77はまた主トランジスタ20−ス電極にも接
続されている。この回路の場合、端子人が端子CK対し
で正の状態にあるときは、抵抗R1,アノード電極78
.2層72゜電極76から抵抗孔、tたはコンデンサC
Iを通して主トランジスタ20ペースに電流が流れ、主
トランジスタが導通する。次に端子人の電位がさらに上
昇すると、抵抗R4またはコンデンサCIの両端電圧が
1昇してPエミツタ層72とNペース層750間のPN
接合を類バイアスするようになシ、複合票子71の層7
2.75およびNベース層79、Pエミッタ層80から
なるサイリスタは導通してアノード電極78からカソー
ド電極8Xへ電流が流れ、主トランジスタ2がしゃ断さ
れて点火が行われる。この際発生する端子A、C関の高
い電圧によシ素子71の1層72七N領域73との間の
PN接合が逆バイアスされ、その結果1層72内に広が
った空乏層によ〕電流制限が行われることは前述の実施
例と同様である。この回路においては分圧抵抗Rs −
Ra t’省略できるばかりでなく電極77と電極81
0間の電圧が第5図の場合の電極55と電極61の間の
電圧よ)も小さ゛くできるので主トランジスタ2tL中
断しゃすくする効果がある。tたコンデンサC,Fi、
端子人。
FIG. 7 shows yet another embodiment. In this case, the composite element 71 is a combination of an N-gate thyristor and a field effect transistor, and the voltage dividing resistors 8 and 8 are omitted. Similar to the element 51 in FIG. 6, the composite element 71 has an N region 7"3 formed in the P emitter layer 72 of the thyristor, and an electrode 74 provided in the N region 73 of ?- is the same as the element 51 in FIG.
It is connected to the other end of one series resistor R1. (In this case, R1 may be zero.) The P emitter layer 72 and the adjacent N base layer 75 are provided with electrodes 76 and 77, respectively, and a resistor hole and a capacitor CI are connected in parallel between the two electrodes. There is. Either one of R4 and C1 may be used. Electrode 77 is also connected to the main transistor 20- source electrode. In this circuit, when the terminal is in a positive state with respect to the terminal CK, the resistor R1 and the anode electrode 78
.. 2-layer 72° electrode 76 to resistor hole, t or capacitor C
Current flows through I to the main transistor 20, causing the main transistor to conduct. Next, when the potential of the terminal further increases, the voltage across the resistor R4 or the capacitor CI increases by 1, and the PN between the P emitter layer 72 and the N pace layer 750 increases.
The layer 7 of the composite stamp 71 should be made so as to bias the joining.
The thyristor consisting of 2.75, the N base layer 79, and the P emitter layer 80 becomes conductive, and current flows from the anode electrode 78 to the cathode electrode 8X, and the main transistor 2 is cut off to perform ignition. Due to the high voltage between the terminals A and C generated at this time, the PN junction between the first layer 72 and the N region 73 of the element 71 is reverse biased, and as a result, the depletion layer spread within the first layer 72] Current limitation is performed in the same way as in the previous embodiment. In this circuit, the voltage dividing resistor Rs −
Not only can Ra t' be omitted, but also electrode 77 and electrode 81 can be omitted.
The voltage between electrodes 55 and 61 in the case of FIG. 5 can also be made smaller, which has the effect of making it easier to interrupt the main transistor 2tL. t capacitor C, Fi,
terminal person.

0間の電圧が異常に急上昇したときにサイリスタの点弧
時期を遅らせ1点火時期が早くなりすぎないように調整
する効果を持つ。
It has the effect of delaying the ignition timing of the thyristor when the voltage between 0 and 0 rises abnormally and adjusting the ignition timing so that the 1 ignition timing does not become too early.

以上説明しfI−1うに、本発明による内燃機関点火回
路Fi、電界効果トランジスタを複合したスイッチング
素子を用いることにより、主トランジスタし中断時にス
イッチング素子に流れる電流の大きさを制限するもので
あル1部品数を増加することなしに電力損失を減少させ
ることができるという効果を奏する。
As explained above, by using the internal combustion engine ignition circuit Fi according to the present invention and a switching element that is a combination of field effect transistors, the magnitude of the current flowing through the switching element when the main transistor is interrupted is limited. This has the effect of reducing power loss without increasing the number of parts.

【図面の簡単な説明】[Brief explanation of the drawing]

jI1図、第2図dそれぞれ内燃機関点火回路の異なる
従来例の1路図、第3図は本発明による点火回路の一実
施例の回路図、纂4図はそれに用いる複合素子の一部を
切欠い几斜視図、第5図、は他の実施例の回路図、纂6
図はそれに用いる複合素子の一部會切欠ムた斜視゛図、
第7図はさらに異なる実施例の回路図である。 1・・・イグニションコイル、2・・・主トランジスタ
。 31.51.71・・・複合スイッチング素子・才1図 才3図
Fig. 1 and Fig. 2 d are respectively diagrams of different conventional examples of internal combustion engine ignition circuits, Fig. 3 is a circuit diagram of an embodiment of the ignition circuit according to the present invention, and Fig. 4 shows a part of the composite element used therein. The cutaway perspective view, FIG. 5, is a circuit diagram of another embodiment, Volume 6.
The figure is a partially cutaway perspective view of the composite element used in it.
FIG. 7 is a circuit diagram of a further different embodiment. 1...Ignition coil, 2...Main transistor. 31.51.71...Composite switching element, Figure 1, Figure 3

Claims (1)

【特許請求の範囲】[Claims] l)交互に異なる導電形を有する隣接した3層以上の層
からな9その纂1層内KajllE 2層と同じ導電形
の別の領域を有するスイッチング素子が主トランジスタ
と並列にイン二りMノコイルの一次側巻線の両端KII
絖され、該スイッチング素子の第一層が前記主トランジ
スタのベースKml’altして前記イグニシvx’<
:Iイルの一次側巻線の電圧が所定の値以下の時には流
入するベース電流によp主トランジスタが導通せしめら
れ、所定の値を超えるときにはスイッチング素子が導通
して主トランジスタがしゃ断せしめられ、さもに主トラ
ンジスタのし中断時に発生する一次側巻線の電圧の大き
さに応じ崎ト(イアスがスイッチング素子OW+一層と
第一層内の前記の別の領域との閲に印加されることによ
り第一層内に広がる空乏層が形成せしめられること′を
特徴とする内燃機関点火回路。
l) A switching element having another region of the same conductivity type as the second layer is in parallel with the main transistor. Both ends KII of the primary winding of
The first layer of the switching element is connected to the base Kml'alt of the main transistor and the ignition voltage Vx'<
: When the voltage of the primary winding of the I coil is below a predetermined value, the inflowing base current causes the P main transistor to conduct, and when it exceeds a predetermined value, the switching element conducts and the main transistor is cut off. Similarly, depending on the magnitude of the voltage in the primary winding that occurs when the main transistor is interrupted, the voltage is applied between the switching element OW+ layer and the other region in the first layer. An internal combustion engine ignition circuit characterized in that a depletion layer is formed that spreads within the first layer.
JP14675481A 1981-09-17 1981-09-17 Ignition circuit for internal combustion engine Pending JPS5847157A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14675481A JPS5847157A (en) 1981-09-17 1981-09-17 Ignition circuit for internal combustion engine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14675481A JPS5847157A (en) 1981-09-17 1981-09-17 Ignition circuit for internal combustion engine

Publications (1)

Publication Number Publication Date
JPS5847157A true JPS5847157A (en) 1983-03-18

Family

ID=15414818

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14675481A Pending JPS5847157A (en) 1981-09-17 1981-09-17 Ignition circuit for internal combustion engine

Country Status (1)

Country Link
JP (1) JPS5847157A (en)

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