JPS5846435A - デジタルデータプロセッサ - Google Patents
デジタルデータプロセッサInfo
- Publication number
- JPS5846435A JPS5846435A JP57142555A JP14255582A JPS5846435A JP S5846435 A JPS5846435 A JP S5846435A JP 57142555 A JP57142555 A JP 57142555A JP 14255582 A JP14255582 A JP 14255582A JP S5846435 A JPS5846435 A JP S5846435A
- Authority
- JP
- Japan
- Prior art keywords
- digital data
- bits
- cell
- processing
- array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
- G06F7/5306—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel with row wise addition of partial products
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
- G06F15/8023—Two dimensional arrays, e.g. mesh, torus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
- G06F17/145—Square transforms, e.g. Hadamard, Walsh, Haar, Hough, Slant transforms
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
- G06F7/5443—Sum of products
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/3808—Details concerning the type of numbers or the way they are handled
- G06F2207/3832—Less usual number representations
- G06F2207/3836—One's complement
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/386—Special constructional features
- G06F2207/388—Skewing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/386—Special constructional features
- G06F2207/3884—Pipelining
- G06F2207/3892—Systolic array
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49994—Sign extension
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- Data Mining & Analysis (AREA)
- Algebra (AREA)
- Databases & Information Systems (AREA)
- Software Systems (AREA)
- Complex Calculations (AREA)
- Advance Control (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8125222 | 1981-08-18 | ||
GB8125222 | 1981-08-18 | ||
GB8211416 | 1982-04-20 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5846435A true JPS5846435A (ja) | 1983-03-17 |
JPH0326411B2 JPH0326411B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1991-04-10 |
Family
ID=10524023
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57142555A Granted JPS5846435A (ja) | 1981-08-18 | 1982-08-17 | デジタルデータプロセッサ |
Country Status (2)
Country | Link |
---|---|
US (2) | US4533993A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
JP (1) | JPS5846435A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6063682A (ja) * | 1983-07-27 | 1985-04-12 | ギルテツク・リサ−チ・カンパニ−・インコーポレーテツド | 計算装置とその計算方法 |
JPS6097464A (ja) * | 1983-10-05 | 1985-05-31 | ブリティッシュ・テクノロジー・グループ・リミテッド | デジタルデータプロセツサ |
JP2002544586A (ja) * | 1999-05-07 | 2002-12-24 | モーフィックス テクノロジー インコーポレイテッド | プログラマブルデータ経路算術アレイのための装置及び方法 |
Families Citing this family (55)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4580215A (en) * | 1983-03-08 | 1986-04-01 | Itt Corporation | Associative array with five arithmetic paths |
CA1219965A (en) * | 1983-04-11 | 1987-03-31 | Allen P. Clarke | Self repair large scale integrated circuit |
US5146608A (en) * | 1983-05-31 | 1992-09-08 | Hillis W Daniel | Parallel processor array system controlled in response to composition status signal |
US5151996A (en) * | 1983-05-31 | 1992-09-29 | Thinking Machines Corporation | Multi-dimensional message transfer router |
US5123109A (en) * | 1983-05-31 | 1992-06-16 | Thinking Machines Corporation | Parallel processor including a processor array with plural data transfer arrangements including (1) a global router and (2) a proximate-neighbor transfer system |
EP0131416B1 (en) * | 1983-07-06 | 1990-06-13 | The Secretary of State for Defence in Her Britannic Majesty's Government of the United Kingdom of Great Britain and | Constraint application processor |
GB8320362D0 (en) * | 1983-07-28 | 1983-09-01 | Secr Defence | Digital data processor |
DE3506749A1 (de) * | 1984-02-27 | 1985-09-26 | Nippon Telegraph & Telephone Public Corp., Tokio/Tokyo | Matrixprozessor und steuerverfahren hierfuer |
US4698751A (en) * | 1984-07-13 | 1987-10-06 | Ford Aerospace & Communications Corporation | Systolic array for solving cyclic loop dependent algorithms |
JPH0640337B2 (ja) * | 1984-10-03 | 1994-05-25 | 株式会社日立製作所 | パイプライン演算装置 |
US4799152A (en) * | 1984-10-12 | 1989-01-17 | University Of Pittsburgh | Pipeline feedback array sorter with multi-string sort array and merge tree array |
WO1986002474A1 (en) * | 1984-10-16 | 1986-04-24 | The Commonwealth Of Australia Care Of The Secretar | A cellular floating-point serial-pipelined multiplier |
GB8431925D0 (en) * | 1984-12-18 | 1985-01-30 | Secr Defence | Digital data processor |
US4835680A (en) * | 1985-03-15 | 1989-05-30 | Xerox Corporation | Adaptive processor array capable of learning variable associations useful in recognizing classes of inputs |
US5113523A (en) * | 1985-05-06 | 1992-05-12 | Ncube Corporation | High performance computer system |
EP0233866A1 (en) * | 1985-09-03 | 1987-09-02 | FARNUM, Henry Merritt | A universal construction devices for models, stagecraft, models of matrices and the like |
US4720780A (en) * | 1985-09-17 | 1988-01-19 | The Johns Hopkins University | Memory-linked wavefront array processor |
FR2591003B1 (fr) * | 1985-11-29 | 1988-01-15 | Trt Telecom Radio Electr | Dispositif de sommation de carres |
US4797852A (en) * | 1986-02-03 | 1989-01-10 | Intel Corporation | Block shifter for graphics processor |
GB8605367D0 (en) * | 1986-03-05 | 1986-04-09 | Secr Defence | Bit-slice digital processor |
GB8605366D0 (en) * | 1986-03-05 | 1986-04-09 | Secr Defence | Digital processor |
US4887233A (en) * | 1986-03-31 | 1989-12-12 | American Telephone And Telegraph Company, At&T Bell Laboratories | Pipeline arithmetic adder and multiplier |
US4787057A (en) * | 1986-06-04 | 1988-11-22 | General Electric Company | Finite element analysis method using multiprocessor for matrix manipulations with special handling of diagonal elements |
CA1293819C (en) * | 1986-08-29 | 1991-12-31 | Thinking Machines Corporation | Very large scale computer |
US5146606A (en) * | 1986-09-18 | 1992-09-08 | Digital Equipment Corporation | Systems for interconnecting and configuring plurality of memory elements by control of mode signals |
US5153521A (en) * | 1986-09-18 | 1992-10-06 | Digital Equipment Corporation | Broken wire detector for use in a massively parallel array processing system |
US5230079A (en) * | 1986-09-18 | 1993-07-20 | Digital Equipment Corporation | Massively parallel array processing system with processors selectively accessing memory module locations using address in microword or in address register |
US5058001A (en) * | 1987-03-05 | 1991-10-15 | International Business Machines Corporation | Two-dimensional array of processing elements for emulating a multi-dimensional network |
US4858177A (en) * | 1987-03-27 | 1989-08-15 | Smith Harry F | Minimal connectivity parallel data processing system |
US4910669A (en) * | 1987-04-03 | 1990-03-20 | At&T Bell Laboratories | Binary tree multiprocessor |
US5050069A (en) * | 1987-04-27 | 1991-09-17 | Thinking Machines Corporation | Method and apparatus for simulating m-dimension connection networks in and n-dimension network where m is less than n |
US4851995A (en) * | 1987-06-19 | 1989-07-25 | International Business Machines Corporation | Programmable variable-cycle clock circuit for skew-tolerant array processor architecture |
US4908751A (en) * | 1987-10-15 | 1990-03-13 | Smith Harry F | Parallel data processor |
JPH01175660A (ja) * | 1987-12-29 | 1989-07-12 | Matsushita Electric Ind Co Ltd | マルチプロセッサシステム |
US4941121A (en) * | 1988-04-01 | 1990-07-10 | Digital Equipment Corporation | Apparatus for high performance multiplication |
US5179714A (en) * | 1988-10-07 | 1993-01-12 | Martin Marietta Corporation | Parallel bit serial data processor |
WO1990004235A1 (en) * | 1988-10-07 | 1990-04-19 | Martin Marietta Corporation | Parallel data processor |
US5243551A (en) * | 1989-05-17 | 1993-09-07 | The Secretary Of State For Defence In Her Britannic Majesty's Government Of The United Kingdom Of Great Britain And Northern Ireland | Processor suitable for recursive computations |
JPH03130175A (ja) * | 1989-07-31 | 1991-06-03 | Casio Electron Mfg Co Ltd | ドットマトリックスデータを拡大する装置 |
US5163120A (en) * | 1989-10-13 | 1992-11-10 | Texas Instruments Incorporated | Second nearest-neighbor communication network for synchronous vector processor, systems and methods |
US5319586A (en) * | 1989-12-28 | 1994-06-07 | Texas Instruments Incorporated | Methods for using a processor array to perform matrix calculations |
JP2647330B2 (ja) * | 1992-05-12 | 1997-08-27 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 超並列コンピューティングシステム |
US6073185A (en) * | 1993-08-27 | 2000-06-06 | Teranex, Inc. | Parallel data processor |
US5566342A (en) * | 1994-08-31 | 1996-10-15 | International Business Machines Corporation | Scalable switch wiring technique for large arrays of processors |
US6074429A (en) * | 1997-03-03 | 2000-06-13 | Motorola, Inc. | Optimizing combinational circuit layout through iterative restructuring |
US6021453A (en) * | 1997-04-24 | 2000-02-01 | Klingman; Edwin E. | Microprocessor unit for use in an indefinitely extensible chain of processors with self-propagation of code and data from the host end, self-determination of chain length and ID, (and with multiple orthogonal channels and coordination ports) |
US6789212B1 (en) | 1997-04-24 | 2004-09-07 | Edwin E. Klingman | Basic cell for N-dimensional self-healing arrays |
US6173388B1 (en) | 1998-04-09 | 2001-01-09 | Teranex Inc. | Directly accessing local memories of array processors for improved real-time corner turning processing |
US6212628B1 (en) | 1998-04-09 | 2001-04-03 | Teranex, Inc. | Mesh connected computer |
US6067609A (en) * | 1998-04-09 | 2000-05-23 | Teranex, Inc. | Pattern generation and shift plane operations for a mesh connected computer |
US6185667B1 (en) | 1998-04-09 | 2001-02-06 | Teranex, Inc. | Input/output support for processing in a mesh connected computer |
US6745268B1 (en) | 2000-08-11 | 2004-06-01 | Micron Technology, Lnc. | Capacitive multidrop bus compensation |
RU2412390C1 (ru) * | 2009-10-22 | 2011-02-20 | Открытое акционерное общество "Силовые машины-ЗТЛ, ЛМЗ, Электросила, Энергомашэкспорт" (ОАО "Силовые машины") | Лабиринтное уплотнение |
CN110047266B (zh) * | 2018-01-17 | 2021-01-22 | 京东方科技集团股份有限公司 | 信息表示方法、多进制计算电路及电子系统 |
EP4324606A4 (en) | 2021-04-16 | 2025-07-02 | Nippon Career Ind Co Ltd | HAND DEVICE, DEVICE FOR ARRANGEMENT ON FOOD PLATE USING HAND DEVICE, AND FOOD BATCH FORMING DEVICE |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3979728A (en) * | 1973-04-13 | 1976-09-07 | International Computers Limited | Array processors |
US4065808A (en) * | 1975-01-25 | 1977-12-27 | U.S. Philips Corporation | Network computer system |
US4174514A (en) * | 1976-11-15 | 1979-11-13 | Environmental Research Institute Of Michigan | Parallel partitioned serial neighborhood processors |
US4270169A (en) * | 1978-05-03 | 1981-05-26 | International Computers Limited | Array processor |
US4270170A (en) * | 1978-05-03 | 1981-05-26 | International Computers Limited | Array processor |
US4215401A (en) * | 1978-09-28 | 1980-07-29 | Environmental Research Institute Of Michigan | Cellular digital array processor |
US4251861A (en) * | 1978-10-27 | 1981-02-17 | Mago Gyula A | Cellular network of processors |
US4412303A (en) * | 1979-11-26 | 1983-10-25 | Burroughs Corporation | Array processor architecture |
US4384273A (en) * | 1981-03-20 | 1983-05-17 | Bell Telephone Laboratories, Incorporated | Time warp signal recognition processor for matching signal patterns |
-
1982
- 1982-08-10 US US06/406,916 patent/US4533993A/en not_active Expired - Lifetime
- 1982-08-17 JP JP57142555A patent/JPS5846435A/ja active Granted
-
1985
- 1985-05-06 US US06/730,941 patent/US4639857A/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6063682A (ja) * | 1983-07-27 | 1985-04-12 | ギルテツク・リサ−チ・カンパニ−・インコーポレーテツド | 計算装置とその計算方法 |
JPS6097464A (ja) * | 1983-10-05 | 1985-05-31 | ブリティッシュ・テクノロジー・グループ・リミテッド | デジタルデータプロセツサ |
JP2002544586A (ja) * | 1999-05-07 | 2002-12-24 | モーフィックス テクノロジー インコーポレイテッド | プログラマブルデータ経路算術アレイのための装置及び方法 |
Also Published As
Publication number | Publication date |
---|---|
US4639857A (en) | 1987-01-27 |
JPH0326411B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1991-04-10 |
US4533993A (en) | 1985-08-06 |
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