JPH0326411B2 - - Google Patents

Info

Publication number
JPH0326411B2
JPH0326411B2 JP57142555A JP14255582A JPH0326411B2 JP H0326411 B2 JPH0326411 B2 JP H0326411B2 JP 57142555 A JP57142555 A JP 57142555A JP 14255582 A JP14255582 A JP 14255582A JP H0326411 B2 JPH0326411 B2 JP H0326411B2
Authority
JP
Japan
Prior art keywords
bits
bit
array
cell
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57142555A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5846435A (ja
Inventor
Uinsento Makanii Jon
Gurahamu Makuiitaa Jon
Uiriamu Utsudo Kenesu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NAT RES DEV
Original Assignee
NAT RES DEV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NAT RES DEV filed Critical NAT RES DEV
Publication of JPS5846435A publication Critical patent/JPS5846435A/ja
Publication of JPH0326411B2 publication Critical patent/JPH0326411B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G06F7/5306—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel with row wise addition of partial products
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/145—Square transforms, e.g. Hadamard, Walsh, Haar, Hough, Slant transforms
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3832—Less usual number representations
    • G06F2207/3836—One's complement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/386—Special constructional features
    • G06F2207/388—Skewing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/386—Special constructional features
    • G06F2207/3884—Pipelining
    • G06F2207/3892—Systolic array
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49994—Sign extension

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Data Mining & Analysis (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
JP57142555A 1981-08-18 1982-08-17 デジタルデータプロセッサ Granted JPS5846435A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB8125222 1981-08-18
GB8125222 1981-08-18
GB8211416 1982-04-20

Publications (2)

Publication Number Publication Date
JPS5846435A JPS5846435A (ja) 1983-03-17
JPH0326411B2 true JPH0326411B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-04-10

Family

ID=10524023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57142555A Granted JPS5846435A (ja) 1981-08-18 1982-08-17 デジタルデータプロセッサ

Country Status (2)

Country Link
US (2) US4533993A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS5846435A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022220135A1 (ja) 2021-04-16 2022-10-20 株式会社日本キャリア工業 ハンド装置およびこのハンド装置を用いた食品盛り付け装置と食品群形成装置

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WO1986002474A1 (en) * 1984-10-16 1986-04-24 The Commonwealth Of Australia Care Of The Secretar A cellular floating-point serial-pipelined multiplier
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US4720780A (en) * 1985-09-17 1988-01-19 The Johns Hopkins University Memory-linked wavefront array processor
FR2591003B1 (fr) * 1985-11-29 1988-01-15 Trt Telecom Radio Electr Dispositif de sommation de carres
US4797852A (en) * 1986-02-03 1989-01-10 Intel Corporation Block shifter for graphics processor
GB8605367D0 (en) * 1986-03-05 1986-04-09 Secr Defence Bit-slice digital processor
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US4887233A (en) * 1986-03-31 1989-12-12 American Telephone And Telegraph Company, At&T Bell Laboratories Pipeline arithmetic adder and multiplier
US4787057A (en) * 1986-06-04 1988-11-22 General Electric Company Finite element analysis method using multiprocessor for matrix manipulations with special handling of diagonal elements
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US5146606A (en) * 1986-09-18 1992-09-08 Digital Equipment Corporation Systems for interconnecting and configuring plurality of memory elements by control of mode signals
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US5230079A (en) * 1986-09-18 1993-07-20 Digital Equipment Corporation Massively parallel array processing system with processors selectively accessing memory module locations using address in microword or in address register
US5058001A (en) * 1987-03-05 1991-10-15 International Business Machines Corporation Two-dimensional array of processing elements for emulating a multi-dimensional network
US4858177A (en) * 1987-03-27 1989-08-15 Smith Harry F Minimal connectivity parallel data processing system
US4910669A (en) * 1987-04-03 1990-03-20 At&T Bell Laboratories Binary tree multiprocessor
US5050069A (en) * 1987-04-27 1991-09-17 Thinking Machines Corporation Method and apparatus for simulating m-dimension connection networks in and n-dimension network where m is less than n
US4851995A (en) * 1987-06-19 1989-07-25 International Business Machines Corporation Programmable variable-cycle clock circuit for skew-tolerant array processor architecture
US4908751A (en) * 1987-10-15 1990-03-13 Smith Harry F Parallel data processor
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US5243551A (en) * 1989-05-17 1993-09-07 The Secretary Of State For Defence In Her Britannic Majesty's Government Of The United Kingdom Of Great Britain And Northern Ireland Processor suitable for recursive computations
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WO2022220135A1 (ja) 2021-04-16 2022-10-20 株式会社日本キャリア工業 ハンド装置およびこのハンド装置を用いた食品盛り付け装置と食品群形成装置

Also Published As

Publication number Publication date
JPS5846435A (ja) 1983-03-17
US4639857A (en) 1987-01-27
US4533993A (en) 1985-08-06

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