JPS5841007B2 - Charge transfer type transversal filter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a charge transfer type transversal filter having positive and negative weighting coefficients, and particularly to a charge transfer type transversal filter in which positive and negative weighting coefficients can be arbitrarily set.

As is well known, charge transfer devices (hereinafter referred to as CTD) such as charge-coupled devices (hereinafter referred to as CCD) and bucket brigade devices (hereinafter referred to as BBD) can be used as transversal filters by utilizing their delay function. It can be applied.

Recently, transversal filters with high integration and excellent characteristics have been developed using an input weighting method in which multiple branched input signals are weighted with predetermined coefficients, and added and delayed using CTD. It's coming.

In this case, in CTD, the polarity of the signal charge handled is limited to either positive or negative polarity, so to perform both positive and negative weighting, for example, gain control is performed using an input signal and an inverted input signal. By doing so, equivalent positive and negative weighting can be performed.

However, in this method, the DC component of the signal charge is added at each stage of the CTD regardless of whether the weighting coefficient is positive or negative, so the DC component increases toward the output stage and is transferred to accommodate this DC component. The electrode area had to be increased toward the output stage.

Furthermore, there is a drawback that the relative signal detection sensitivity decreases due to the increase in the DC component at the output stage.

This invention was made in view of the above points, and the signal weighted with a positive weighting coefficient is injected as a signal charge into each stage, and the signal weighted with a negative weighting coefficient flows out from each stage as a signal charge. It is an object of the present invention to provide a charge transfer type transversal filter with a high degree of integration and high signal detection sensitivity by performing addition and subtraction with respect to the DC component.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the basic structure of a charge transfer type transversal filter of the present invention.

At the forefront of the charge transfer means 1, there is provided a DC charge injection means 2 for injecting a DC charge corresponding to a virtual zero level into this means.

Further, each stage of the charge transfer means 1 is provided with a signal charge injection means 4a for inputting an input signal weighted with a positive weighting coefficient according to the control voltage inputted through each of the terminals 3a to 3d.
~4d are provided respectively.

Further, each stage of the charge transfer means 1 is provided with a signal charge draining means 6 for inputting an input signal weighted with a negative weighting coefficient according to the control voltage inputted through each of the terminals 5a to 5d.
a to 6d are provided respectively.

Furthermore, the output stage of the charge transfer means 1 is provided with an output means 7 for detecting signals delayed, added or subtracted at each stage of the charge transfer means 1.

FIG. 2 is a schematic diagram for explaining the operation of the transversal filter shown in FIG. 1.

That is, a DC charge QI is injected from the DC charge injection means 2 to the foremost stage of the charge transfer means 1, and a signal charge q weighted with a positive weighting coefficient is output from each of the signal charge injection means 4a to 4d at each stage.

(K)+(1, (K) is injected, or the signal charge q≦(K)+qs weighted with a negative weighting coefficient (IO is drained from each of the signal charge draining means 6a to 6d of each stage). Ru.

The charge Qo reaching the output means 7 at this time is becomes.

Here, QI is the DC charge injected from the front stage, qo(K
), q, (K) are the direct current component of the signal charge injected and weighted with a positive weighting coefficient at each stage, the AC valve, and q'o(
K) and qs(K) respectively represent the DC component and the AC valve of the signal charge that is weighted with a negative weighting coefficient in each stage and is drained.

Therefore, the output charge Qo is a superposition of alternating current charges that swing positive and negative around the direct current charge input from the front stage.

Therefore, the phenomenon that the DC charge increases toward the output stage of the charge transmission means 1 is eliminated.

In addition, if the DC charge input from the front stage is selected to be approximately y2, which is the maximum amount of charge that can be accommodated under the transfer electrode, the input signal q
The widest dynamic range of the output charge Qo for 5ωy q's (K') can be achieved.

becomes.

Here, it is the sum total of the difference between the DC component of the injected signal charge weighted with a positive weighting coefficient and the DC component of the signal charge drained out while weighted with a negative weighting coefficient.

Therefore, in this case, the dynamic range is narrower than in the case of equation (2).

FIG. 3 is a plan view specifically showing the block diagram shown in FIG. 1, and is an example of application to a programmable transversal filter in which the weighting coefficient of a charge transfer type transversal filter can be arbitrarily changed by an external electric signal. It is.

In this case, a potential balancing method will be used as the charge injection means, and a floating diffusion amplifier will be used as the charge transfer means and single-phase drive type CCD1 output charge detection means.

In FIG. 3, a DC charge injection means 2 for injecting DC charges from the frontmost stage of the CCD 1 includes a source region 11 and a first gate electrode 12 provided successively adjacent thereto. Second gate electrode 13. and a third gate electrode 14.

Then, predetermined DC biases VG-1 and vo-2 are applied to the first gate electrode 12 and the second gate electrode 13, respectively, so that about 4 of the maximum amount of charge that can be accommodated under the next transfer electrode, that is, the third gate electrode 14, is applied. The setting is made so that the charge of 200 nm is accumulated under the second gate electrode 13.

A pulse φ8 is applied to the source region 11, a pulse φG-s is applied to the third gate electrode 14, and the third gate electrode 14 is closed while charges are injected from the source region 11. During the period when charge injection from the source region 11 is stopped, the third gate electrode 14 is opened and the charge under the second gate electrode 13 is transferred to the transfer electrode 20a of the CCD 1.

The signal charge injection means 4a to 4d at each stage all have the same configuration, including source regions 15a and 15b.

15c, 15d, and the first gate electrode 16a.

16b, 16c, 16d, and the second gate electrode 17a
, 17b, 17c, and 17d, and the third gate electrode 18
a, 18b, 18c, and 18d.

First gate electrode 16a. 16 b t 16 c t
A signal obtained by biasing the input signal ■in with the DC voltage vB is applied in parallel to the input signal 16d.

second gate electrodes 17a, 17b, 17c; In 17d,
Control voltages vh4 (+1), Vha (2), Vh2 (1), and (2) h1 (1) are applied so that the capacitance of the potential well under each of these electrodes becomes a desired weighting coefficient ratio.

Source regions 15a, 15b, 15c. A pulse φ8 is applied in parallel to the third gate electrodes 18a and 15d.
Pulse φG-3 is applied in parallel to source regions 15a, 15'b, 15c.b, 18c, 18ct.
, 15d, the third gate electrode 18a.

18b, 18c, 18d are closed and the source region 15
The third gate electrode 18a during the period in which charge injection from a, 15b, 15c, and 15d is stopped.

18b, 18c, and 18d are opened to form the second gate electrode 17a.
, 17d, 17c, and 17d are transferred to the transfer electrodes 20b, 20c, and 20d of the CCD1.

20e.

All of the signal charge draining means 6a to 6d in each stage have the same configuration, including a fourth gate electrode 29a.

29b, 29c, and 29d, and the fifth gate electrode 30a
, 30b, 30c, and 30d, and the sixth gate electrode 31
a, 31b, 31c, and 31d, and the drain region 32
a, 32b, 32c, and 32d.

Fourth gate electrode 29a. In 29b, 29c, 29d,
The same signal as that applied to the first gate electrodes 17a, 17b, 17c, and 17d, that is, a signal obtained by biasing the input signal Vin with the DC voltage vB, is applied in parallel.

Fifth gate electrode 30a s 30b) 30c
At t30d, a control voltage Vh4(-) is applied so that the capacity of the potential well under these electrodes becomes a desired weighting coefficient ratio.
-Vh3(-),Vh2(-),Vhl(-) are applied.

The third gate electrodes 18a, 18b are the sixth gate electrodes 31a, 31b, 31c, 31d.

The same pulse φG- as applied to 18c and 18d
s is applied in parallel to the drain region 32a.

A DC voltage VDD is applied in parallel to 32b, 32c, and 32d.

and cc:ol transfer electrodes 20a, 20b, 20c,
Fourth gate electrodes 29a, 29b, 29c from each of 20d
, 29ct to pass under the fifth gate electrodes 30a, 30b,
30c.

The signal charges accumulated under each of the sixth gate electrodes 30d are transferred to the drain region 32a by opening the gates by a pulse φG-a applied in parallel to the sixth gate electrodes 31a, 31b, 31c, and 31d.

32b, 32c, and 32d, respectively.

The output means 7 includes a floating diffusion region 24 provided adjacent to the transfer electrode 21e of the CCD 1, and a MOS FFT 27 connected to the floating diffusion region 24.
A source follower amplifier A1 consisting of a resistor 28 and a reset gate electrode 25 provided adjacent to the floating diffusion region 24, this reset gate electrode 25, and a drain region 26 provided further adjacent to this reset gate electrode 25. ing.

After the output signal is taken out from the source follower amplifier A, the charge is removed by the reset gate electrode 25 and the drain region 26 in synchronization with the pulse φR.

The above-mentioned operation will be explained in more detail with reference to FIGS. 4 to 6, focusing on the mechanism of charge injection and outflow.

Fig. 4 is a waveform diagram showing the pulse timing used in Fig. 3, and Fig. 5 is a sectional view taken along the line A-A' in Fig. 3, showing the potential formed under each electrode. FIG. 6 is a diagram showing the state of the potential formed under each electrode, along with a sectional view taken along line BB' in FIG. 3.

At time 1=11 in FIGS. 5 and 6, the pulse φ8 is at a low level as shown in FIG.
Charge is injected from a to the second gate electrode 17a through the first gate electrode 16a.

Furthermore, at time 1=12, pulse φ8 is at a high level, so the injection of charges from the source region 15a is stopped, and the potential of the charges accumulated under the second gate electrode 17a is lower than the potential under the first gate electrode 16a. A certain charge is in the source region 1
Return to 5a.

One side of the tangent is the transfer electrode 20a.

Transfer electrodes 21a, 19b among 21a, 22a...

21b, 19c... (narrow transfer electrodes in FIG. 3) are transferred by ion implantation or the like in advance.

22a, 20b, 22b, . . . are set to have lower potentials.

Therefore, charges can be transferred in one direction (from left to right in FIG. 3) by single-phase couple pulse φ1 and DC voltage 2.

At this time -12, since the clock pulse φ1 is at a high level, charges are being transferred from the previous transfer electrode 22a to the lower side of the transfer electrode 20b.

Also, time 1=1. Now pulse φ.

-3 is at a high level, the third gate electrode 18a opens, and among the charges accumulated under the second gate electrode 17a, charges at a potential lower than that under the third gate electrode 18a are transferred to the bottom of the transfer electrode 20b. It will be done.

At the same time, the sixth gate electrode 31b opens and the fifth gate electrode 30
Of the charges accumulated under b, the sixth gate electrode 31b
Charges at a lower potential than below the drain region 32
It is leaked to b.

At time 1=14, the pulse φG-s becomes low level, and the third gate electrode 18a and the sixth gate electrode 31b are closed.

At time -1, the clock pulse φ1 becomes low level, so the charge accumulated under the transfer electrode 20b is first transferred to the fifth gate electrode 30b via the fourth gate electrode 29b, and then Charges at a lower potential pass through the fourth gate electrode 29b and are transferred to the second electrode 22b.
The sequence of operations is completed.

FIG. 7 is a plan view showing the configuration of another embodiment of the invention.

In this case, the difference from FIG. 3 is that the human input signal "in" is connected to the variable resistance element Rh4 (Rh3(1)).

Rh2 (1), Rh! (I-), Rh4 (b)tRh3
(to) Evening Rh2 (to).

The first gate electrode 16a is gain controlled by a dividing resistance ratio determined by Rh1(-) and the value of the fixed resistance element R8.

16b, 16c, 16d and fourth gate electrode 29a,
29b, 29c, and 29d.

In this case, the variable resistance element Rh4(1). Rh5(-)
)...If a MOS FET is used, it can be easily integrated on the same substrate as the CCD.

Also, second gate electrodes 17a, 17b, 17c, 17d and fifth gate electrodes 30a, 30b, 30c.

A constant voltage ■G-2 is applied in parallel to 30d,
A charge proportional to the gain-controlled signal is temporarily stored under these electrodes.

In FIG. 7, the mechanism of charge injection and outflow is exactly the same as that in FIG. 3, so a description thereof will be omitted.

In short, the difference is that in FIG. 3, the signal gain control is performed using a variable capacitor, whereas in FIG. 7, it is performed using a variable resistor.

FIG. 8 is a plan view showing the configuration of still another embodiment of the present invention.

In this case, the weighting of the signal is determined by the area of the second gate electrode for positive weighting and by the area of the fifth gate electrode for negative weighting.

In other words, since a constant DC voltage G-2 is applied to the second and fifth gate electrodes, signal charges proportional to their areas are accumulated under the second and fifth gate electrodes. .

In Figure 8, h4=-1,5, h5=+1.5, h2-
Although the case of −2.01h1=+2.0 is shown, the point is that the areas of the second gate electrode and the fifth gate electrode may be determined based on the determined weighting coefficient ratio.

The mechanism of charge injection and outflow is completely the same as in the case of FIG. 3, and will therefore be omitted.

In short, the signal gain control in FIG. 3 is performed with a variable capacitor, whereas in FIG. 8, it is performed with a fixed capacitor.

This type of transversal filter with fixed weighting coefficients can also be constructed using the transversal filter shown in FIG.

That is, if a fixed resistor is used instead of the variable resistor in FIG. 7 and the dividing resistance ratio is set equal to the determined weighting coefficient ratio, a transversal filter with fixed weighting coefficients will be obtained.

Note that the present invention is not limited to the above embodiments; for example, the charge transfer means may be a two-phase, three-phase or four-phase drive type CCD1 or BBD, and the charge injection means may be a diode cut-off type, and the charge injection means may be of the diode cut-off type, and the output means may be of a two-phase, three-phase or four-phase drive type. As such, it is possible to use a well-known technique such as a floating gate amplifier.

As described above, according to the present invention, it is possible to provide a charge transfer type transversal filter that has a high degree of integration, has high signal detection sensitivity, and can easily assign positive and negative weights to input signals.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the basic structure of a charge transfer type transversal filter according to an embodiment of the present invention, FIG. 2 is a schematic diagram for explaining the operation of the above embodiment, and FIG. A plan view specifically showing the block diagram shown in the figure, and FIGS. 4 to 6 are for explaining the operation of the above embodiment in more detail, and FIG. 4 shows the pulse diagram used in FIG. A waveform diagram showing the timing, Figure 5 is A in Figure 3.
A diagram showing the state of the potential formed under each electrode according to the cross-sectional view taken along the line -A', and FIG. 6 is a cross-sectional view taken along the line B-B' in FIG. A diagram showing the state of potential formed under each electrode, FIG. 7 is a plan view showing the configuration of another embodiment of the invention, and FIG. 8 is a plan view showing the configuration of still another embodiment of the invention. It is. 1... Charge transfer means, 2... DC charge injection means, 4
a to 4b... Signal charge injection means, 6a to 6d... Signal charge outflow means, 7... Output means, 11... Source region, 12... First gate electrode, 13... Third 2 gate electrode, 14... 3rd gate electrode, 15a to 15d.
...Source region, 16a-16d...First gate electrode, 17a-17d...Second gate electrode, 18a-
18d--Third gate electrode, 19a to 19e. 20a-20d, 21a-21d, 22a-22d...
- Transfer electrode, 24... floating diffusion region, 25
...Reset gate electrode, 26...Drain region,
27...MOS FET12B...Resistor, 29a
~29d... Fourth gate electrode, 30a~30d...
Fifth gate electrode, 31a to 31d...Sixth gate electrode, 32a to 32d...Drain region.

Claims (1)

[Scope of Claims] 1. Charge transfer means for delaying, adding, and subtracting signals, and the charge transfer means using input signals weighted by predetermined weighting coefficients corresponding to each stage of the charge transfer means as signal charges. means for injecting an input signal weighted by a predetermined weighting coefficient corresponding to each stage of the charge transfer means from the charge transfer means as a signal charge; A charge transfer type transversal filter comprising means for injecting charge, and means for detecting charges delayed, added, and subtracted by the charge transfer means. 2. The DC charge injected by the means for injecting DC charge from the frontmost stage of the charge transfer means is approximately 2 of the maximum amount of charge that can be accommodated in each stage of the charge transfer means. A charge transfer type transversal filter according to item 1 of the range. 3. The means for injecting DC charge from the frontmost stage of the charge transfer means includes a source region, a first gate electrode, a second gate electrode, and a third gate electrode following the source region, and the first gate electrode and the second gate electrode A predetermined DC voltage is applied to the source region, and the third gate is closed while charges are being injected from the source region through under the first gate electrode and under the second gate electrode, and the injection of charges from the source region is stopped. 2. The charge transfer type transversal filter according to claim 1, wherein the third gate is opened during a period during which the charge under the second gate electrode is transferred to under the transfer electrode of the charge transfer means. 4. The means for injecting an input signal weighted by a predetermined weighting coefficient corresponding to each stage of the charge transfer means into the charge transfer means as a signal charge includes a source region and a first gate electrode and a second gate following the source region. electrode. an input signal biased by a DC voltage is applied to the first gate electrode, a predetermined DC voltage is applied to the second gate electrode, and a second The third gate is closed while charge is being injected under the gate electrode, and the third gate is opened while charge injection from the source region is stopped to transfer the charge under the second gate electrode to the bottom of the transfer electrode. A charge transfer type transversal filter according to claim 1, wherein the charge transfer type transversal filter is configured to: 5. The means for flowing out the input signal weighted by a predetermined weighting coefficient corresponding to each stage of the charge transfer means from the charge transfer means as a signal charge is a fourth gate adjacent to at least two phase electrodes of the charge transfer means. electrode and the following fifth
a gate electrode, a sixth gate electrode, and a drain region, an input signal biased by a DC voltage is applied to the fourth gate electrode, a predetermined DC voltage is applied to the fifth gate electrode, and a drain region adjacent to the fourth gate electrode is applied. A part of the charge is transferred from under the power phase electrode of the two phase electrodes closer to the input side, passes under the fourth gate electrode, and is accumulated under the fifth gate electrode, and the remaining charge is transferred to the output side. The sixth gate electrode is closed for a period of time until the charge is transferred under the phase electrode nearer to the phase electrode, and after this transfer operation, the sixth gate electrode is connected so that the charge accumulated under the fifth gate electrode flows out to the train region. A charge transfer type transversal filter according to claim 1. 6 The charge transfer means for delaying, adding, and subtracting the signals is a single-phase drive type charge transfer element, and a clock pulse is applied to the phase electrode closer to the input side of each stage, and the charge transfer means closer to the output side 2. The charge transfer type transversal filter according to claim 1, wherein a direct current heavy pressure is applied to one phase electrode. 7. The charge transfer type according to claim 4, wherein a control voltage is applied to the second gate electrode and the fifth gate electrode so that the storage capacitance under these electrodes becomes equal to a predetermined weighting coefficient ratio. Transpersal filter. 8. The charge transfer type transformer according to claim 4, wherein an input signal is applied to the first gate electrode and the fourth gate electrode with a gain controlled to be equal to a predetermined weighting coefficient ratio by a variable or fixed resistance element. Versal filter. 9. The charge transfer type transversal filter according to claim 4, wherein the second gate electrode and the fifth gate electrode have an area ratio equal to a predetermined weighting coefficient ratio. 10. The charge transfer type according to claim 5, wherein a control voltage is applied to the second gate electrode and the fifth gate electrode so that the storage capacitance under these electrodes becomes equal to a predetermined weighting coefficient ratio. transversal filter. 11. The charge transfer type transformer according to claim 5, wherein an input signal is applied to the first gate electrode and the fourth gate electrode with a gain controlled to be equal to a predetermined weighting coefficient ratio by a variable or fixed resistance element. Versal filter. 12. The charge transfer type transversal filter according to claim 5, wherein the second gate electrode and the fifth gate electrode have an area ratio equal to a predetermined weighting coefficient ratio.