JPS5840843A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make narrow the width of an Al wiring with a high current capacity, by keeping the Al wiring with a high current capacity thick and covering the exposed surface with a normal Al wiring, when providing an Al wiring with a high current capacity and a normal Al wiring on an SiO2 film adhered on an Si substrate. CONSTITUTION:An SiO2 film 5 is adhered on an Si substrate 1, and the first Al wiring pattern 8 with a high current capacity is formed thereon with this thickness formed thick. Next, the second Al wiring 9 which is normally thick is provided over the entire surface including this and etched resulting in a fixed margin on the entire surface of the wiring 8. Thus, an Al wiring 10 with a high current capacity constituted of A deg.C wiring 8 and 9 and an Al wiring 11 with a small current capacity constituted of the Al wiring 9 at a position separate therefrom are obtained. In this manner, the width of the Al wiring 10 can be formed narrow, and chip size is reduced.

Description

[Detailed description of the invention] Akira Motomoto relates to an improved semiconductor device.

In recent years, there has been remarkable progress in integrated circuit (hereinafter referred to as IC) technology, with the number of elements integrated on a single IC chip reaching tens of thousands, and some ICs with over 100,000 elements now appearing. . The transistors that make up these IC chips and the wiring between each confectionery are becoming finer patterns, and their dimensions are shrinking to the order of several microns. However, aluminum wiring is mainly used for wiring inside IC chips.

There are 28 types of wiring, one for transmitting signals and the other for supplying power to each element.The former type of wiring only allows a small amount of current to flow through it, so the width of the wiring can be narrow and is determined by microfabrication technology. In addition, the latter has a large current capacity, for example in power wiring, ground wiring, etc., and it tends to increase further as the degree of integration increases. It also needs to be thicker. For this reason, considering that the former signal wiring is becoming finer and smaller, it is essential to reduce the width of the latter wiring, which has a large current carrying capacity.

A conventional semiconductor device will be explained using figures. 1 shows the -fits portion of the aluminum (At) wiring of the IC chip (other steps are not shown). f! Figure 2 shows Mr1 diagram as A-
It is an enlarged sectional view when cut along AIK. In FIG. 1, 3 is an Al wiring for signal transmission, and since almost no current flows, a wiring width of several microns is sufficient. Reference numeral 2 indicates an Al wiring for power supply, and since the current capacity is large, the wiring width must be made thick, and depending on the current, a wiring width of 100 microns or more may be required. These wirings extend over the silicon oxide film 5 on the silicon substrate l. Even with the same A1 wiring in Al wiring 2, it is possible to increase the current capacity Jk by increasing the Al film thickness, but since 2ν3 is formed in the same process, the film thickness of 3 is also In response,
Due to side etching, etc., it becomes difficult to form fine patterns. For this reason, in recent IC chips, the width of the Al wiring, which requires a large current capacity, is
It is significantly thicker than other cables (signal transmission wiring, etc.), which hinders the reduction of IC chips.

This is one of the causes of a decrease in yield.

The present invention improves the drawbacks of the prior art and improves the fine 1g+
In the present invention, the first A1 layer is installed in the wiring area on the semiconductor substrate, The A1 layer is placed on the first Al layer in a state in which it is in air contact with the first Al layer.
By coating the second Al layer while covering the surface of the wiring, the first Al layer forms a second Al layer on the semiconductor substrate.
The semiconductor device is characterized in that the first Al wiring has a thicker structure than the second Al coating when the wiring is installed T'L.

The present invention will be explained in detail using figures.

3 to 5 show an embodiment of the present invention.

First, as shown in Figure 3, 1 on top of iU211K 5.
The first Al wiring pattern 8 of the 1f style is formed thickly. Next, as shown in FIG. 4, a second Al wiring pattern 9 is formed on the wafer with the same thickness as the conventional one in a state where it is in electrical contact with the first Al wiring pattern 8. Al with a wide margin on the entire surface like Enoki 9
The film 9 is etched (10 in FIG. 5) and an InA1 wiring pattern 11 having a small current capacity is formed. here,
The Al wiring (AI wiring for 1it source supply) 8 of fff41 is made to have a film thickness 2 to 3 times that of the normal Al wiring pattern 11. eIvi! (8 to 10
) u Normal (7) Al Compared to the film thickness of the wiring 11, 3 to 4
It has double the film thickness and the current capacity per unit wiring width is 3 times that of the normal one.
~4 times.

The needle arrangement width can be reduced to #Y 1/3 to 1/4. Further, the film thickness of the AI wiring 10, which is formed so as to have a margin of one foot over the seventh A1 wiring 11 and the first Al wiring 8 of the current container, is the same as the conventional one.

Problems such as reduction in wiring width and wiring cutting due to side etching do not occur. Therefore, by forming only the Al wiring with a large current trough with the required film thickness in advance while maintaining the conventional fine pattern for the Al wiring with a small -g#L capacitance, the width of the Al wiring can be made thinner and the width of the chip can be reduced. size 7f
r, can be reduced.

As explained above, in the present invention, the Al wiring with a large current capacity is formed thicker than the Al wiring with a small flow valley amount, and the Al wiring with a small current capacity is formed as a primary wiring. In addition to forming fJ, the width of the AI wiring with a large current valley can be achieved simply by forming the previously formed Al wiring with a large current density in a similar manner with a certain margin.

This is a method of manufacturing the semiconductor device 1d that is effective in reducing the chip size.

[Brief explanation of the drawing]

Figures 1 and 2 are a 1" f-plane view and a sectional view showing the prior art, and Figures 3 to 5 are process sectional views showing all the embodiments of the present invention. , l...Silicon substrate, 213
+8+IO+11...Dan/A1 distribution? 1M+9...
...AI Horn-5...Required in the silicon dioxide group. 6- 1st Flash L Z Figure $3 Figure 4th Ward? Hayabusa 5 Ward

Claims (2)

[Claims] (1) A semiconductor device W provided on a semiconductor substrate, characterized in that the first aluminum wiring is thicker than the second aluminum wiring. (2) The first aluminum wiring includes a first aluminum layer provided on an insulating layer, and a second aluminum layer that covers the first aluminum layer and has the same thickness as the second aluminum wiring. All 1f including and! j
1. A semiconductor device according to claim (1).