JPS5818941A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To easily increase wiring thickness and to reduce width to contrive the high integration of a device by a method wherein thick metal wiring is stacked on the metal wiring on a region having large current capacity and thin metal wiring is simultaneously provided on a region having small current capacity. CONSTITUTION:Al power wiring 8 having large current capacity is made on SiO2 5 on an Si substrate 4 and the whole surface is covered with the second Al 9. The Al 9 is etched and other signal wiring pattern 11 having small current capacity is also formed. The power wiring is piled Al 8 and 10 and thick and stroke width can be reduced as current capacity per unit width increases. The Al wiring 11 and the circumference of the power wiring are same and while maintaining the wiring 11 having small current capacity with a fine pattern as usual, only the wiring having large current capacity is formed with n times film thickness to form width as 1/n and chip size can be reduced.

Description

[Detailed description of the invention] The present invention relates to an improved method of manufacturing a semiconductor device.

In recent years, there have been remarkable advances in integrated circuit (hereinafter simply referred to as IC) technology, with the number of elements integrated on a single IC chip reaching 40,000, and ICs with over 100,000 elements appearing. . In these IC chips, the transistors constituting the IC and the wiring between each element are becoming finer, and their dimensions are being reduced to several microns.

However, there are two types of wiring within an IC: signal wiring for simply transmitting signals and wiring for supplying power to each element. In the former type of signal wiring, only a small current flows, so only the signal transmission speed is important.

Its width is determined by microfabrication technology. However, the round wiring 5 that supplies power, such as power wiring, ground wiring, etc.
The current capacity is large and tends to increase further as the degree of integration increases. Since the current density in the An wiring is limited due to the reliability of the IC, the wiring with a large current capacity needs to be thick. Therefore, considering the miniaturization of signal wiring, it is important to reduce the wiring width of wiring with large current capacity.

A conventional semiconductor device will be explained using figures.

FIG. 1 shows a part of an IC chip, and 1 is a chip on which elements are formed, but polysilicon, diffusion layers, etc. other than AI wiring are omitted. Figure 2 is.

FIG. 2 is an enlarged sectional view taken along line A- in FIG. 1; In FIG. 1, 3 is the signal AJ wiring, and since almost no current flows, a width of several microns is sufficient. Reference numeral 2 is a power supply Aj wiring, which has a large current capacity, and may require a wiring width of 100 microns or more depending on the current.

In FIG. 2, 4 is a semiconductor substrate, 5 is 8i0. 6 and 7 correspond to 2 and 3 in FIG. 1, respectively.

By increasing the Al film thickness, it is possible to increase the current capacity with the same AI wiring width, but since aluminum battens 6 and 7 are formed in the same process, the film thickness of 7 also increases, resulting in side etching, etc. Because of this, it is difficult to make a fine batten.For this reason, recent IC chips use A! The wiring width is significantly thicker than other wirings. This hinders the reduction of the IC chip and is one of the causes of a decrease in yield.

The present invention improves the drawbacks of the prior art and provides a method for manufacturing a semiconductor device that can reduce the width of wiring with large current capacity without affecting fine signal wiring.

The present invention includes a step of forming a first metal wiring in a region where a wiring with a large current capacity is to be formed on a semiconductor substrate on which a necessary confectionery is formed, and a step of forming a first metal wiring on the entire surface of the substrate including on the first metal wiring. A process of forming a new metal film, and forming a thick metal wiring by converting the metal film on the first metal wiring by a method such as photoetching, and at the same time forming a wiring with a small current capacity. This method of manufacturing a semiconductor device is characterized in that it includes a step of forming a second metal interconnection layer thinner than the metal interconnection layer by converting the metal coating layer in the desired region.

According to the present invention, the thickness of the wiring having a large current capacity can be easily increased, and the width of the wiring can be reduced.
It is possible to achieve higher integration of semiconductor devices, or in other words, to reduce the size of semiconductor chips.

The present invention will be explained by examples. 3 to 5 show an embodiment of the present invention.

FIG. 3 shows a semiconductor substrate 4t-covering a Sin film 5,
A power supply wiring having a large current response is formed using the first AI wiring pattern 8.

FIG. 4 shows a second A! The film 9t is formed in the process of forming the film.

In FIG. 5, the entire surface of the Aj wiring 8 is connected to A! with a certain margin. The AI film 9 is machined so as to cover it with the film 9.

This is a step of forming a chip on another signal wiring button 11 having a small current capacity.

In this case, since both the Aj films 8 and 10 are stacked on the power supply wiring, it can be made thicker than the other wiring 11. For example, A! If films 8 and 10 have the same thickness, the power supply wiring has twice the film thickness.

Therefore, the current capacity of the unit wiring width is also doubled, so
The wiring width can be reduced to approximately 1/2 of the conventional width. Also other Aj
Since the film thicknesses of the peripheral portions of the wiring 11 and the power supply wiring are the same as in the prior art, there is no reduction in the wiring width or wire breakage due to side etching. That is, maintain 9t'! By doubling the film thickness of only the wiring with large current capacity (of course, it can also be increased by an arbitrary multiple of n), the width of this wiring can be reduced by 1/
2 (or 1/n), and the chip size can be reduced by that much.

As described above, according to the present invention, the width of a wiring having a large current capacity can be made extremely small, which is extremely effective in increasing the degree of integration of a semiconductor device or downsizing a chip.

[Brief explanation of drawings]

Figure 1 is a schematic plan view showing part of the Aj wiring on a conventional IC chip, Figure 2 is a schematic cross-sectional view when Figure 1 is cut along A-4, Figures 3 and 4. FIG. 5 is a schematic sectional view for explaining the process order of an embodiment of the present invention. In the figure, 1...a part of the IC chip, 2
゜3.6~11...kl pattern%4...
- Semiconductor substrate, 5...Sin, film. Half 1z Mine Z mouth ゛11

Claims (1)

[Claims] forming a first metal wiring in a wiring area on a semiconductor substrate; forming a metal coating over the entire surface of the substrate including on the first metal wiring; and forming the metal coating on the first metal wiring. A semiconductor device characterized by comprising the step of: forming a thick metal wiring by battening the metal film, and simultaneously battening the metal film in another region to form a second metal wiring thinner than the metal wiring. Production method.