JPS5839025A - Measuring method for characteristics of semiconductor device - Google Patents

Measuring method for characteristics of semiconductor device

Info

Publication number
JPS5839025A
JPS5839025A JP13721881A JP13721881A JPS5839025A JP S5839025 A JPS5839025 A JP S5839025A JP 13721881 A JP13721881 A JP 13721881A JP 13721881 A JP13721881 A JP 13721881A JP S5839025 A JPS5839025 A JP S5839025A
Authority
JP
Japan
Prior art keywords
contact
resistance value
measurement
semiconductor wafer
probe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13721881A
Other languages
Japanese (ja)
Other versions
JPS612295B2 (en
Inventor
Iwao Matsushima
松島 巌
Hiroyuki Toyoda
裕之 豊田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP13721881A priority Critical patent/JPS5839025A/en
Publication of JPS5839025A publication Critical patent/JPS5839025A/en
Publication of JPS612295B2 publication Critical patent/JPS612295B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To accurately measure the characteristics of an element for confirming the contacting resistance formed at a semiconductor wafer by measuring the element, thereby detecting the contacting state with the element of a contacting probe. CONSTITUTION:When elements 11, 11... are formed by impurity selective diffusion in a semiconductor wafer 10, elements 12, 12... for confirming the contacting resistances are formed at a plurality of positions. At the time of measuring the characteristics, a probe card 16 is lowered by the prescribed distance to contact the contacting probes 17, 17... led from the card 16 with the electrodes 18, 18... of the elements 11, 11.... Thus, the characteristics are measured, thereby discriminating the propriety. When the measurements are advanced and the card 16 is moved onto the element 12, the resistance value between the electrodes 15, 15 is measured, thereby discriminating the propriety of the contacting state of the probes 17, 17. As a result of the measurements, when the resistance value is discriminated as proper, the measurement is continued, and the measurement of the characteristics of the general element 11 is then performed. When discriminated as improper, the measurement is stopped, and the height of the probes 17, 17 are adjusted to place the resistance value within the prescribed range, and the measurement of the characteristics of the other general element 11 is performed in the adjusted state.

Description

【発明の詳細な説明】 この発明は半導体装置の特性測定方法、特に半導体ウェ
ーハに形成された半導体素子を個々に正確に測定する測
定方法に関するものであるXC等の半導体装置は例えば
纂1図に示す様に、シリコン製の一枚の半導体ウェーハ
+1+に各種の不純物選択拡散工程中オーミック工程等
を経て多数の独立し大半導体素子(幻を網の目状に形成
し、これら各素子(幻を分断させて製品化している。前
記半導体素子(以下単に素子と称す)(り #i不純物
選択拡散によ)トランジスタ、ダイオード及び抵抗等の
集積回路が形成され、表向に第3図に示す様に各IJI
K対応する電極(易)が多数形成されている。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for measuring the characteristics of a semiconductor device, and particularly to a method for accurately measuring individual semiconductor elements formed on a semiconductor wafer. As shown in the figure, a large number of independent large semiconductor elements (phantoms) are formed in a network shape on a single silicon semiconductor wafer +1+ through various impurity selective diffusion processes, ohmic processes, etc., and each of these elements (phantoms) is The semiconductor element (hereinafter simply referred to as an element) (by selective diffusion of impurities) is formed into an integrated circuit including transistors, diodes, resistors, etc., as shown in Figure 3 on the surface. to each IJI
A large number of electrodes (easy) corresponding to K are formed.

とζろで上記の如き半導体装置は、半導体ウェーハ(1
) K多数の独立し九素子(りを形成し九段階で分断す
る曽に個々の素子(りK対して特性測定を行ない、その
良否を判定している。この特性の測定は、例えば菖8図
に示す様に、昇降自在に支持されたブーープヵード(4
)から素子(2)の電極と同数の接触探針(1暴)−・
を下方に導出させた測定器(−1を用い、測定時、前記
接触探針(1剥・・・を素子(りの電極(1口5)−=
−に−個宛接触させて電流を流し、特性を測定している
◎そして測定の結果、嵐品であればそのt″*KL、て
お自、不良品であれば、素子は)の#!面に適輪なマー
キングを行ない、半導体ウェーハ(1)を分断させた仮
、不良品をマウント工程へ供給しない様になしである。
The above semiconductor device is made of a semiconductor wafer (1
) The characteristics of each element (K) are measured to determine its quality. As shown in the figure, the boop card (4
) to the same number of contact probes (1) as the electrodes of element (2) -.
When measuring, using a measuring device (-1) with which the contact probe (1 strip) is guided downward,
The characteristics are measured by applying a current to - and passing a current through it.The results of the measurement show that if it is a good product, it is t''*KL, and if it is a defective product, the element is #). Even if the semiconductor wafer (1) is separated by appropriately marking the surface, there is no way to avoid supplying defective products to the mounting process.

しかし乍ら、上記プローブカード(4)は自励的に測定
を行なう為に所定の一定ストローグで昇降する様になし
てあり、半導体ウェーハ(1)が平坦に形成されていれ
ば良いのであるが、半導体ウェーハil+は不純物選択
拡散時の熱影替等により各部で凹凸を生じている。その
為、グローブカード(4)の下降量に対して半導体ウェ
ーハillの表面位置が異なり接触探針161161・
・・の接触状態が不安定となシ、その下降量を4&導体
クエーハ(11の凸部に合せて調整しであると、凹部で
の測定時、接触探針Ill iIl・・・の接触圧が低
め−ったり、或いは極端な場合には全く接触しなカーっ
たシして測定が正確に行なえず、不要品と判定される素
子が多く発生した。また逆に凹部に合せてalmmしで
あると、凸部では接触探針[51161・・・の接触圧
が高くなりすぎて半導体ウェーハ(1)が破損される場
合が多く歩留りが悪かった。また他にプロー11−)’
<4)が何らかの原因て所定ストローク下降しておらな
かつ九)tた接触探針用ill・・・の摩耗によ)十分
1接触がなされず正確な測定が困難で6つ九。
However, the probe card (4) is designed to move up and down at a predetermined constant stroke in order to carry out self-excited measurements, and it is sufficient if the semiconductor wafer (1) is formed flat. The semiconductor wafer il+ has irregularities in various parts due to thermal shadow change during selective diffusion of impurities. Therefore, the surface position of the semiconductor wafer ill differs from the amount of descent of the glove card (4).
If the contact state of... is unstable, if the amount of descent is adjusted to match the convex part of 4 & conductor quafer (11), the contact pressure of the contact probe Ill iIl... will be reduced when measuring in the concave part. In some cases, the contact was low, or in extreme cases, there was no contact at all, making it impossible to measure accurately, resulting in many elements being judged as unnecessary. In this case, the contact pressure of the contact probe [51161...] became too high at the convex portion, and the semiconductor wafer (1) was often damaged, resulting in poor yield.In addition, the yield was poor.
<4) For some reason, the probe did not descend the prescribed stroke, and (9) due to wear of the contact probe illumination, it was difficult to make accurate measurements due to insufficient contact.

この発明は従来の特性測定方法の上記問題点に鎌み、こ
れを改jL#去すべくなされたもので%半導体ウェーハ
の所定個所に一定の抵抗値を有する接触紙K11lE用
素子を形成し、癲t!!E素子の電極にグローブカード
の接触探針を接触させて測定し、その測定値よ〕接触探
針の接触状態の良否を判定し、嵐であれば同一状態で他
の素子の測定を行ない、否であれば測定を停止し、接触
探針を正しい状態に設定して他の測定を打衣う様になし
え測定方法を提供する◎ 以下この発明の実施態様を図面を参照して説明する。
This invention has been made to address the above-mentioned problems of the conventional characteristic measuring method and to eliminate these problems by forming elements for contact paper K11lE having a constant resistance value at predetermined locations on a semiconductor wafer, Sorry! ! Measure by touching the contact probe of the glove card to the electrode of the E element, use the measured value to determine whether the contact state of the contact probe is good or bad, and if it is a storm, measure other elements under the same condition. If not, the measurement is stopped, the contact probe is set in the correct state, and another measurement is performed. ◎ Hereinafter, embodiments of this invention will be explained with reference to the drawings. .

本発明は第4図に示す様に、半導体ウェーハーに不純物
選択拡散によりトランジスタ、・ダイオード及び抵抗等
を多数有する素子1す(11)・・・を形成する際に、
その複数個所に接触抵抗確認用索子ama場・・・を形
成する。癲誼素子a鴫は例えば第6図に示す様に、半導
体ウェーハ(PfIIi基板)−一内に素子全面に亘っ
て夏型不純物を選択拡散させて所定の抵抗値を有する抵
抗層91を形成し、その表面に絶縁層a(及び電極a時
Q時を形成しである。この素子91は半導体ウェー^(
至)の複数個所、例えば中央と上下左右の5個所に形成
する◎一方半導体つ、エーハ叫の特性測定を行なうプ四
−ダカードa−に祉一般の索子01(11・・・の特性
を測定する為のプ四ダツふと接触抵抗確認用素子−m−
の抵抗値を測定するプロダラムとを備えておく。
As shown in FIG. 4, the present invention involves forming elements 1 (11) having a large number of transistors, diodes, resistors, etc. on a semiconductor wafer by selective diffusion of impurities.
A cable ama field for contact resistance confirmation is formed at a plurality of locations. For example, as shown in FIG. 6, the electrolytic element A is formed by selectively diffusing summer type impurities over the entire surface of the element in a semiconductor wafer (PfIIi substrate) to form a resistive layer 91 having a predetermined resistance value. , an insulating layer a (and electrodes a and Q are formed on its surface. This element 91 is a semiconductor wafer ^(
◎ On the other hand, the characteristics of the general cable 01 (11... Contact resistance confirmation element for measurement -m-
A programmer is provided to measure the resistance value.

而して、特性測定時は、第一図に示す様にプ胃−プカー
ドI呻を所定のブ胃ダラ五に従って一定量下降させ、プ
四−ブカード俵鴫から導出させた接触探針a’n (1
7)−・・を素子(11)の電極I4−・・・に接触さ
せ、その特性を測定し、良・不良を判定する。そして測
定結果が良であれば、その11次の素子(11)を測定
し、不良であれば、適宜の手段により尚該素子111)
の表面に不良のマーキングを施こし、次の測定に移行す
る。
When measuring the characteristics, as shown in Fig. 1, the probe I is lowered by a certain amount according to the predetermined procedure, and the contact probe a' guided out from the probe n (1
7) -- is brought into contact with the electrode I4 -- of the element (11), its characteristics are measured, and whether it is good or bad is determined. If the measurement result is good, measure the 11th-order element (11); if the measurement result is bad, measure the element 111) by appropriate means.
Mark the defective surface on the surface and move on to the next measurement.

測定が進み、プ賢−プカード9時が接触抵抗確認用素子
端上に来ると、再び第1図に示す様に接触探針1輌を接
触抵抗確認用素子(I坤の電極Q4a@に接触させて、
両電極−(11間の抵抗値Rを測定し、接触探針■拳η
の接触状態の^・不良を判定する・りま)両電極019
4間の測定された抵抗値鳳が予め設定され九限界抵抗値
の下限x1と上@1′mとの閲(鳳l≦R1&1m)て
あれば接触探針#吟・埠の電極−HK対する接触状態が
嵐と判定し、前記範囲外であれば接触状態が不^と判定
する0即ち、両電@1時横間の抵抗値鳳は接触抵抗確認
用素子拳坤の抵抗層−の抵抗値l−と、電極0@−と接
触探針H)輌との接触抵抗値1oとの和(1゜1−十鳳
・)で貴わされる。この場合、抵抗層11の抵抗値!−
は一走な値を示すので、抵抗値1&fa!触Jl!抗値
Xaによって決定され、接触抵抗値R(1の表化にfH
:りて抵抗値凰は変化する。従って抵抗値mが隈界抵抗
値の範囲内にあるときは接触抵抗値11e・が正常でT
oc、接触探針I・ηの接触状態が良と判定される。ま
た抵抗値Rが範囲外、例えば、限界抵抗値の下限Rzよ
シフさい場合では接触抵抗値RCが小さく接触探針μη
aηの接触圧が低く不良となり、逆に上限R1より大き
い場合では接触抵抗値Rcが大きく、接触探針07)I
ηの接触圧が高く不良となる。
As the measurement progresses and the probe card 9 o'clock reaches the end of the element for contact resistance confirmation, one contact probe is again brought into contact with the electrode Q4a of the contact resistance confirmation element (Ikon) as shown in Figure 1. Let me,
Measure the resistance value R between both electrodes (11), and connect the contact probe ■fist η
Determine whether the contact status is ^/defective/Rima) Both electrodes 019
If the measured resistance value between 4 and 9 has been set in advance and is between the lower limit x1 and the upper limit of the nine limit resistance @1'm (R1≦R1&1m), then the contact probe #Gin/Bori electrode-HK is The contact state is determined to be stormy, and if it is outside the above range, the contact state is determined to be poor. It is expressed as the sum (1°1-100.times.) of the value l- and the contact resistance value 1o between the electrode 0@- and the contact probe H). In this case, the resistance value of the resistance layer 11! −
shows a one-shot value, so the resistance value is 1&fa! Touch Jl! It is determined by the resistance value Xa, and the contact resistance value R (fH
:The resistance value changes as the resistance changes. Therefore, when the resistance value m is within the range of the marginal resistance value, the contact resistance value 11e is normal and T
oc, the contact state of the contact probes I and η is determined to be good. In addition, if the resistance value R is outside the range, for example, if it is smaller than the lower limit Rz of the limit resistance value, the contact resistance value RC is small and the contact probe μη
The contact pressure of aη is low and becomes defective, and conversely, if it is larger than the upper limit R1, the contact resistance value Rc is large and the contact probe 07)I
The contact pressure of η is high and it becomes defective.

そして上記接触抵抗測定の結果、抵抗値Rが良と判定さ
れた場合は、その11測定を継続し、一般の素子(川の
特性測定に移行する。逆に不良と判定された場合は、測
定を停止し、抵抗値累が範H内になる様に接触探針o7
)eηの高さ等を調整し、調整した状態で他の一般の素
子(lυの特性測定に移行する。
As a result of the above contact resistance measurement, if the resistance value R is determined to be good, continue the 11 measurements and move on to measuring the characteristics of the general element (river).On the contrary, if it is determined to be defective, the measurement Stop the contact probe o7 so that the resistance value is within range H.
) Adjust the height of eη, etc., and move on to measuring the characteristics of other general elements (lυ) in the adjusted state.

上記の如く中導体つェーハ叫の特性測定時個々の素子(
五〇aυ・・・に対して特性の測定を行なうと共に半導
体ウェーへmK形成し九接触抵抗確認用素子@#as−
・において特性測定を行なう接触探針αη−の素子に対
する接触状態を測定し、その接触状態を正しく修正する
ので常に正確な特性測定を行なうことかで龜、シフも接
触抵抗確認用素子iIm嗜・−・は牛導体つェーハ叫の
各部に点在しているので、半導体ウェーハ(LO)の各
部で凹凸を生じてシつたり、何らかの原因でプローブカ
ード(IIが正しく下降していなかったp1更には接触
探針α40ηが磨耗等によシ変形していても即座にこれ
を検知して調整することができ、半導体ウェーハ叫全体
に亘って正確な測定が行なえる口 尚、上記説明では、接触抵抗確認用素子−は、半導体ウ
ェーハ叫内に不純物拡散によシ抵抗層値場を形成した場
合について説明したが、他に第8FAに示す様に1半導
体クエーハーの表面に金属層参時を設けてこれを抵抗層
とした素子を用いてもよい。
As mentioned above, when measuring the characteristics of a medium conductor wire, each element (
Measure the characteristics of 50aυ..., form mK on the semiconductor wafer, and form a contact resistance confirmation element @#as-
・Measures the contact state of the contact probe αη- to the element for characteristic measurement, and corrects the contact state correctly, so that accurate characteristic measurements can be made at all times. - Since these marks are scattered at various parts of the conductor, it is possible that various parts of the semiconductor wafer (LO) may be uneven and may fall, or for some reason the probe card (II) may not have descended correctly. Even if the contact probe α40η is deformed due to wear, it can be immediately detected and adjusted, and accurate measurements can be made over the entire semiconductor wafer. The resistance confirmation element has been described in the case where a resistance layer value field is formed by impurity diffusion within a semiconductor wafer, but it is also possible to form a metal layer on the surface of a semiconductor wafer as shown in the 8th FA. An element using this as a resistance layer may also be used.

以上説明し丸裸に、この発明によれば、半導体ウェーハ
の適肖個所に形成した接触抵抗確認用素子の測定を行う
ことによ〕、接触探針の素子に対する接触状態を検知し
、これにより常に正しい状態に調整することができ、半
導体ウェーハの各部で凹凸を生じたシ、プ胃−プカード
の下降量が異なっていたシ、更には接触探針が摩耗を生
じておってもこれ等に影響されることなく素子の特性測
定を正確に行なうことができ、製品の信頼性及び歩溜シ
が向上する。
As explained above, according to the present invention, the contact state of the contact probe with the element is detected by measuring the contact resistance confirmation element formed at a suitable location on the semiconductor wafer, and thereby the contact state of the contact probe with the element is constantly detected. It can be adjusted to the correct state, and even if there are unevenness in various parts of the semiconductor wafer, if the amount of descent of the probe card is different, or even if the contact probe is worn out, it can be avoided. Therefore, the characteristics of the device can be accurately measured without being affected by the noise, and the reliability and yield of the product are improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は素子を形成した半導体ウェーハの一般例を示す
平面図、#g3図はその半導体ウェーハに形成され良、
素子の拡大平面図、嬉8図は素子の特性Ilj定の一例
を示す拡大断面図、第4図は本発明の適用される亭導体
りエーI・の素子を形成した状態を示す平面図、第bv
Aは接触抵抗確認用素子の一例を示す拡大断W図、#g
6図は通常の素子の特性測定を示す拡大断面図、第7図
は接触抵抗確認用素子の測定を示す拡大断面図、第8図
は接触抵抗確認用素子の他の夾施例を示す拡大断面図で
ある〇 −・・・半導体ウェーハ、〔幻・・・半導体素子、−・
−接触抵抗確認用素子、輌−抵抗層、■・・・絶縁層、
 α賜・・・電極、 −・・・ブーーブカード、 ・η
・・・ 接触探針。 第1図 第2WJ ニブ 第8図
Fig. 1 is a plan view showing a general example of a semiconductor wafer on which elements are formed, and Fig. #g3 shows the elements formed on the semiconductor wafer.
FIG. 8 is an enlarged cross-sectional view showing an example of the characteristics of the device; FIG. 4 is a plan view showing the formed state of the device of the conductor to which the present invention is applied; Part bv
A is an enlarged cross-sectional W diagram showing an example of a contact resistance confirmation element, #g
Figure 6 is an enlarged cross-sectional view showing the characteristic measurement of a normal element, Figure 7 is an enlarged cross-sectional view showing the measurement of a contact resistance checking element, and Figure 8 is an enlarged view showing another example of the contact resistance checking element. A cross-sectional view of 〇-...semiconductor wafer, [phantom...semiconductor element, -]
- Element for contact resistance confirmation, - Resistance layer, ■... Insulating layer,
α gift...electrode, -...boob card, η
... Contact probe. Figure 1 Figure 2 WJ Nib Figure 8

Claims (1)

【特許請求の範囲】[Claims] (1)多数の半導体素子を形成した半導体ウェーへの複
数個所に特定の抵抗値を有する接触抵抗確認用素子を形
成し、嶺該接触抵抗確認用本子の表面電極に、プ田−ブ
カードの接触探針を接触させてその抵抗値が予め設定さ
れた限界抵抗値の範囲内にあるか否かKより接触探針の
素子に対する接触状態を検知し乍ら半導体素子の特性測
定を行なう様になし九ことを特徴とする半導体装置の特
性測定方法。
(1) Form contact resistance confirmation elements having specific resistance values at multiple locations on a semiconductor wafer on which a large number of semiconductor elements are formed, and contact the surface electrode of the contact resistance confirmation element with a plate card. The characteristics of the semiconductor element are measured while the contact state of the contact probe with the element is detected by K when the probe is brought into contact and whether the resistance value is within a preset limit resistance range. A method for measuring characteristics of a semiconductor device, characterized in that:
JP13721881A 1981-08-31 1981-08-31 Measuring method for characteristics of semiconductor device Granted JPS5839025A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13721881A JPS5839025A (en) 1981-08-31 1981-08-31 Measuring method for characteristics of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13721881A JPS5839025A (en) 1981-08-31 1981-08-31 Measuring method for characteristics of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5839025A true JPS5839025A (en) 1983-03-07
JPS612295B2 JPS612295B2 (en) 1986-01-23

Family

ID=15193539

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13721881A Granted JPS5839025A (en) 1981-08-31 1981-08-31 Measuring method for characteristics of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5839025A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6239022A (en) * 1985-08-14 1987-02-20 Toshiba Corp Probe testing process
JP2013238488A (en) * 2012-05-15 2013-11-28 Mitsubishi Electric Corp Solar battery cell characteristics evaluation device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6239022A (en) * 1985-08-14 1987-02-20 Toshiba Corp Probe testing process
JP2013238488A (en) * 2012-05-15 2013-11-28 Mitsubishi Electric Corp Solar battery cell characteristics evaluation device

Also Published As

Publication number Publication date
JPS612295B2 (en) 1986-01-23

Similar Documents

Publication Publication Date Title
US4386459A (en) Electrical measurement of level-to-level misalignment in integrated circuits
US4918374A (en) Method and apparatus for inspecting integrated circuit probe cards
CA1229427A (en) Height measuring apparatus
CN110907799B (en) Probe card, wafer testing device and wafer testing method
JP2007035856A (en) Manufacturing method of, measuring device for, and wafer for integrated circuit
US4914601A (en) Method for profiling wafers and for locating dies thereon
JPS5839025A (en) Measuring method for characteristics of semiconductor device
US5060371A (en) Method of making probe cards
US6762434B2 (en) Electrical print resolution test die
US20060148113A1 (en) Chain resistance pattern and method of forming the same
CN115561973A (en) Method for monitoring flatness of exposure platform of photoetching machine
JP2595962B2 (en) Semiconductor device
JPH0245339B2 (en) HANDOTAISHUSEKIKAIROSOCHI
JPH0729946A (en) Wafer prober
JPH07244117A (en) Inspecting apparatus for semiconductor element
JPH09207366A (en) Thermal head and its manufacture
JPS64270Y2 (en)
JPS61111531A (en) Inspection method for mask alignment accuracy of semiconductor device
JPS6130219Y2 (en)
KR20040096300A (en) Prober System Improving the Re-Alingment of Needles and the Method
JPS63220537A (en) Semiconductor substrate
JPH06120313A (en) Tab-system semiconductor device and inspection method thereof
JPS6137777B2 (en)
JPH046221Y2 (en)
JPH01115134A (en) Measurement of characteristic of semiconductor device