JPS5837239U - Conversion circuit from negative polarity digital signal to positive polarity digital signal - Google Patents

Conversion circuit from negative polarity digital signal to positive polarity digital signal

Info

Publication number
JPS5837239U
JPS5837239U JP13108381U JP13108381U JPS5837239U JP S5837239 U JPS5837239 U JP S5837239U JP 13108381 U JP13108381 U JP 13108381U JP 13108381 U JP13108381 U JP 13108381U JP S5837239 U JPS5837239 U JP S5837239U
Authority
JP
Japan
Prior art keywords
digital signal
polarity digital
positive
conversion circuit
positive polarity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13108381U
Other languages
Japanese (ja)
Inventor
公正 松原
Original Assignee
古野電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 古野電気株式会社 filed Critical 古野電気株式会社
Priority to JP13108381U priority Critical patent/JPS5837239U/en
Publication of JPS5837239U publication Critical patent/JPS5837239U/en
Pending legal-status Critical Current

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  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例を示し、第2図はこの考案の実施例を示
し、゛第3図はその動作を説明するための波形図、第4
図は電界効果トランジスタの特性図、第5図は他の実施
例を示す。 第2図において、1は負極性論理回路、2は正極性論理
回路、TR3は電界効果トランジ・スタを示す。
Fig. 1 shows a conventional example, Fig. 2 shows an embodiment of this invention, Fig. 3 is a waveform diagram for explaining its operation, and Fig. 4 shows a waveform diagram for explaining its operation.
The figure shows a characteristic diagram of a field effect transistor, and FIG. 5 shows another embodiment. In FIG. 2, 1 is a negative logic circuit, 2 is a positive logic circuit, and TR3 is a field effect transistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電界効果トランジスタのソース電極を負荷抵抗を介して
正電圧電源に接続すると共にドレイン電極を接続し、該
電界効果トランジスタのゲート電極に負極性ディジタル
信号を導いて上記ソース電極から正極性ディジタル信号
を取り出し、該正極性ディジタル信号に基づいて正極性
論理回路を駆動させることを特徴とする負極性、ディジ
タル信号から正極性ディジタル信号への変換回路。
A source electrode of a field effect transistor is connected to a positive voltage power source via a load resistor, and a drain electrode is also connected, a negative digital signal is guided to the gate electrode of the field effect transistor, and a positive digital signal is extracted from the source electrode. , a conversion circuit from a negative polarity digital signal to a positive polarity digital signal, characterized in that it drives a positive polarity logic circuit based on the positive polarity digital signal.
JP13108381U 1981-09-02 1981-09-02 Conversion circuit from negative polarity digital signal to positive polarity digital signal Pending JPS5837239U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13108381U JPS5837239U (en) 1981-09-02 1981-09-02 Conversion circuit from negative polarity digital signal to positive polarity digital signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13108381U JPS5837239U (en) 1981-09-02 1981-09-02 Conversion circuit from negative polarity digital signal to positive polarity digital signal

Publications (1)

Publication Number Publication Date
JPS5837239U true JPS5837239U (en) 1983-03-10

Family

ID=29924679

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13108381U Pending JPS5837239U (en) 1981-09-02 1981-09-02 Conversion circuit from negative polarity digital signal to positive polarity digital signal

Country Status (1)

Country Link
JP (1) JPS5837239U (en)

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